llvm/test/CodeGen/PowerPC/deeply-compressed-weights.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
; RUN:   -mcpu=future < %s | FileCheck %s --check-prefix=CHECK-LE
; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
; RUN:   -mcpu=future < %s | FileCheck %s --check-prefix=CHECK-BE

; AI Assissted.

declare <16 x i8> @llvm.ppc.altivec.vucmprhn(<16 x i8>, <16 x i8>)
declare <16 x i8> @llvm.ppc.altivec.vucmprln(<16 x i8>, <16 x i8>)
declare <16 x i8> @llvm.ppc.altivec.vucmprhb(<16 x i8>, <16 x i8>)
declare <16 x i8> @llvm.ppc.altivec.vucmprlb(<16 x i8>, <16 x i8>)
declare <16 x i8> @llvm.ppc.altivec.vucmprhh(<16 x i8>, <16 x i8>)
declare <16 x i8> @llvm.ppc.altivec.vucmprlh(<16 x i8>, <16 x i8>)
declare <16 x i8> @llvm.ppc.altivec.vupkhsntob(<16 x i8>)
declare <16 x i8> @llvm.ppc.altivec.vupklsntob(<16 x i8>)
declare <16 x i8> @llvm.ppc.altivec.vupkint4tobf16(<16 x i8>, i32)
declare <16 x i8> @llvm.ppc.altivec.vupkint8tobf16(<16 x i8>, i32)
declare <16 x i8> @llvm.ppc.altivec.vupkint4tofp32(<16 x i8>, i32)
declare <16 x i8> @llvm.ppc.altivec.vupkint8tofp32(<16 x i8>, i32)

define <16 x i8> @test_vucmprhn(<16 x i8> %a, <16 x i8> %b) {
; CHECK-LE-LABEL: test_vucmprhn:
; CHECK-LE:       # %bb.0:
; CHECK-LE-NEXT:    vucmprhn 2, 2, 3
; CHECK-LE-NEXT:    blr
;
; CHECK-BE-LABEL: test_vucmprhn:
; CHECK-BE:       # %bb.0:
; CHECK-BE-NEXT:    vucmprhn 2, 2, 3
; CHECK-BE-NEXT:    blr
  %res = call <16 x i8> @llvm.ppc.altivec.vucmprhn(<16 x i8> %a, <16 x i8> %b)
  ret <16 x i8> %res
}

define <16 x i8> @test_vucmprln(<16 x i8> %a, <16 x i8> %b) {
; CHECK-LE-LABEL: test_vucmprln:
; CHECK-LE:       # %bb.0:
; CHECK-LE-NEXT:    vucmprln 2, 2, 3
; CHECK-LE-NEXT:    blr
;
; CHECK-BE-LABEL: test_vucmprln:
; CHECK-BE:       # %bb.0:
; CHECK-BE-NEXT:    vucmprln 2, 2, 3
; CHECK-BE-NEXT:    blr
  %res = call <16 x i8> @llvm.ppc.altivec.vucmprln(<16 x i8> %a, <16 x i8> %b)
  ret <16 x i8> %res
}

define <16 x i8> @test_vucmprhb(<16 x i8> %a, <16 x i8> %b) {
; CHECK-LE-LABEL: test_vucmprhb:
; CHECK-LE:       # %bb.0:
; CHECK-LE-NEXT:    vucmprhb 2, 2, 3
; CHECK-LE-NEXT:    blr
;
; CHECK-BE-LABEL: test_vucmprhb:
; CHECK-BE:       # %bb.0:
; CHECK-BE-NEXT:    vucmprhb 2, 2, 3
; CHECK-BE-NEXT:    blr
  %res = call <16 x i8> @llvm.ppc.altivec.vucmprhb(<16 x i8> %a, <16 x i8> %b)
  ret <16 x i8> %res
}

define <16 x i8> @test_vucmprlb(<16 x i8> %a, <16 x i8> %b) {
; CHECK-LE-LABEL: test_vucmprlb:
; CHECK-LE:       # %bb.0:
; CHECK-LE-NEXT:    vucmprlb 2, 2, 3
; CHECK-LE-NEXT:    blr
;
; CHECK-BE-LABEL: test_vucmprlb:
; CHECK-BE:       # %bb.0:
; CHECK-BE-NEXT:    vucmprlb 2, 2, 3
; CHECK-BE-NEXT:    blr
  %res = call <16 x i8> @llvm.ppc.altivec.vucmprlb(<16 x i8> %a, <16 x i8> %b)
  ret <16 x i8> %res
}

define <16 x i8> @test_vucmprhh(<16 x i8> %a, <16 x i8> %b) {
; CHECK-LE-LABEL: test_vucmprhh:
; CHECK-LE:       # %bb.0:
; CHECK-LE-NEXT:    vucmprhh 2, 2, 3
; CHECK-LE-NEXT:    blr
;
; CHECK-BE-LABEL: test_vucmprhh:
; CHECK-BE:       # %bb.0:
; CHECK-BE-NEXT:    vucmprhh 2, 2, 3
; CHECK-BE-NEXT:    blr
  %res = call <16 x i8> @llvm.ppc.altivec.vucmprhh(<16 x i8> %a, <16 x i8> %b)
  ret <16 x i8> %res
}

define <16 x i8> @test_vucmprlh(<16 x i8> %a, <16 x i8> %b) {
; CHECK-LE-LABEL: test_vucmprlh:
; CHECK-LE:       # %bb.0:
; CHECK-LE-NEXT:    vucmprlh 2, 2, 3
; CHECK-LE-NEXT:    blr
;
; CHECK-BE-LABEL: test_vucmprlh:
; CHECK-BE:       # %bb.0:
; CHECK-BE-NEXT:    vucmprlh 2, 2, 3
; CHECK-BE-NEXT:    blr
  %res = call <16 x i8> @llvm.ppc.altivec.vucmprlh(<16 x i8> %a, <16 x i8> %b)
  ret <16 x i8> %res
}

define <16 x i8> @test_vupkhsntob(<16 x i8> %a) {
; CHECK-LE-LABEL: test_vupkhsntob:
; CHECK-LE:       # %bb.0:
; CHECK-LE-NEXT:    vupkhsntob 2, 2
; CHECK-LE-NEXT:    blr
;
; CHECK-BE-LABEL: test_vupkhsntob:
; CHECK-BE:       # %bb.0:
; CHECK-BE-NEXT:    vupkhsntob 2, 2
; CHECK-BE-NEXT:    blr
  %res = call <16 x i8> @llvm.ppc.altivec.vupkhsntob(<16 x i8> %a)
  ret <16 x i8> %res
}

define <16 x i8> @test_vupklsntob(<16 x i8> %a) {
; CHECK-LE-LABEL: test_vupklsntob:
; CHECK-LE:       # %bb.0:
; CHECK-LE-NEXT:    vupklsntob 2, 2
; CHECK-LE-NEXT:    blr
;
; CHECK-BE-LABEL: test_vupklsntob:
; CHECK-BE:       # %bb.0:
; CHECK-BE-NEXT:    vupklsntob 2, 2
; CHECK-BE-NEXT:    blr
  %res = call <16 x i8> @llvm.ppc.altivec.vupklsntob(<16 x i8> %a)
  ret <16 x i8> %res
}

define <16 x i8> @test_vupkint4tobf16_0(<16 x i8> %a) {
; CHECK-LE-LABEL: test_vupkint4tobf16_0:
; CHECK-LE:       # %bb.0:
; CHECK-LE-NEXT:    vupkint4tobf16 2, 2, 0
; CHECK-LE-NEXT:    blr
;
; CHECK-BE-LABEL: test_vupkint4tobf16_0:
; CHECK-BE:       # %bb.0:
; CHECK-BE-NEXT:    vupkint4tobf16 2, 2, 0
; CHECK-BE-NEXT:    blr
  %res = call <16 x i8> @llvm.ppc.altivec.vupkint4tobf16(<16 x i8> %a, i32 0)
  ret <16 x i8> %res
}

define <16 x i8> @test_vupkint4tobf16_3(<16 x i8> %a) {
; CHECK-LE-LABEL: test_vupkint4tobf16_3:
; CHECK-LE:       # %bb.0:
; CHECK-LE-NEXT:    vupkint4tobf16 2, 2, 3
; CHECK-LE-NEXT:    blr
;
; CHECK-BE-LABEL: test_vupkint4tobf16_3:
; CHECK-BE:       # %bb.0:
; CHECK-BE-NEXT:    vupkint4tobf16 2, 2, 3
; CHECK-BE-NEXT:    blr
  %res = call <16 x i8> @llvm.ppc.altivec.vupkint4tobf16(<16 x i8> %a, i32 3)
  ret <16 x i8> %res
}

define <16 x i8> @test_vupkint8tobf16_0(<16 x i8> %a) {
; CHECK-LE-LABEL: test_vupkint8tobf16_0:
; CHECK-LE:       # %bb.0:
; CHECK-LE-NEXT:    vupkint8tobf16 2, 2, 0
; CHECK-LE-NEXT:    blr
;
; CHECK-BE-LABEL: test_vupkint8tobf16_0:
; CHECK-BE:       # %bb.0:
; CHECK-BE-NEXT:    vupkint8tobf16 2, 2, 0
; CHECK-BE-NEXT:    blr
  %res = call <16 x i8> @llvm.ppc.altivec.vupkint8tobf16(<16 x i8> %a, i32 0)
  ret <16 x i8> %res
}

define <16 x i8> @test_vupkint8tobf16_1(<16 x i8> %a) {
; CHECK-LE-LABEL: test_vupkint8tobf16_1:
; CHECK-LE:       # %bb.0:
; CHECK-LE-NEXT:    vupkint8tobf16 2, 2, 1
; CHECK-LE-NEXT:    blr
;
; CHECK-BE-LABEL: test_vupkint8tobf16_1:
; CHECK-BE:       # %bb.0:
; CHECK-BE-NEXT:    vupkint8tobf16 2, 2, 1
; CHECK-BE-NEXT:    blr
  %res = call <16 x i8> @llvm.ppc.altivec.vupkint8tobf16(<16 x i8> %a, i32 1)
  ret <16 x i8> %res
}

define <16 x i8> @test_vupkint4tofp32_0(<16 x i8> %a) {
; CHECK-LE-LABEL: test_vupkint4tofp32_0:
; CHECK-LE:       # %bb.0:
; CHECK-LE-NEXT:    vupkint4tofp32 2, 2, 0
; CHECK-LE-NEXT:    blr
;
; CHECK-BE-LABEL: test_vupkint4tofp32_0:
; CHECK-BE:       # %bb.0:
; CHECK-BE-NEXT:    vupkint4tofp32 2, 2, 0
; CHECK-BE-NEXT:    blr
  %res = call <16 x i8> @llvm.ppc.altivec.vupkint4tofp32(<16 x i8> %a, i32 0)
  ret <16 x i8> %res
}

define <16 x i8> @test_vupkint4tofp32_7(<16 x i8> %a) {
; CHECK-LE-LABEL: test_vupkint4tofp32_7:
; CHECK-LE:       # %bb.0:
; CHECK-LE-NEXT:    vupkint4tofp32 2, 2, 7
; CHECK-LE-NEXT:    blr
;
; CHECK-BE-LABEL: test_vupkint4tofp32_7:
; CHECK-BE:       # %bb.0:
; CHECK-BE-NEXT:    vupkint4tofp32 2, 2, 7
; CHECK-BE-NEXT:    blr
  %res = call <16 x i8> @llvm.ppc.altivec.vupkint4tofp32(<16 x i8> %a, i32 7)
  ret <16 x i8> %res
}

define <16 x i8> @test_vupkint8tofp32_0(<16 x i8> %a) {
; CHECK-LE-LABEL: test_vupkint8tofp32_0:
; CHECK-LE:       # %bb.0:
; CHECK-LE-NEXT:    vupkint8tofp32 2, 2, 0
; CHECK-LE-NEXT:    blr
;
; CHECK-BE-LABEL: test_vupkint8tofp32_0:
; CHECK-BE:       # %bb.0:
; CHECK-BE-NEXT:    vupkint8tofp32 2, 2, 0
; CHECK-BE-NEXT:    blr
  %res = call <16 x i8> @llvm.ppc.altivec.vupkint8tofp32(<16 x i8> %a, i32 0)
  ret <16 x i8> %res
}

define <16 x i8> @test_vupkint8tofp32_3(<16 x i8> %a) {
; CHECK-LE-LABEL: test_vupkint8tofp32_3:
; CHECK-LE:       # %bb.0:
; CHECK-LE-NEXT:    vupkint8tofp32 2, 2, 3
; CHECK-LE-NEXT:    blr
;
; CHECK-BE-LABEL: test_vupkint8tofp32_3:
; CHECK-BE:       # %bb.0:
; CHECK-BE-NEXT:    vupkint8tofp32 2, 2, 3
; CHECK-BE-NEXT:    blr
  %res = call <16 x i8> @llvm.ppc.altivec.vupkint8tofp32(<16 x i8> %a, i32 3)
  ret <16 x i8> %res
}