| ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py |
| ; RUN: opt -S -mtriple=riscv64 -mattr=+zve32x -passes=loop-vectorize < %s | FileCheck %s |
| |
| define void @small_trip_count_min_vlen_128(ptr nocapture %a) nounwind vscale_range(4,1024) { |
| ; CHECK-LABEL: @small_trip_count_min_vlen_128( |
| ; CHECK-NEXT: entry: |
| ; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] |
| ; CHECK: vector.ph: |
| ; CHECK-NEXT: br label [[LOOP:%.*]] |
| ; CHECK: vector.body: |
| ; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds i32, ptr [[TMP0:%.*]], i32 0 |
| ; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, ptr [[TMP1]], align 4 |
| ; CHECK-NEXT: [[TMP2:%.*]] = add nsw <4 x i32> [[WIDE_LOAD]], splat (i32 1) |
| ; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds i32, ptr [[TMP0]], i32 0 |
| ; CHECK-NEXT: store <4 x i32> [[TMP2]], ptr [[TMP3]], align 4 |
| ; CHECK-NEXT: br label [[MIDDLE_BLOCK:%.*]] |
| ; CHECK: middle.block: |
| ; CHECK-NEXT: br i1 true, label [[EXIT:%.*]], label [[SCALAR_PH]] |
| ; CHECK: scalar.ph: |
| ; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i32 [ 4, [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ] |
| ; CHECK-NEXT: br label [[LOOP1:%.*]] |
| ; CHECK: loop: |
| ; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[IV_NEXT:%.*]], [[LOOP1]] ], [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ] |
| ; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds i32, ptr [[TMP0]], i32 [[IV]] |
| ; CHECK-NEXT: [[V:%.*]] = load i32, ptr [[GEP]], align 4 |
| ; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[V]], 1 |
| ; CHECK-NEXT: store i32 [[ADD]], ptr [[GEP]], align 4 |
| ; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV]], 1 |
| ; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[IV]], 3 |
| ; CHECK-NEXT: br i1 [[COND]], label [[EXIT]], label [[LOOP1]], !llvm.loop [[LOOP0:![0-9]+]] |
| ; CHECK: exit: |
| ; CHECK-NEXT: ret void |
| ; |
| entry: |
| br label %loop |
| |
| loop: |
| %iv = phi i32 [ %iv.next, %loop ], [ 0, %entry ] |
| %gep = getelementptr inbounds i32, ptr %a, i32 %iv |
| %v = load i32, ptr %gep, align 4 |
| %add = add nsw i32 %v, 1 |
| store i32 %add, ptr %gep, align 4 |
| %iv.next = add i32 %iv, 1 |
| %cond = icmp eq i32 %iv, 3 |
| br i1 %cond, label %exit, label %loop |
| |
| exit: |
| ret void |
| } |
| |
| define void @small_trip_count_min_vlen_32(ptr nocapture %a) nounwind vscale_range(1,1024) { |
| ; CHECK-LABEL: @small_trip_count_min_vlen_32( |
| ; CHECK-NEXT: entry: |
| ; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] |
| ; CHECK: vector.ph: |
| ; CHECK-NEXT: br label [[LOOP:%.*]] |
| ; CHECK: vector.body: |
| ; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds i32, ptr [[TMP0:%.*]], i32 0 |
| ; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, ptr [[TMP1]], align 4 |
| ; CHECK-NEXT: [[TMP2:%.*]] = add nsw <4 x i32> [[WIDE_LOAD]], splat (i32 1) |
| ; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds i32, ptr [[TMP0]], i32 0 |
| ; CHECK-NEXT: store <4 x i32> [[TMP2]], ptr [[TMP3]], align 4 |
| ; CHECK-NEXT: br label [[MIDDLE_BLOCK:%.*]] |
| ; CHECK: middle.block: |
| ; CHECK-NEXT: br i1 true, label [[EXIT:%.*]], label [[SCALAR_PH]] |
| ; CHECK: scalar.ph: |
| ; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i32 [ 4, [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ] |
| ; CHECK-NEXT: br label [[LOOP1:%.*]] |
| ; CHECK: loop: |
| ; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[IV_NEXT:%.*]], [[LOOP1]] ], [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ] |
| ; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds i32, ptr [[TMP0]], i32 [[IV]] |
| ; CHECK-NEXT: [[V:%.*]] = load i32, ptr [[GEP]], align 4 |
| ; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[V]], 1 |
| ; CHECK-NEXT: store i32 [[ADD]], ptr [[GEP]], align 4 |
| ; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV]], 1 |
| ; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[IV]], 3 |
| ; CHECK-NEXT: br i1 [[COND]], label [[EXIT]], label [[LOOP1]], !llvm.loop [[LOOP3:![0-9]+]] |
| ; CHECK: exit: |
| ; CHECK-NEXT: ret void |
| ; |
| entry: |
| br label %loop |
| |
| loop: |
| %iv = phi i32 [ %iv.next, %loop ], [ 0, %entry ] |
| %gep = getelementptr inbounds i32, ptr %a, i32 %iv |
| %v = load i32, ptr %gep, align 4 |
| %add = add nsw i32 %v, 1 |
| store i32 %add, ptr %gep, align 4 |
| %iv.next = add i32 %iv, 1 |
| %cond = icmp eq i32 %iv, 3 |
| br i1 %cond, label %exit, label %loop |
| |
| exit: |
| ret void |
| } |