llvm/test/CodeGen/RISCV/rvv/rvv-peephole-vmerge-to-vmv.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 3
# RUN: llc %s -o - -mtriple=riscv64 -mattr=+v -run-pass=riscv-vector-peephole \
# RUN:     -verify-machineinstrs | FileCheck %s

---
name: undef_passthru
body: |
  bb.0:
    liveins: $x1, $v8, $v9
    ; CHECK-LABEL: name: undef_passthru
    ; CHECK: liveins: $x1, $v8, $v9
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %false:vr = COPY $v8
    ; CHECK-NEXT: %true:vr = COPY $v9
    ; CHECK-NEXT: %avl:gprnox0 = COPY $x1
    ; CHECK-NEXT: %mask:vmv0 = PseudoVMSET_M_B8 %avl, 0 /* e8 */
    ; CHECK-NEXT: $v0 = COPY %mask
    %false:vr = COPY $v8
    %true:vr = COPY $v9
    %avl:gprnox0 = COPY $x1
    %mask:vmv0 = PseudoVMSET_M_B8 %avl, 0
    $v0 = COPY %mask
    %x:vrnov0 = PseudoVMERGE_VVM_M1 $noreg, %false, %true, $v0, %avl, 5
...
---
name: undef_false
body: |
  bb.0:
    liveins: $x1, $v8, $v9
    ; CHECK-LABEL: name: undef_false
    ; CHECK: liveins: $x1, $v8, $v9
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %pt:vr = COPY $v8
    ; CHECK-NEXT: %false:vr = COPY $noreg
    ; CHECK-NEXT: %true:vr = COPY $v9
    ; CHECK-NEXT: %avl:gprnox0 = COPY $x1
    ; CHECK-NEXT: %mask:vmv0 = PseudoVMSET_M_B8 %avl, 0 /* e8 */
    ; CHECK-NEXT: $v0 = COPY %mask
    ; CHECK-NEXT: %x:vr = PseudoVMV_V_V_M1 %pt, %true, %avl, 5 /* e32 */, 0 /* tu, mu */
    %pt:vrnov0 = COPY $v8
    %false:vr = COPY $noreg
    %true:vr = COPY $v9
    %avl:gprnox0 = COPY $x1
    %mask:vmv0 = PseudoVMSET_M_B8 %avl, 0
    $v0 = COPY %mask
    %x:vrnov0 = PseudoVMERGE_VVM_M1 %pt, %false, %true, $v0, %avl, 5
...
---
name: equal_passthru_false
body: |
  bb.0:
    liveins: $x1, $v8, $v9
    ; CHECK-LABEL: name: equal_passthru_false
    ; CHECK: liveins: $x1, $v8, $v9
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %false:vr = COPY $v8
    ; CHECK-NEXT: %pt:vr = COPY $v8
    ; CHECK-NEXT: %true:vr = COPY $v9
    ; CHECK-NEXT: %avl:gprnox0 = COPY $x1
    ; CHECK-NEXT: %mask:vmv0 = PseudoVMSET_M_B8 %avl, 0 /* e8 */
    ; CHECK-NEXT: %x:vr = PseudoVMV_V_V_M1 %pt, %true, %avl, 5 /* e32 */, 0 /* tu, mu */
    %false:vr = COPY $v8
    %pt:vrnov0 = COPY $v8
    %true:vr = COPY $v9
    %avl:gprnox0 = COPY $x1
    %mask:vmv0 = PseudoVMSET_M_B8 %avl, 0
    %x:vrnov0 = PseudoVMERGE_VVM_M1 %pt, %false, %true, %mask, %avl, 5
...
---
name: same_mask
body: |
  bb.0:
    liveins: $v8, $v9, $v0
    ; CHECK-LABEL: name: same_mask
    ; CHECK: liveins: $v8, $v9, $v0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %pt:vr = COPY $v8
    ; CHECK-NEXT: %false:vrnov0 = COPY $v9
    ; CHECK-NEXT: %mask:vmv0 = COPY $v0
    ; CHECK-NEXT: %true:vrnov0 = PseudoVADD_VV_M1_MASK %false, $noreg, $noreg, %mask, 4, 5 /* e32 */, 0 /* tu, mu */
    ; CHECK-NEXT: %x:vr = PseudoVMV_V_V_M1 %pt, %true, 8, 5 /* e32 */, 0 /* tu, mu */
    %pt:vrnov0 = COPY $v8
    %false:vrnov0 = COPY $v9
    %mask:vmv0 = COPY $v0
    %true:vrnov0 = PseudoVADD_VV_M1_MASK %false, $noreg, $noreg, %mask, 4, 5 /* e32 */, 0 /* tu, mu */
    %x:vrnov0 = PseudoVMERGE_VVM_M1 %pt, %false, %true, %mask, 8, 5 /* e32 */
...
---
# Shouldn't be converted because false operands are different
name: same_mask_different_false
body: |
  bb.0:
    liveins: $v8, $v9, $v0
    ; CHECK-LABEL: name: same_mask_different_false
    ; CHECK: liveins: $v8, $v9, $v0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %pt:vrnov0 = COPY $v8
    ; CHECK-NEXT: %false:vrnov0 = COPY $v9
    ; CHECK-NEXT: %mask:vmv0 = COPY $v0
    ; CHECK-NEXT: %true:vrnov0 = PseudoVADD_VV_M1_MASK %pt, $noreg, $noreg, %mask, 4, 5 /* e32 */, 0 /* tu, mu */
    ; CHECK-NEXT: %x:vrnov0 = PseudoVMERGE_VVM_M1 %pt, %false, %true, %mask, 8, 5 /* e32 */
    %pt:vrnov0 = COPY $v8
    %false:vrnov0 = COPY $v9
    %mask:vmv0 = COPY $v0
    %true:vrnov0 = PseudoVADD_VV_M1_MASK %pt, $noreg, $noreg, %mask, 4, 5 /* e32 */, 0 /* tu, mu */
    %x:vrnov0 = PseudoVMERGE_VVM_M1 %pt, %false, %true, %mask, 8, 5 /* e32 */
...
---
# Shouldn't be converted because EEWs are different
name: same_mask_different_eew
body: |
  bb.0:
    liveins: $v8, $v9, $v0
    ; CHECK-LABEL: name: same_mask_different_eew
    ; CHECK: liveins: $v8, $v9, $v0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %pt:vrnov0 = COPY $v8
    ; CHECK-NEXT: %false:vrnov0 = COPY $v9
    ; CHECK-NEXT: %mask:vmv0 = COPY $v0
    ; CHECK-NEXT: %true:vrnov0 = PseudoVADD_VV_M1_MASK %false, $noreg, $noreg, %mask, 4, 4 /* e16 */, 0 /* tu, mu */
    ; CHECK-NEXT: %x:vrnov0 = PseudoVMERGE_VVM_M1 %pt, %false, %true, %mask, 8, 5 /* e32 */
    %pt:vrnov0 = COPY $v8
    %false:vrnov0 = COPY $v9
    %mask:vmv0 = COPY $v0
    %true:vrnov0 = PseudoVADD_VV_M1_MASK %false, $noreg, $noreg, %mask, 4, 4 /* e16 */, 0 /* tu, mu */
    %x:vrnov0 = PseudoVMERGE_VVM_M1 %pt, %false, %true, %mask, 8, 5 /* e32 */
...
---
name: same_mask_undef_truepassthru
body: |
  bb.0:
    liveins: $v8, $v0
    ; CHECK-LABEL: name: same_mask_undef_truepassthru
    ; CHECK: liveins: $v8, $v0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %false:vrnov0 = COPY $v8
    ; CHECK-NEXT: %mask:vmv0 = COPY $v0
    ; CHECK-NEXT: %true:vrnov0 = PseudoVADD_VV_M1_MASK %false, $noreg, $noreg, %mask, 4, 5 /* e32 */, 1 /* ta, mu */
    %false:vr = COPY $v8
    %mask:vmv0 = COPY $v0
    %true:vrnov0 = PseudoVADD_VV_M1_MASK $noreg, $noreg, $noreg, %mask, 4, 5 /* e32 */, 0 /* tu, mu */
    %x:vrnov0 = PseudoVMERGE_VVM_M1 $noreg, %false, %true, %mask, 4, 5 /* e32 */
...
---
# Shouldn't be converted because true is in a different block
name: same_mask_diff_blocks
body: |
  ; CHECK-LABEL: name: same_mask_diff_blocks
  ; CHECK: bb.0:
  ; CHECK-NEXT:   successors: %bb.1(0x80000000)
  ; CHECK-NEXT:   liveins: $v8, $v0
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   %false:vr = COPY $v8
  ; CHECK-NEXT:   %mask:vmv0 = COPY $v0
  ; CHECK-NEXT:   %true:vrnov0 = PseudoVADD_VV_M1_MASK $noreg, $noreg, $noreg, %mask, 4, 5 /* e32 */, 0 /* tu, mu */
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.1:
  ; CHECK-NEXT:   [[PseudoVMERGE_VVM_M1_:%[0-9]+]]:vrnov0 = PseudoVMERGE_VVM_M1 $noreg, %false, %true, %mask, 4, 5 /* e32 */
  bb.0:
    liveins: $v8, $v0
    %false:vr = COPY $v8
    %mask:vmv0 = COPY $v0
    %true:vrnov0 = PseudoVADD_VV_M1_MASK $noreg, $noreg, $noreg, %mask, 4, 5 /* e32 */, 0 /* tu, mu */
  bb.1:
    %5:vrnov0 = PseudoVMERGE_VVM_M1 $noreg, %false, %true, %mask, 4, 5 /* e32 */