| # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py |
| # RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -run-pass=legalizer -verify-machineinstrs -global-isel-abort=2 %s -o - | FileCheck %s |
| |
| --- |
| name: test_phi_s32 |
| tracksRegLiveness: true |
| |
| body: | |
| ; CHECK-LABEL: name: test_phi_s32 |
| ; CHECK: bb.0: |
| ; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000) |
| ; CHECK: liveins: $vgpr0, $vgpr1 |
| ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 |
| ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 |
| ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 |
| ; CHECK: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]] |
| ; CHECK: G_BRCOND [[ICMP]](s1), %bb.1 |
| ; CHECK: G_BR %bb.2 |
| ; CHECK: bb.1: |
| ; CHECK: successors: %bb.2(0x80000000) |
| ; CHECK: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[COPY]], [[COPY]] |
| ; CHECK: G_BR %bb.2 |
| ; CHECK: bb.2: |
| ; CHECK: [[PHI:%[0-9]+]]:_(s32) = G_PHI [[COPY]](s32), %bb.0, [[ADD]](s32), %bb.1 |
| ; CHECK: $vgpr0 = COPY [[PHI]](s32) |
| ; CHECK: S_SETPC_B64 undef $sgpr30_sgpr31 |
| bb.0: |
| successors: %bb.1, %bb.2 |
| liveins: $vgpr0, $vgpr1 |
| |
| %0:_(s32) = COPY $vgpr0 |
| %1:_(s32) = COPY $vgpr1 |
| %2:_(s32) = G_CONSTANT i32 0 |
| %3:_(s1) = G_ICMP intpred(eq), %1, %2 |
| G_BRCOND %3, %bb.1 |
| G_BR %bb.2 |
| |
| bb.1: |
| successors: %bb.2 |
| |
| %4:_(s32) = G_ADD %0, %0 |
| G_BR %bb.2 |
| |
| bb.2: |
| %5:_(s32) = G_PHI %0, %bb.0, %4, %bb.1 |
| $vgpr0 = COPY %5 |
| S_SETPC_B64 undef $sgpr30_sgpr31 |
| |
| ... |
| --- |
| name: test_phi_v2s16 |
| tracksRegLiveness: true |
| |
| body: | |
| ; CHECK-LABEL: name: test_phi_v2s16 |
| ; CHECK: bb.0: |
| ; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000) |
| ; CHECK: liveins: $vgpr0, $vgpr1 |
| ; CHECK: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0 |
| ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 |
| ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 |
| ; CHECK: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]] |
| ; CHECK: G_BRCOND [[ICMP]](s1), %bb.1 |
| ; CHECK: G_BR %bb.2 |
| ; CHECK: bb.1: |
| ; CHECK: successors: %bb.2(0x80000000) |
| ; CHECK: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[COPY]](<2 x s16>) |
| ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 |
| ; CHECK: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C1]](s32) |
| ; CHECK: [[BITCAST1:%[0-9]+]]:_(s32) = G_BITCAST [[COPY]](<2 x s16>) |
| ; CHECK: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST1]], [[C1]](s32) |
| ; CHECK: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[BITCAST]], [[BITCAST1]] |
| ; CHECK: [[ADD1:%[0-9]+]]:_(s32) = G_ADD [[LSHR]], [[LSHR1]] |
| ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 |
| ; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[ADD]], [[C2]] |
| ; CHECK: [[AND1:%[0-9]+]]:_(s32) = G_AND [[ADD1]], [[C2]] |
| ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C1]](s32) |
| ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] |
| ; CHECK: [[BITCAST2:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32) |
| ; CHECK: G_BR %bb.2 |
| ; CHECK: bb.2: |
| ; CHECK: [[PHI:%[0-9]+]]:_(<2 x s16>) = G_PHI [[COPY]](<2 x s16>), %bb.0, [[BITCAST2]](<2 x s16>), %bb.1 |
| ; CHECK: $vgpr0 = COPY [[PHI]](<2 x s16>) |
| ; CHECK: S_SETPC_B64 undef $sgpr30_sgpr31 |
| bb.0: |
| successors: %bb.1, %bb.2 |
| liveins: $vgpr0, $vgpr1 |
| |
| %0:_(<2 x s16>) = COPY $vgpr0 |
| %1:_(s32) = COPY $vgpr1 |
| %2:_(s32) = G_CONSTANT i32 0 |
| %3:_(s1) = G_ICMP intpred(eq), %1, %2 |
| G_BRCOND %3, %bb.1 |
| G_BR %bb.2 |
| |
| bb.1: |
| successors: %bb.2 |
| |
| %5:_(<2 x s16>) = G_ADD %0, %0 |
| G_BR %bb.2 |
| |
| bb.2: |
| %6:_(<2 x s16>) = G_PHI %0, %bb.0, %5, %bb.1 |
| $vgpr0 = COPY %6 |
| S_SETPC_B64 undef $sgpr30_sgpr31 |
| ... |
| |
| --- |
| name: test_phi_v3s16 |
| tracksRegLiveness: true |
| |
| body: | |
| ; CHECK-LABEL: name: test_phi_v3s16 |
| ; CHECK: bb.0: |
| ; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000) |
| ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2 |
| ; CHECK: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1 |
| ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2 |
| ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 |
| ; CHECK: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]] |
| ; CHECK: [[EXTRACT:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[COPY]](<4 x s16>), 0 |
| ; CHECK: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF |
| ; CHECK: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF]], [[EXTRACT]](<3 x s16>), 0 |
| ; CHECK: G_BRCOND [[ICMP]](s1), %bb.1 |
| ; CHECK: G_BR %bb.2 |
| ; CHECK: bb.1: |
| ; CHECK: successors: %bb.2(0x80000000) |
| ; CHECK: [[DEF1:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF |
| ; CHECK: [[INSERT1:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[EXTRACT]](<3 x s16>), 0 |
| ; CHECK: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[INSERT1]](<4 x s16>) |
| ; CHECK: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[UV]](<2 x s16>) |
| ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 |
| ; CHECK: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C1]](s32) |
| ; CHECK: [[BITCAST1:%[0-9]+]]:_(s32) = G_BITCAST [[UV1]](<2 x s16>) |
| ; CHECK: [[INSERT2:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[EXTRACT]](<3 x s16>), 0 |
| ; CHECK: [[UV2:%[0-9]+]]:_(<2 x s16>), [[UV3:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[INSERT2]](<4 x s16>) |
| ; CHECK: [[BITCAST2:%[0-9]+]]:_(s32) = G_BITCAST [[UV2]](<2 x s16>) |
| ; CHECK: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST2]], [[C1]](s32) |
| ; CHECK: [[BITCAST3:%[0-9]+]]:_(s32) = G_BITCAST [[UV3]](<2 x s16>) |
| ; CHECK: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[BITCAST]], [[BITCAST2]] |
| ; CHECK: [[ADD1:%[0-9]+]]:_(s32) = G_ADD [[LSHR]], [[LSHR1]] |
| ; CHECK: [[ADD2:%[0-9]+]]:_(s32) = G_ADD [[BITCAST1]], [[BITCAST3]] |
| ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 |
| ; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[ADD]], [[C2]] |
| ; CHECK: [[AND1:%[0-9]+]]:_(s32) = G_AND [[ADD1]], [[C2]] |
| ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C1]](s32) |
| ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] |
| ; CHECK: [[BITCAST4:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32) |
| ; CHECK: [[AND2:%[0-9]+]]:_(s32) = G_AND [[ADD2]], [[C2]] |
| ; CHECK: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 |
| ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[C3]], [[C1]](s32) |
| ; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] |
| ; CHECK: [[BITCAST5:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR1]](s32) |
| ; CHECK: [[DEF2:%[0-9]+]]:_(<2 x s16>) = G_IMPLICIT_DEF |
| ; CHECK: [[CONCAT_VECTORS:%[0-9]+]]:_(<6 x s16>) = G_CONCAT_VECTORS [[BITCAST4]](<2 x s16>), [[BITCAST5]](<2 x s16>), [[DEF2]](<2 x s16>) |
| ; CHECK: [[UV4:%[0-9]+]]:_(<3 x s16>), [[UV5:%[0-9]+]]:_(<3 x s16>) = G_UNMERGE_VALUES [[CONCAT_VECTORS]](<6 x s16>) |
| ; CHECK: [[INSERT3:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[UV4]](<3 x s16>), 0 |
| ; CHECK: G_BR %bb.2 |
| ; CHECK: bb.2: |
| ; CHECK: [[PHI:%[0-9]+]]:_(<4 x s16>) = G_PHI [[INSERT]](<4 x s16>), %bb.0, [[INSERT3]](<4 x s16>), %bb.1 |
| ; CHECK: [[DEF3:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF |
| ; CHECK: [[UV6:%[0-9]+]]:_(<2 x s16>), [[UV7:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[PHI]](<4 x s16>) |
| ; CHECK: [[BITCAST6:%[0-9]+]]:_(s32) = G_BITCAST [[UV6]](<2 x s16>) |
| ; CHECK: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 |
| ; CHECK: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST6]], [[C4]](s32) |
| ; CHECK: [[BITCAST7:%[0-9]+]]:_(s32) = G_BITCAST [[UV7]](<2 x s16>) |
| ; CHECK: [[UV8:%[0-9]+]]:_(<2 x s16>), [[UV9:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[DEF3]](<4 x s16>) |
| ; CHECK: [[BITCAST8:%[0-9]+]]:_(s32) = G_BITCAST [[UV8]](<2 x s16>) |
| ; CHECK: [[LSHR3:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST8]], [[C4]](s32) |
| ; CHECK: [[BITCAST9:%[0-9]+]]:_(s32) = G_BITCAST [[UV9]](<2 x s16>) |
| ; CHECK: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 |
| ; CHECK: [[AND3:%[0-9]+]]:_(s32) = G_AND [[BITCAST6]], [[C5]] |
| ; CHECK: [[AND4:%[0-9]+]]:_(s32) = G_AND [[LSHR2]], [[C5]] |
| ; CHECK: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND4]], [[C4]](s32) |
| ; CHECK: [[OR2:%[0-9]+]]:_(s32) = G_OR [[AND3]], [[SHL2]] |
| ; CHECK: [[BITCAST10:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR2]](s32) |
| ; CHECK: [[AND5:%[0-9]+]]:_(s32) = G_AND [[BITCAST7]], [[C5]] |
| ; CHECK: [[AND6:%[0-9]+]]:_(s32) = G_AND [[BITCAST8]], [[C5]] |
| ; CHECK: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C4]](s32) |
| ; CHECK: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND5]], [[SHL3]] |
| ; CHECK: [[BITCAST11:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR3]](s32) |
| ; CHECK: [[AND7:%[0-9]+]]:_(s32) = G_AND [[LSHR3]], [[C5]] |
| ; CHECK: [[AND8:%[0-9]+]]:_(s32) = G_AND [[BITCAST9]], [[C5]] |
| ; CHECK: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND8]], [[C4]](s32) |
| ; CHECK: [[OR4:%[0-9]+]]:_(s32) = G_OR [[AND7]], [[SHL4]] |
| ; CHECK: [[BITCAST12:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR4]](s32) |
| ; CHECK: [[CONCAT_VECTORS1:%[0-9]+]]:_(<6 x s16>) = G_CONCAT_VECTORS [[BITCAST10]](<2 x s16>), [[BITCAST11]](<2 x s16>), [[BITCAST12]](<2 x s16>) |
| ; CHECK: $vgpr0_vgpr1_vgpr2 = COPY [[CONCAT_VECTORS1]](<6 x s16>) |
| ; CHECK: S_SETPC_B64 undef $sgpr30_sgpr31 |
| bb.0: |
| successors: %bb.1, %bb.2 |
| liveins: $vgpr0_vgpr1, $vgpr2 |
| |
| %0:_(<4 x s16>) = COPY $vgpr0_vgpr1 |
| %1:_(s32) = COPY $vgpr2 |
| %2:_(s32) = G_CONSTANT i32 0 |
| %3:_(s1) = G_ICMP intpred(eq), %1, %2 |
| %4:_(<3 x s16>) = G_EXTRACT %0, 0 |
| G_BRCOND %3, %bb.1 |
| G_BR %bb.2 |
| |
| bb.1: |
| successors: %bb.2 |
| |
| %5:_(<3 x s16>) = G_ADD %4, %4 |
| G_BR %bb.2 |
| |
| bb.2: |
| %6:_(<3 x s16>) = G_PHI %4, %bb.0, %5, %bb.1 |
| %7:_(<3 x s16>) = G_IMPLICIT_DEF |
| %8:_(<6 x s16>) = G_CONCAT_VECTORS %6, %7 |
| $vgpr0_vgpr1_vgpr2 = COPY %8 |
| S_SETPC_B64 undef $sgpr30_sgpr31 |
| ... |
| |
| --- |
| |
| name: test_phi_v4s16 |
| tracksRegLiveness: true |
| |
| body: | |
| ; CHECK-LABEL: name: test_phi_v4s16 |
| ; CHECK: bb.0: |
| ; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000) |
| ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2 |
| ; CHECK: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1 |
| ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2 |
| ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 |
| ; CHECK: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]] |
| ; CHECK: G_BRCOND [[ICMP]](s1), %bb.1 |
| ; CHECK: G_BR %bb.2 |
| ; CHECK: bb.1: |
| ; CHECK: successors: %bb.2(0x80000000) |
| ; CHECK: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<4 x s16>) |
| ; CHECK: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[UV]](<2 x s16>) |
| ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 |
| ; CHECK: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C1]](s32) |
| ; CHECK: [[BITCAST1:%[0-9]+]]:_(s32) = G_BITCAST [[UV1]](<2 x s16>) |
| ; CHECK: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST1]], [[C1]](s32) |
| ; CHECK: [[UV2:%[0-9]+]]:_(<2 x s16>), [[UV3:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<4 x s16>) |
| ; CHECK: [[BITCAST2:%[0-9]+]]:_(s32) = G_BITCAST [[UV2]](<2 x s16>) |
| ; CHECK: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST2]], [[C1]](s32) |
| ; CHECK: [[BITCAST3:%[0-9]+]]:_(s32) = G_BITCAST [[UV3]](<2 x s16>) |
| ; CHECK: [[LSHR3:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST3]], [[C1]](s32) |
| ; CHECK: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[BITCAST]], [[BITCAST2]] |
| ; CHECK: [[ADD1:%[0-9]+]]:_(s32) = G_ADD [[LSHR]], [[LSHR2]] |
| ; CHECK: [[ADD2:%[0-9]+]]:_(s32) = G_ADD [[BITCAST1]], [[BITCAST3]] |
| ; CHECK: [[ADD3:%[0-9]+]]:_(s32) = G_ADD [[LSHR1]], [[LSHR3]] |
| ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 |
| ; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[ADD]], [[C2]] |
| ; CHECK: [[AND1:%[0-9]+]]:_(s32) = G_AND [[ADD1]], [[C2]] |
| ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C1]](s32) |
| ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] |
| ; CHECK: [[BITCAST4:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32) |
| ; CHECK: [[AND2:%[0-9]+]]:_(s32) = G_AND [[ADD2]], [[C2]] |
| ; CHECK: [[AND3:%[0-9]+]]:_(s32) = G_AND [[ADD3]], [[C2]] |
| ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C1]](s32) |
| ; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] |
| ; CHECK: [[BITCAST5:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR1]](s32) |
| ; CHECK: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BITCAST4]](<2 x s16>), [[BITCAST5]](<2 x s16>) |
| ; CHECK: G_BR %bb.2 |
| ; CHECK: bb.2: |
| ; CHECK: [[PHI:%[0-9]+]]:_(<4 x s16>) = G_PHI [[COPY]](<4 x s16>), %bb.0, [[CONCAT_VECTORS]](<4 x s16>), %bb.1 |
| ; CHECK: $vgpr0_vgpr1 = COPY [[PHI]](<4 x s16>) |
| ; CHECK: S_SETPC_B64 undef $sgpr30_sgpr31 |
| bb.0: |
| successors: %bb.1, %bb.2 |
| liveins: $vgpr0_vgpr1, $vgpr2 |
| |
| %0:_(<4 x s16>) = COPY $vgpr0_vgpr1 |
| %1:_(s32) = COPY $vgpr2 |
| %2:_(s32) = G_CONSTANT i32 0 |
| %3:_(s1) = G_ICMP intpred(eq), %1, %2 |
| G_BRCOND %3, %bb.1 |
| G_BR %bb.2 |
| |
| bb.1: |
| successors: %bb.2 |
| |
| %4:_(<4 x s16>) = G_ADD %0, %0 |
| G_BR %bb.2 |
| |
| bb.2: |
| %5:_(<4 x s16>) = G_PHI %0, %bb.0, %4, %bb.1 |
| $vgpr0_vgpr1 = COPY %5 |
| S_SETPC_B64 undef $sgpr30_sgpr31 |
| |
| ... |
| --- |
| name: test_phi_v2s32 |
| tracksRegLiveness: true |
| |
| body: | |
| ; CHECK-LABEL: name: test_phi_v2s32 |
| ; CHECK: bb.0: |
| ; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000) |
| ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2 |
| ; CHECK: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1 |
| ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2 |
| ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 |
| ; CHECK: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]] |
| ; CHECK: G_BRCOND [[ICMP]](s1), %bb.1 |
| ; CHECK: G_BR %bb.2 |
| ; CHECK: bb.1: |
| ; CHECK: successors: %bb.2(0x80000000) |
| ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>) |
| ; CHECK: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>) |
| ; CHECK: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[UV]], [[UV2]] |
| ; CHECK: [[ADD1:%[0-9]+]]:_(s32) = G_ADD [[UV1]], [[UV3]] |
| ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[ADD]](s32), [[ADD1]](s32) |
| ; CHECK: G_BR %bb.2 |
| ; CHECK: bb.2: |
| ; CHECK: [[PHI:%[0-9]+]]:_(<2 x s32>) = G_PHI [[COPY]](<2 x s32>), %bb.0, [[BUILD_VECTOR]](<2 x s32>), %bb.1 |
| ; CHECK: $vgpr0_vgpr1 = COPY [[PHI]](<2 x s32>) |
| ; CHECK: S_SETPC_B64 undef $sgpr30_sgpr31 |
| bb.0: |
| successors: %bb.1, %bb.2 |
| liveins: $vgpr0_vgpr1, $vgpr2 |
| |
| %0:_(<2 x s32>) = COPY $vgpr0_vgpr1 |
| %1:_(s32) = COPY $vgpr2 |
| %2:_(s32) = G_CONSTANT i32 0 |
| %3:_(s1) = G_ICMP intpred(eq), %1, %2 |
| G_BRCOND %3, %bb.1 |
| G_BR %bb.2 |
| |
| bb.1: |
| successors: %bb.2 |
| |
| %4:_(<2 x s32>) = G_ADD %0, %0 |
| G_BR %bb.2 |
| |
| bb.2: |
| %5:_(<2 x s32>) = G_PHI %0, %bb.0, %4, %bb.1 |
| $vgpr0_vgpr1 = COPY %5 |
| S_SETPC_B64 undef $sgpr30_sgpr31 |
| |
| ... |
| --- |
| name: test_phi_v3s32 |
| tracksRegLiveness: true |
| |
| body: | |
| ; CHECK-LABEL: name: test_phi_v3s32 |
| ; CHECK: bb.0: |
| ; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000) |
| ; CHECK: liveins: $vgpr0_vgpr1_vgpr2, $vgpr3 |
| ; CHECK: [[COPY:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2 |
| ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr3 |
| ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 |
| ; CHECK: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]] |
| ; CHECK: G_BRCOND [[ICMP]](s1), %bb.1 |
| ; CHECK: G_BR %bb.2 |
| ; CHECK: bb.1: |
| ; CHECK: successors: %bb.2(0x80000000) |
| ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<3 x s32>) |
| ; CHECK: [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<3 x s32>) |
| ; CHECK: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[UV]], [[UV3]] |
| ; CHECK: [[ADD1:%[0-9]+]]:_(s32) = G_ADD [[UV1]], [[UV4]] |
| ; CHECK: [[ADD2:%[0-9]+]]:_(s32) = G_ADD [[UV2]], [[UV5]] |
| ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[ADD]](s32), [[ADD1]](s32), [[ADD2]](s32) |
| ; CHECK: G_BR %bb.2 |
| ; CHECK: bb.2: |
| ; CHECK: [[PHI:%[0-9]+]]:_(<3 x s32>) = G_PHI [[COPY]](<3 x s32>), %bb.0, [[BUILD_VECTOR]](<3 x s32>), %bb.1 |
| ; CHECK: $vgpr0_vgpr1_vgpr2 = COPY [[PHI]](<3 x s32>) |
| ; CHECK: S_SETPC_B64 undef $sgpr30_sgpr31 |
| bb.0: |
| successors: %bb.1, %bb.2 |
| liveins: $vgpr0_vgpr1_vgpr2, $vgpr3 |
| |
| %0:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2 |
| %1:_(s32) = COPY $vgpr3 |
| %2:_(s32) = G_CONSTANT i32 0 |
| %3:_(s1) = G_ICMP intpred(eq), %1, %2 |
| G_BRCOND %3, %bb.1 |
| G_BR %bb.2 |
| |
| bb.1: |
| successors: %bb.2 |
| |
| %4:_(<3 x s32>) = G_ADD %0, %0 |
| G_BR %bb.2 |
| |
| bb.2: |
| %5:_(<3 x s32>) = G_PHI %0, %bb.0, %4, %bb.1 |
| $vgpr0_vgpr1_vgpr2 = COPY %5 |
| S_SETPC_B64 undef $sgpr30_sgpr31 |
| |
| ... |
| --- |
| name: test_phi_v4s32 |
| tracksRegLiveness: true |
| |
| body: | |
| ; CHECK-LABEL: name: test_phi_v4s32 |
| ; CHECK: bb.0: |
| ; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000) |
| ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4 |
| ; CHECK: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 |
| ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr4 |
| ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 |
| ; CHECK: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]] |
| ; CHECK: G_BRCOND [[ICMP]](s1), %bb.1 |
| ; CHECK: G_BR %bb.2 |
| ; CHECK: bb.1: |
| ; CHECK: successors: %bb.2(0x80000000) |
| ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<4 x s32>) |
| ; CHECK: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32), [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<4 x s32>) |
| ; CHECK: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[UV]], [[UV4]] |
| ; CHECK: [[ADD1:%[0-9]+]]:_(s32) = G_ADD [[UV1]], [[UV5]] |
| ; CHECK: [[ADD2:%[0-9]+]]:_(s32) = G_ADD [[UV2]], [[UV6]] |
| ; CHECK: [[ADD3:%[0-9]+]]:_(s32) = G_ADD [[UV3]], [[UV7]] |
| ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[ADD]](s32), [[ADD1]](s32), [[ADD2]](s32), [[ADD3]](s32) |
| ; CHECK: G_BR %bb.2 |
| ; CHECK: bb.2: |
| ; CHECK: [[PHI:%[0-9]+]]:_(<4 x s32>) = G_PHI [[COPY]](<4 x s32>), %bb.0, [[BUILD_VECTOR]](<4 x s32>), %bb.1 |
| ; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[PHI]](<4 x s32>) |
| ; CHECK: S_SETPC_B64 undef $sgpr30_sgpr31 |
| bb.0: |
| successors: %bb.1, %bb.2 |
| liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4 |
| |
| %0:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 |
| %1:_(s32) = COPY $vgpr4 |
| %2:_(s32) = G_CONSTANT i32 0 |
| %3:_(s1) = G_ICMP intpred(eq), %1, %2 |
| G_BRCOND %3, %bb.1 |
| G_BR %bb.2 |
| |
| bb.1: |
| successors: %bb.2 |
| |
| %4:_(<4 x s32>) = G_ADD %0, %0 |
| G_BR %bb.2 |
| |
| bb.2: |
| %5:_(<4 x s32>) = G_PHI %0, %bb.0, %4, %bb.1 |
| $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %5 |
| S_SETPC_B64 undef $sgpr30_sgpr31 |
| |
| ... |
| --- |
| name: test_phi_v8s32 |
| tracksRegLiveness: true |
| |
| body: | |
| ; CHECK-LABEL: name: test_phi_v8s32 |
| ; CHECK: bb.0: |
| ; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000) |
| ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7, $vgpr8 |
| ; CHECK: [[COPY:%[0-9]+]]:_(<8 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 |
| ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr8 |
| ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 |
| ; CHECK: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]] |
| ; CHECK: G_BRCOND [[ICMP]](s1), %bb.1 |
| ; CHECK: G_BR %bb.2 |
| ; CHECK: bb.1: |
| ; CHECK: successors: %bb.2(0x80000000) |
| ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32), [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<8 x s32>) |
| ; CHECK: [[UV8:%[0-9]+]]:_(s32), [[UV9:%[0-9]+]]:_(s32), [[UV10:%[0-9]+]]:_(s32), [[UV11:%[0-9]+]]:_(s32), [[UV12:%[0-9]+]]:_(s32), [[UV13:%[0-9]+]]:_(s32), [[UV14:%[0-9]+]]:_(s32), [[UV15:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<8 x s32>) |
| ; CHECK: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[UV]], [[UV8]] |
| ; CHECK: [[ADD1:%[0-9]+]]:_(s32) = G_ADD [[UV1]], [[UV9]] |
| ; CHECK: [[ADD2:%[0-9]+]]:_(s32) = G_ADD [[UV2]], [[UV10]] |
| ; CHECK: [[ADD3:%[0-9]+]]:_(s32) = G_ADD [[UV3]], [[UV11]] |
| ; CHECK: [[ADD4:%[0-9]+]]:_(s32) = G_ADD [[UV4]], [[UV12]] |
| ; CHECK: [[ADD5:%[0-9]+]]:_(s32) = G_ADD [[UV5]], [[UV13]] |
| ; CHECK: [[ADD6:%[0-9]+]]:_(s32) = G_ADD [[UV6]], [[UV14]] |
| ; CHECK: [[ADD7:%[0-9]+]]:_(s32) = G_ADD [[UV7]], [[UV15]] |
| ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[ADD]](s32), [[ADD1]](s32), [[ADD2]](s32), [[ADD3]](s32), [[ADD4]](s32), [[ADD5]](s32), [[ADD6]](s32), [[ADD7]](s32) |
| ; CHECK: G_BR %bb.2 |
| ; CHECK: bb.2: |
| ; CHECK: [[PHI:%[0-9]+]]:_(<8 x s32>) = G_PHI [[COPY]](<8 x s32>), %bb.0, [[BUILD_VECTOR]](<8 x s32>), %bb.1 |
| ; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[PHI]](<8 x s32>) |
| ; CHECK: S_SETPC_B64 undef $sgpr30_sgpr31 |
| bb.0: |
| successors: %bb.1, %bb.2 |
| liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7, $vgpr8 |
| |
| %0:_(<8 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 |
| %1:_(s32) = COPY $vgpr8 |
| %2:_(s32) = G_CONSTANT i32 0 |
| %3:_(s1) = G_ICMP intpred(eq), %1, %2 |
| G_BRCOND %3, %bb.1 |
| G_BR %bb.2 |
| |
| bb.1: |
| successors: %bb.2 |
| |
| %4:_(<8 x s32>) = G_ADD %0, %0 |
| G_BR %bb.2 |
| |
| bb.2: |
| %5:_(<8 x s32>) = G_PHI %0, %bb.0, %4, %bb.1 |
| $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY %5 |
| S_SETPC_B64 undef $sgpr30_sgpr31 |
| |
| ... |
| --- |
| name: test_phi_v16s32 |
| tracksRegLiveness: true |
| |
| body: | |
| ; CHECK-LABEL: name: test_phi_v16s32 |
| ; CHECK: bb.0: |
| ; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000) |
| ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4 |
| ; CHECK: [[DEF:%[0-9]+]]:_(<16 x s32>) = G_IMPLICIT_DEF |
| ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr4 |
| ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 |
| ; CHECK: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[COPY]](s32), [[C]] |
| ; CHECK: G_BRCOND [[ICMP]](s1), %bb.1 |
| ; CHECK: G_BR %bb.2 |
| ; CHECK: bb.1: |
| ; CHECK: successors: %bb.2(0x80000000) |
| ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32), [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32), [[UV8:%[0-9]+]]:_(s32), [[UV9:%[0-9]+]]:_(s32), [[UV10:%[0-9]+]]:_(s32), [[UV11:%[0-9]+]]:_(s32), [[UV12:%[0-9]+]]:_(s32), [[UV13:%[0-9]+]]:_(s32), [[UV14:%[0-9]+]]:_(s32), [[UV15:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF]](<16 x s32>) |
| ; CHECK: [[UV16:%[0-9]+]]:_(s32), [[UV17:%[0-9]+]]:_(s32), [[UV18:%[0-9]+]]:_(s32), [[UV19:%[0-9]+]]:_(s32), [[UV20:%[0-9]+]]:_(s32), [[UV21:%[0-9]+]]:_(s32), [[UV22:%[0-9]+]]:_(s32), [[UV23:%[0-9]+]]:_(s32), [[UV24:%[0-9]+]]:_(s32), [[UV25:%[0-9]+]]:_(s32), [[UV26:%[0-9]+]]:_(s32), [[UV27:%[0-9]+]]:_(s32), [[UV28:%[0-9]+]]:_(s32), [[UV29:%[0-9]+]]:_(s32), [[UV30:%[0-9]+]]:_(s32), [[UV31:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF]](<16 x s32>) |
| ; CHECK: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[UV]], [[UV16]] |
| ; CHECK: [[ADD1:%[0-9]+]]:_(s32) = G_ADD [[UV1]], [[UV17]] |
| ; CHECK: [[ADD2:%[0-9]+]]:_(s32) = G_ADD [[UV2]], [[UV18]] |
| ; CHECK: [[ADD3:%[0-9]+]]:_(s32) = G_ADD [[UV3]], [[UV19]] |
| ; CHECK: [[ADD4:%[0-9]+]]:_(s32) = G_ADD [[UV4]], [[UV20]] |
| ; CHECK: [[ADD5:%[0-9]+]]:_(s32) = G_ADD [[UV5]], [[UV21]] |
| ; CHECK: [[ADD6:%[0-9]+]]:_(s32) = G_ADD [[UV6]], [[UV22]] |
| ; CHECK: [[ADD7:%[0-9]+]]:_(s32) = G_ADD [[UV7]], [[UV23]] |
| ; CHECK: [[ADD8:%[0-9]+]]:_(s32) = G_ADD [[UV8]], [[UV24]] |
| ; CHECK: [[ADD9:%[0-9]+]]:_(s32) = G_ADD [[UV9]], [[UV25]] |
| ; CHECK: [[ADD10:%[0-9]+]]:_(s32) = G_ADD [[UV10]], [[UV26]] |
| ; CHECK: [[ADD11:%[0-9]+]]:_(s32) = G_ADD [[UV11]], [[UV27]] |
| ; CHECK: [[ADD12:%[0-9]+]]:_(s32) = G_ADD [[UV12]], [[UV28]] |
| ; CHECK: [[ADD13:%[0-9]+]]:_(s32) = G_ADD [[UV13]], [[UV29]] |
| ; CHECK: [[ADD14:%[0-9]+]]:_(s32) = G_ADD [[UV14]], [[UV30]] |
| ; CHECK: [[ADD15:%[0-9]+]]:_(s32) = G_ADD [[UV15]], [[UV31]] |
| ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<16 x s32>) = G_BUILD_VECTOR [[ADD]](s32), [[ADD1]](s32), [[ADD2]](s32), [[ADD3]](s32), [[ADD4]](s32), [[ADD5]](s32), [[ADD6]](s32), [[ADD7]](s32), [[ADD8]](s32), [[ADD9]](s32), [[ADD10]](s32), [[ADD11]](s32), [[ADD12]](s32), [[ADD13]](s32), [[ADD14]](s32), [[ADD15]](s32) |
| ; CHECK: G_BR %bb.2 |
| ; CHECK: bb.2: |
| ; CHECK: [[PHI:%[0-9]+]]:_(<16 x s32>) = G_PHI [[DEF]](<16 x s32>), %bb.0, [[BUILD_VECTOR]](<16 x s32>), %bb.1 |
| ; CHECK: S_SETPC_B64 undef $sgpr30_sgpr31, implicit [[PHI]](<16 x s32>) |
| bb.0: |
| successors: %bb.1, %bb.2 |
| liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4 |
| |
| %0:_(<16 x s32>) = G_IMPLICIT_DEF |
| %1:_(s32) = COPY $vgpr4 |
| %2:_(s32) = G_CONSTANT i32 0 |
| %3:_(s1) = G_ICMP intpred(eq), %1, %2 |
| G_BRCOND %3, %bb.1 |
| G_BR %bb.2 |
| |
| bb.1: |
| successors: %bb.2 |
| |
| %4:_(<16 x s32>) = G_ADD %0, %0 |
| G_BR %bb.2 |
| |
| bb.2: |
| %5:_(<16 x s32>) = G_PHI %0, %bb.0, %4, %bb.1 |
| S_SETPC_B64 undef $sgpr30_sgpr31, implicit %5 |
| |
| ... |
| |
| --- |
| name: test_phi_v32s32 |
| tracksRegLiveness: true |
| |
| body: | |
| ; CHECK-LABEL: name: test_phi_v32s32 |
| ; CHECK: bb.0: |
| ; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000) |
| ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4 |
| ; CHECK: [[DEF:%[0-9]+]]:_(<32 x s32>) = G_IMPLICIT_DEF |
| ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr4 |
| ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 |
| ; CHECK: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[COPY]](s32), [[C]] |
| ; CHECK: G_BRCOND [[ICMP]](s1), %bb.1 |
| ; CHECK: G_BR %bb.2 |
| ; CHECK: bb.1: |
| ; CHECK: successors: %bb.2(0x80000000) |
| ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32), [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32), [[UV8:%[0-9]+]]:_(s32), [[UV9:%[0-9]+]]:_(s32), [[UV10:%[0-9]+]]:_(s32), [[UV11:%[0-9]+]]:_(s32), [[UV12:%[0-9]+]]:_(s32), [[UV13:%[0-9]+]]:_(s32), [[UV14:%[0-9]+]]:_(s32), [[UV15:%[0-9]+]]:_(s32), [[UV16:%[0-9]+]]:_(s32), [[UV17:%[0-9]+]]:_(s32), [[UV18:%[0-9]+]]:_(s32), [[UV19:%[0-9]+]]:_(s32), [[UV20:%[0-9]+]]:_(s32), [[UV21:%[0-9]+]]:_(s32), [[UV22:%[0-9]+]]:_(s32), [[UV23:%[0-9]+]]:_(s32), [[UV24:%[0-9]+]]:_(s32), [[UV25:%[0-9]+]]:_(s32), [[UV26:%[0-9]+]]:_(s32), [[UV27:%[0-9]+]]:_(s32), [[UV28:%[0-9]+]]:_(s32), [[UV29:%[0-9]+]]:_(s32), [[UV30:%[0-9]+]]:_(s32), [[UV31:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF]](<32 x s32>) |
| ; CHECK: [[UV32:%[0-9]+]]:_(s32), [[UV33:%[0-9]+]]:_(s32), [[UV34:%[0-9]+]]:_(s32), [[UV35:%[0-9]+]]:_(s32), [[UV36:%[0-9]+]]:_(s32), [[UV37:%[0-9]+]]:_(s32), [[UV38:%[0-9]+]]:_(s32), [[UV39:%[0-9]+]]:_(s32), [[UV40:%[0-9]+]]:_(s32), [[UV41:%[0-9]+]]:_(s32), [[UV42:%[0-9]+]]:_(s32), [[UV43:%[0-9]+]]:_(s32), [[UV44:%[0-9]+]]:_(s32), [[UV45:%[0-9]+]]:_(s32), [[UV46:%[0-9]+]]:_(s32), [[UV47:%[0-9]+]]:_(s32), [[UV48:%[0-9]+]]:_(s32), [[UV49:%[0-9]+]]:_(s32), [[UV50:%[0-9]+]]:_(s32), [[UV51:%[0-9]+]]:_(s32), [[UV52:%[0-9]+]]:_(s32), [[UV53:%[0-9]+]]:_(s32), [[UV54:%[0-9]+]]:_(s32), [[UV55:%[0-9]+]]:_(s32), [[UV56:%[0-9]+]]:_(s32), [[UV57:%[0-9]+]]:_(s32), [[UV58:%[0-9]+]]:_(s32), [[UV59:%[0-9]+]]:_(s32), [[UV60:%[0-9]+]]:_(s32), [[UV61:%[0-9]+]]:_(s32), [[UV62:%[0-9]+]]:_(s32), [[UV63:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF]](<32 x s32>) |
| ; CHECK: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[UV]], [[UV32]] |
| ; CHECK: [[ADD1:%[0-9]+]]:_(s32) = G_ADD [[UV1]], [[UV33]] |
| ; CHECK: [[ADD2:%[0-9]+]]:_(s32) = G_ADD [[UV2]], [[UV34]] |
| ; CHECK: [[ADD3:%[0-9]+]]:_(s32) = G_ADD [[UV3]], [[UV35]] |
| ; CHECK: [[ADD4:%[0-9]+]]:_(s32) = G_ADD [[UV4]], [[UV36]] |
| ; CHECK: [[ADD5:%[0-9]+]]:_(s32) = G_ADD [[UV5]], [[UV37]] |
| ; CHECK: [[ADD6:%[0-9]+]]:_(s32) = G_ADD [[UV6]], [[UV38]] |
| ; CHECK: [[ADD7:%[0-9]+]]:_(s32) = G_ADD [[UV7]], [[UV39]] |
| ; CHECK: [[ADD8:%[0-9]+]]:_(s32) = G_ADD [[UV8]], [[UV40]] |
| ; CHECK: [[ADD9:%[0-9]+]]:_(s32) = G_ADD [[UV9]], [[UV41]] |
| ; CHECK: [[ADD10:%[0-9]+]]:_(s32) = G_ADD [[UV10]], [[UV42]] |
| ; CHECK: [[ADD11:%[0-9]+]]:_(s32) = G_ADD [[UV11]], [[UV43]] |
| ; CHECK: [[ADD12:%[0-9]+]]:_(s32) = G_ADD [[UV12]], [[UV44]] |
| ; CHECK: [[ADD13:%[0-9]+]]:_(s32) = G_ADD [[UV13]], [[UV45]] |
| ; CHECK: [[ADD14:%[0-9]+]]:_(s32) = G_ADD [[UV14]], [[UV46]] |
| ; CHECK: [[ADD15:%[0-9]+]]:_(s32) = G_ADD [[UV15]], [[UV47]] |
| ; CHECK: [[ADD16:%[0-9]+]]:_(s32) = G_ADD [[UV16]], [[UV48]] |
| ; CHECK: [[ADD17:%[0-9]+]]:_(s32) = G_ADD [[UV17]], [[UV49]] |
| ; CHECK: [[ADD18:%[0-9]+]]:_(s32) = G_ADD [[UV18]], [[UV50]] |
| ; CHECK: [[ADD19:%[0-9]+]]:_(s32) = G_ADD [[UV19]], [[UV51]] |
| ; CHECK: [[ADD20:%[0-9]+]]:_(s32) = G_ADD [[UV20]], [[UV52]] |
| ; CHECK: [[ADD21:%[0-9]+]]:_(s32) = G_ADD [[UV21]], [[UV53]] |
| ; CHECK: [[ADD22:%[0-9]+]]:_(s32) = G_ADD [[UV22]], [[UV54]] |
| ; CHECK: [[ADD23:%[0-9]+]]:_(s32) = G_ADD [[UV23]], [[UV55]] |
| ; CHECK: [[ADD24:%[0-9]+]]:_(s32) = G_ADD [[UV24]], [[UV56]] |
| ; CHECK: [[ADD25:%[0-9]+]]:_(s32) = G_ADD [[UV25]], [[UV57]] |
| ; CHECK: [[ADD26:%[0-9]+]]:_(s32) = G_ADD [[UV26]], [[UV58]] |
| ; CHECK: [[ADD27:%[0-9]+]]:_(s32) = G_ADD [[UV27]], [[UV59]] |
| ; CHECK: [[ADD28:%[0-9]+]]:_(s32) = G_ADD [[UV28]], [[UV60]] |
| ; CHECK: [[ADD29:%[0-9]+]]:_(s32) = G_ADD [[UV29]], [[UV61]] |
| ; CHECK: [[ADD30:%[0-9]+]]:_(s32) = G_ADD [[UV30]], [[UV62]] |
| ; CHECK: [[ADD31:%[0-9]+]]:_(s32) = G_ADD [[UV31]], [[UV63]] |
| ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<32 x s32>) = G_BUILD_VECTOR [[ADD]](s32), [[ADD1]](s32), [[ADD2]](s32), [[ADD3]](s32), [[ADD4]](s32), [[ADD5]](s32), [[ADD6]](s32), [[ADD7]](s32), [[ADD8]](s32), [[ADD9]](s32), [[ADD10]](s32), [[ADD11]](s32), [[ADD12]](s32), [[ADD13]](s32), [[ADD14]](s32), [[ADD15]](s32), [[ADD16]](s32), [[ADD17]](s32), [[ADD18]](s32), [[ADD19]](s32), [[ADD20]](s32), [[ADD21]](s32), [[ADD22]](s32), [[ADD23]](s32), [[ADD24]](s32), [[ADD25]](s32), [[ADD26]](s32), [[ADD27]](s32), [[ADD28]](s32), [[ADD29]](s32), [[ADD30]](s32), [[ADD31]](s32) |
| ; CHECK: G_BR %bb.2 |
| ; CHECK: bb.2: |
| ; CHECK: [[PHI:%[0-9]+]]:_(<32 x s32>) = G_PHI [[DEF]](<32 x s32>), %bb.0, [[BUILD_VECTOR]](<32 x s32>), %bb.1 |
| ; CHECK: S_SETPC_B64 undef $sgpr30_sgpr31, implicit [[PHI]](<32 x s32>) |
| bb.0: |
| successors: %bb.1, %bb.2 |
| liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4 |
| |
| %0:_(<32 x s32>) = G_IMPLICIT_DEF |
| %1:_(s32) = COPY $vgpr4 |
| %2:_(s32) = G_CONSTANT i32 0 |
| %3:_(s1) = G_ICMP intpred(eq), %1, %2 |
| G_BRCOND %3, %bb.1 |
| G_BR %bb.2 |
| |
| bb.1: |
| successors: %bb.2 |
| |
| %4:_(<32 x s32>) = G_ADD %0, %0 |
| G_BR %bb.2 |
| |
| bb.2: |
| %5:_(<32 x s32>) = G_PHI %0, %bb.0, %4, %bb.1 |
| S_SETPC_B64 undef $sgpr30_sgpr31, implicit %5 |
| |
| ... |
| |
| --- |
| name: test_phi_v64s32 |
| tracksRegLiveness: true |
| |
| body: | |
| ; CHECK-LABEL: name: test_phi_v64s32 |
| ; CHECK: bb.0: |
| ; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000) |
| ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4 |
| ; CHECK: [[DEF:%[0-9]+]]:_(<16 x s32>) = G_IMPLICIT_DEF |
| ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr4 |
| ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 |
| ; CHECK: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[COPY]](s32), [[C]] |
| ; CHECK: G_BRCOND [[ICMP]](s1), %bb.1 |
| ; CHECK: G_BR %bb.2 |
| ; CHECK: bb.1: |
| ; CHECK: successors: %bb.2(0x80000000) |
| ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32), [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32), [[UV8:%[0-9]+]]:_(s32), [[UV9:%[0-9]+]]:_(s32), [[UV10:%[0-9]+]]:_(s32), [[UV11:%[0-9]+]]:_(s32), [[UV12:%[0-9]+]]:_(s32), [[UV13:%[0-9]+]]:_(s32), [[UV14:%[0-9]+]]:_(s32), [[UV15:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF]](<16 x s32>) |
| ; CHECK: [[UV16:%[0-9]+]]:_(s32), [[UV17:%[0-9]+]]:_(s32), [[UV18:%[0-9]+]]:_(s32), [[UV19:%[0-9]+]]:_(s32), [[UV20:%[0-9]+]]:_(s32), [[UV21:%[0-9]+]]:_(s32), [[UV22:%[0-9]+]]:_(s32), [[UV23:%[0-9]+]]:_(s32), [[UV24:%[0-9]+]]:_(s32), [[UV25:%[0-9]+]]:_(s32), [[UV26:%[0-9]+]]:_(s32), [[UV27:%[0-9]+]]:_(s32), [[UV28:%[0-9]+]]:_(s32), [[UV29:%[0-9]+]]:_(s32), [[UV30:%[0-9]+]]:_(s32), [[UV31:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF]](<16 x s32>) |
| ; CHECK: [[UV32:%[0-9]+]]:_(s32), [[UV33:%[0-9]+]]:_(s32), [[UV34:%[0-9]+]]:_(s32), [[UV35:%[0-9]+]]:_(s32), [[UV36:%[0-9]+]]:_(s32), [[UV37:%[0-9]+]]:_(s32), [[UV38:%[0-9]+]]:_(s32), [[UV39:%[0-9]+]]:_(s32), [[UV40:%[0-9]+]]:_(s32), [[UV41:%[0-9]+]]:_(s32), [[UV42:%[0-9]+]]:_(s32), [[UV43:%[0-9]+]]:_(s32), [[UV44:%[0-9]+]]:_(s32), [[UV45:%[0-9]+]]:_(s32), [[UV46:%[0-9]+]]:_(s32), [[UV47:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF]](<16 x s32>) |
| ; CHECK: [[UV48:%[0-9]+]]:_(s32), [[UV49:%[0-9]+]]:_(s32), [[UV50:%[0-9]+]]:_(s32), [[UV51:%[0-9]+]]:_(s32), [[UV52:%[0-9]+]]:_(s32), [[UV53:%[0-9]+]]:_(s32), [[UV54:%[0-9]+]]:_(s32), [[UV55:%[0-9]+]]:_(s32), [[UV56:%[0-9]+]]:_(s32), [[UV57:%[0-9]+]]:_(s32), [[UV58:%[0-9]+]]:_(s32), [[UV59:%[0-9]+]]:_(s32), [[UV60:%[0-9]+]]:_(s32), [[UV61:%[0-9]+]]:_(s32), [[UV62:%[0-9]+]]:_(s32), [[UV63:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF]](<16 x s32>) |
| ; CHECK: [[UV64:%[0-9]+]]:_(s32), [[UV65:%[0-9]+]]:_(s32), [[UV66:%[0-9]+]]:_(s32), [[UV67:%[0-9]+]]:_(s32), [[UV68:%[0-9]+]]:_(s32), [[UV69:%[0-9]+]]:_(s32), [[UV70:%[0-9]+]]:_(s32), [[UV71:%[0-9]+]]:_(s32), [[UV72:%[0-9]+]]:_(s32), [[UV73:%[0-9]+]]:_(s32), [[UV74:%[0-9]+]]:_(s32), [[UV75:%[0-9]+]]:_(s32), [[UV76:%[0-9]+]]:_(s32), [[UV77:%[0-9]+]]:_(s32), [[UV78:%[0-9]+]]:_(s32), [[UV79:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF]](<16 x s32>) |
| ; CHECK: [[UV80:%[0-9]+]]:_(s32), [[UV81:%[0-9]+]]:_(s32), [[UV82:%[0-9]+]]:_(s32), [[UV83:%[0-9]+]]:_(s32), [[UV84:%[0-9]+]]:_(s32), [[UV85:%[0-9]+]]:_(s32), [[UV86:%[0-9]+]]:_(s32), [[UV87:%[0-9]+]]:_(s32), [[UV88:%[0-9]+]]:_(s32), [[UV89:%[0-9]+]]:_(s32), [[UV90:%[0-9]+]]:_(s32), [[UV91:%[0-9]+]]:_(s32), [[UV92:%[0-9]+]]:_(s32), [[UV93:%[0-9]+]]:_(s32), [[UV94:%[0-9]+]]:_(s32), [[UV95:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF]](<16 x s32>) |
| ; CHECK: [[UV96:%[0-9]+]]:_(s32), [[UV97:%[0-9]+]]:_(s32), [[UV98:%[0-9]+]]:_(s32), [[UV99:%[0-9]+]]:_(s32), [[UV100:%[0-9]+]]:_(s32), [[UV101:%[0-9]+]]:_(s32), [[UV102:%[0-9]+]]:_(s32), [[UV103:%[0-9]+]]:_(s32), [[UV104:%[0-9]+]]:_(s32), [[UV105:%[0-9]+]]:_(s32), [[UV106:%[0-9]+]]:_(s32), [[UV107:%[0-9]+]]:_(s32), [[UV108:%[0-9]+]]:_(s32), [[UV109:%[0-9]+]]:_(s32), [[UV110:%[0-9]+]]:_(s32), [[UV111:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF]](<16 x s32>) |
| ; CHECK: [[UV112:%[0-9]+]]:_(s32), [[UV113:%[0-9]+]]:_(s32), [[UV114:%[0-9]+]]:_(s32), [[UV115:%[0-9]+]]:_(s32), [[UV116:%[0-9]+]]:_(s32), [[UV117:%[0-9]+]]:_(s32), [[UV118:%[0-9]+]]:_(s32), [[UV119:%[0-9]+]]:_(s32), [[UV120:%[0-9]+]]:_(s32), [[UV121:%[0-9]+]]:_(s32), [[UV122:%[0-9]+]]:_(s32), [[UV123:%[0-9]+]]:_(s32), [[UV124:%[0-9]+]]:_(s32), [[UV125:%[0-9]+]]:_(s32), [[UV126:%[0-9]+]]:_(s32), [[UV127:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF]](<16 x s32>) |
| ; CHECK: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[UV]], [[UV64]] |
| ; CHECK: [[ADD1:%[0-9]+]]:_(s32) = G_ADD [[UV1]], [[UV65]] |
| ; CHECK: [[ADD2:%[0-9]+]]:_(s32) = G_ADD [[UV2]], [[UV66]] |
| ; CHECK: [[ADD3:%[0-9]+]]:_(s32) = G_ADD [[UV3]], [[UV67]] |
| ; CHECK: [[ADD4:%[0-9]+]]:_(s32) = G_ADD [[UV4]], [[UV68]] |
| ; CHECK: [[ADD5:%[0-9]+]]:_(s32) = G_ADD [[UV5]], [[UV69]] |
| ; CHECK: [[ADD6:%[0-9]+]]:_(s32) = G_ADD [[UV6]], [[UV70]] |
| ; CHECK: [[ADD7:%[0-9]+]]:_(s32) = G_ADD [[UV7]], [[UV71]] |
| ; CHECK: [[ADD8:%[0-9]+]]:_(s32) = G_ADD [[UV8]], [[UV72]] |
| ; CHECK: [[ADD9:%[0-9]+]]:_(s32) = G_ADD [[UV9]], [[UV73]] |
| ; CHECK: [[ADD10:%[0-9]+]]:_(s32) = G_ADD [[UV10]], [[UV74]] |
| ; CHECK: [[ADD11:%[0-9]+]]:_(s32) = G_ADD [[UV11]], [[UV75]] |
| ; CHECK: [[ADD12:%[0-9]+]]:_(s32) = G_ADD [[UV12]], [[UV76]] |
| ; CHECK: [[ADD13:%[0-9]+]]:_(s32) = G_ADD [[UV13]], [[UV77]] |
| ; CHECK: [[ADD14:%[0-9]+]]:_(s32) = G_ADD [[UV14]], [[UV78]] |
| ; CHECK: [[ADD15:%[0-9]+]]:_(s32) = G_ADD [[UV15]], [[UV79]] |
| ; CHECK: [[ADD16:%[0-9]+]]:_(s32) = G_ADD [[UV16]], [[UV80]] |
| ; CHECK: [[ADD17:%[0-9]+]]:_(s32) = G_ADD [[UV17]], [[UV81]] |
| ; CHECK: [[ADD18:%[0-9]+]]:_(s32) = G_ADD [[UV18]], [[UV82]] |
| ; CHECK: [[ADD19:%[0-9]+]]:_(s32) = G_ADD [[UV19]], [[UV83]] |
| ; CHECK: [[ADD20:%[0-9]+]]:_(s32) = G_ADD [[UV20]], [[UV84]] |
| ; CHECK: [[ADD21:%[0-9]+]]:_(s32) = G_ADD [[UV21]], [[UV85]] |
| ; CHECK: [[ADD22:%[0-9]+]]:_(s32) = G_ADD [[UV22]], [[UV86]] |
| ; CHECK: [[ADD23:%[0-9]+]]:_(s32) = G_ADD [[UV23]], [[UV87]] |
| ; CHECK: [[ADD24:%[0-9]+]]:_(s32) = G_ADD [[UV24]], [[UV88]] |
| ; CHECK: [[ADD25:%[0-9]+]]:_(s32) = G_ADD [[UV25]], [[UV89]] |
| ; CHECK: [[ADD26:%[0-9]+]]:_(s32) = G_ADD [[UV26]], [[UV90]] |
| ; CHECK: [[ADD27:%[0-9]+]]:_(s32) = G_ADD [[UV27]], [[UV91]] |
| ; CHECK: [[ADD28:%[0-9]+]]:_(s32) = G_ADD [[UV28]], [[UV92]] |
| ; CHECK: [[ADD29:%[0-9]+]]:_(s32) = G_ADD [[UV29]], [[UV93]] |
| ; CHECK: [[ADD30:%[0-9]+]]:_(s32) = G_ADD [[UV30]], [[UV94]] |
| ; CHECK: [[ADD31:%[0-9]+]]:_(s32) = G_ADD [[UV31]], [[UV95]] |
| ; CHECK: [[ADD32:%[0-9]+]]:_(s32) = G_ADD [[UV32]], [[UV96]] |
| ; CHECK: [[ADD33:%[0-9]+]]:_(s32) = G_ADD [[UV33]], [[UV97]] |
| ; CHECK: [[ADD34:%[0-9]+]]:_(s32) = G_ADD [[UV34]], [[UV98]] |
| ; CHECK: [[ADD35:%[0-9]+]]:_(s32) = G_ADD [[UV35]], [[UV99]] |
| ; CHECK: [[ADD36:%[0-9]+]]:_(s32) = G_ADD [[UV36]], [[UV100]] |
| ; CHECK: [[ADD37:%[0-9]+]]:_(s32) = G_ADD [[UV37]], [[UV101]] |
| ; CHECK: [[ADD38:%[0-9]+]]:_(s32) = G_ADD [[UV38]], [[UV102]] |
| ; CHECK: [[ADD39:%[0-9]+]]:_(s32) = G_ADD [[UV39]], [[UV103]] |
| ; CHECK: [[ADD40:%[0-9]+]]:_(s32) = G_ADD [[UV40]], [[UV104]] |
| ; CHECK: [[ADD41:%[0-9]+]]:_(s32) = G_ADD [[UV41]], [[UV105]] |
| ; CHECK: [[ADD42:%[0-9]+]]:_(s32) = G_ADD [[UV42]], [[UV106]] |
| ; CHECK: [[ADD43:%[0-9]+]]:_(s32) = G_ADD [[UV43]], [[UV107]] |
| ; CHECK: [[ADD44:%[0-9]+]]:_(s32) = G_ADD [[UV44]], [[UV108]] |
| ; CHECK: [[ADD45:%[0-9]+]]:_(s32) = G_ADD [[UV45]], [[UV109]] |
| ; CHECK: [[ADD46:%[0-9]+]]:_(s32) = G_ADD [[UV46]], [[UV110]] |
| ; CHECK: [[ADD47:%[0-9]+]]:_(s32) = G_ADD [[UV47]], [[UV111]] |
| ; CHECK: [[ADD48:%[0-9]+]]:_(s32) = G_ADD [[UV48]], [[UV112]] |
| ; CHECK: [[ADD49:%[0-9]+]]:_(s32) = G_ADD [[UV49]], [[UV113]] |
| ; CHECK: [[ADD50:%[0-9]+]]:_(s32) = G_ADD [[UV50]], [[UV114]] |
| ; CHECK: [[ADD51:%[0-9]+]]:_(s32) = G_ADD [[UV51]], [[UV115]] |
| ; CHECK: [[ADD52:%[0-9]+]]:_(s32) = G_ADD [[UV52]], [[UV116]] |
| ; CHECK: [[ADD53:%[0-9]+]]:_(s32) = G_ADD [[UV53]], [[UV117]] |
| ; CHECK: [[ADD54:%[0-9]+]]:_(s32) = G_ADD [[UV54]], [[UV118]] |
| ; CHECK: [[ADD55:%[0-9]+]]:_(s32) = G_ADD [[UV55]], [[UV119]] |
| ; CHECK: [[ADD56:%[0-9]+]]:_(s32) = G_ADD [[UV56]], [[UV120]] |
| ; CHECK: [[ADD57:%[0-9]+]]:_(s32) = G_ADD [[UV57]], [[UV121]] |
| ; CHECK: [[ADD58:%[0-9]+]]:_(s32) = G_ADD [[UV58]], [[UV122]] |
| ; CHECK: [[ADD59:%[0-9]+]]:_(s32) = G_ADD [[UV59]], [[UV123]] |
| ; CHECK: [[ADD60:%[0-9]+]]:_(s32) = G_ADD [[UV60]], [[UV124]] |
| ; CHECK: [[ADD61:%[0-9]+]]:_(s32) = G_ADD [[UV61]], [[UV125]] |
| ; CHECK: [[ADD62:%[0-9]+]]:_(s32) = G_ADD [[UV62]], [[UV126]] |
| ; CHECK: [[ADD63:%[0-9]+]]:_(s32) = G_ADD [[UV63]], [[UV127]] |
| ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<16 x s32>) = G_BUILD_VECTOR [[ADD]](s32), [[ADD1]](s32), [[ADD2]](s32), [[ADD3]](s32), [[ADD4]](s32), [[ADD5]](s32), [[ADD6]](s32), [[ADD7]](s32), [[ADD8]](s32), [[ADD9]](s32), [[ADD10]](s32), [[ADD11]](s32), [[ADD12]](s32), [[ADD13]](s32), [[ADD14]](s32), [[ADD15]](s32) |
| ; CHECK: [[BUILD_VECTOR1:%[0-9]+]]:_(<16 x s32>) = G_BUILD_VECTOR [[ADD16]](s32), [[ADD17]](s32), [[ADD18]](s32), [[ADD19]](s32), [[ADD20]](s32), [[ADD21]](s32), [[ADD22]](s32), [[ADD23]](s32), [[ADD24]](s32), [[ADD25]](s32), [[ADD26]](s32), [[ADD27]](s32), [[ADD28]](s32), [[ADD29]](s32), [[ADD30]](s32), [[ADD31]](s32) |
| ; CHECK: [[BUILD_VECTOR2:%[0-9]+]]:_(<16 x s32>) = G_BUILD_VECTOR [[ADD32]](s32), [[ADD33]](s32), [[ADD34]](s32), [[ADD35]](s32), [[ADD36]](s32), [[ADD37]](s32), [[ADD38]](s32), [[ADD39]](s32), [[ADD40]](s32), [[ADD41]](s32), [[ADD42]](s32), [[ADD43]](s32), [[ADD44]](s32), [[ADD45]](s32), [[ADD46]](s32), [[ADD47]](s32) |
| ; CHECK: [[BUILD_VECTOR3:%[0-9]+]]:_(<16 x s32>) = G_BUILD_VECTOR [[ADD48]](s32), [[ADD49]](s32), [[ADD50]](s32), [[ADD51]](s32), [[ADD52]](s32), [[ADD53]](s32), [[ADD54]](s32), [[ADD55]](s32), [[ADD56]](s32), [[ADD57]](s32), [[ADD58]](s32), [[ADD59]](s32), [[ADD60]](s32), [[ADD61]](s32), [[ADD62]](s32), [[ADD63]](s32) |
| ; CHECK: G_BR %bb.2 |
| ; CHECK: bb.2: |
| ; CHECK: [[PHI:%[0-9]+]]:_(<16 x s32>) = G_PHI [[DEF]](<16 x s32>), %bb.0, [[BUILD_VECTOR]](<16 x s32>), %bb.1 |
| ; CHECK: [[PHI1:%[0-9]+]]:_(<16 x s32>) = G_PHI [[DEF]](<16 x s32>), %bb.0, [[BUILD_VECTOR1]](<16 x s32>), %bb.1 |
| ; CHECK: [[PHI2:%[0-9]+]]:_(<16 x s32>) = G_PHI [[DEF]](<16 x s32>), %bb.0, [[BUILD_VECTOR2]](<16 x s32>), %bb.1 |
| ; CHECK: [[PHI3:%[0-9]+]]:_(<16 x s32>) = G_PHI [[DEF]](<16 x s32>), %bb.0, [[BUILD_VECTOR3]](<16 x s32>), %bb.1 |
| ; CHECK: [[CONCAT_VECTORS:%[0-9]+]]:_(<64 x s32>) = G_CONCAT_VECTORS [[PHI]](<16 x s32>), [[PHI1]](<16 x s32>), [[PHI2]](<16 x s32>), [[PHI3]](<16 x s32>) |
| ; CHECK: S_SETPC_B64 undef $sgpr30_sgpr31, implicit [[CONCAT_VECTORS]](<64 x s32>) |
| bb.0: |
| successors: %bb.1, %bb.2 |
| liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4 |
| |
| %0:_(<64 x s32>) = G_IMPLICIT_DEF |
| %1:_(s32) = COPY $vgpr4 |
| %2:_(s32) = G_CONSTANT i32 0 |
| %3:_(s1) = G_ICMP intpred(eq), %1, %2 |
| G_BRCOND %3, %bb.1 |
| G_BR %bb.2 |
| |
| bb.1: |
| successors: %bb.2 |
| |
| %4:_(<64 x s32>) = G_ADD %0, %0 |
| G_BR %bb.2 |
| |
| bb.2: |
| %5:_(<64 x s32>) = G_PHI %0, %bb.0, %4, %bb.1 |
| S_SETPC_B64 undef $sgpr30_sgpr31, implicit %5 |
| |
| ... |
| |
| --- |
| name: test_phi_s64 |
| tracksRegLiveness: true |
| |
| body: | |
| ; CHECK-LABEL: name: test_phi_s64 |
| ; CHECK: bb.0: |
| ; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000) |
| ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2 |
| ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1 |
| ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2 |
| ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 |
| ; CHECK: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]] |
| ; CHECK: G_BRCOND [[ICMP]](s1), %bb.1 |
| ; CHECK: G_BR %bb.2 |
| ; CHECK: bb.1: |
| ; CHECK: successors: %bb.2(0x80000000) |
| ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s64) |
| ; CHECK: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s64) |
| ; CHECK: [[UADDO:%[0-9]+]]:_(s32), [[UADDO1:%[0-9]+]]:_(s1) = G_UADDO [[UV]], [[UV2]] |
| ; CHECK: [[UADDE:%[0-9]+]]:_(s32), [[UADDE1:%[0-9]+]]:_(s1) = G_UADDE [[UV1]], [[UV3]], [[UADDO1]] |
| ; CHECK: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[UADDO]](s32), [[UADDE]](s32) |
| ; CHECK: G_BR %bb.2 |
| ; CHECK: bb.2: |
| ; CHECK: [[PHI:%[0-9]+]]:_(s64) = G_PHI [[COPY]](s64), %bb.0, [[MV]](s64), %bb.1 |
| ; CHECK: $vgpr0_vgpr1 = COPY [[PHI]](s64) |
| ; CHECK: S_SETPC_B64 undef $sgpr30_sgpr31 |
| bb.0: |
| successors: %bb.1, %bb.2 |
| liveins: $vgpr0_vgpr1, $vgpr2 |
| |
| %0:_(s64) = COPY $vgpr0_vgpr1 |
| %1:_(s32) = COPY $vgpr2 |
| %2:_(s32) = G_CONSTANT i32 0 |
| %3:_(s1) = G_ICMP intpred(eq), %1, %2 |
| G_BRCOND %3, %bb.1 |
| G_BR %bb.2 |
| |
| bb.1: |
| successors: %bb.2 |
| |
| %4:_(s64) = G_ADD %0, %0 |
| G_BR %bb.2 |
| |
| bb.2: |
| %5:_(s64) = G_PHI %0, %bb.0, %4, %bb.1 |
| $vgpr0_vgpr1 = COPY %5 |
| S_SETPC_B64 undef $sgpr30_sgpr31 |
| |
| ... |
| --- |
| name: test_phi_v2s64 |
| tracksRegLiveness: true |
| |
| body: | |
| ; CHECK-LABEL: name: test_phi_v2s64 |
| ; CHECK: bb.0: |
| ; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000) |
| ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4 |
| ; CHECK: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 |
| ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr4 |
| ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 |
| ; CHECK: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]] |
| ; CHECK: G_BRCOND [[ICMP]](s1), %bb.1 |
| ; CHECK: G_BR %bb.2 |
| ; CHECK: bb.1: |
| ; CHECK: successors: %bb.2(0x80000000) |
| ; CHECK: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](<2 x s64>) |
| ; CHECK: [[UV2:%[0-9]+]]:_(s64), [[UV3:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](<2 x s64>) |
| ; CHECK: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[UV]](s64) |
| ; CHECK: [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[UV2]](s64) |
| ; CHECK: [[UADDO:%[0-9]+]]:_(s32), [[UADDO1:%[0-9]+]]:_(s1) = G_UADDO [[UV4]], [[UV6]] |
| ; CHECK: [[UADDE:%[0-9]+]]:_(s32), [[UADDE1:%[0-9]+]]:_(s1) = G_UADDE [[UV5]], [[UV7]], [[UADDO1]] |
| ; CHECK: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[UADDO]](s32), [[UADDE]](s32) |
| ; CHECK: [[UV8:%[0-9]+]]:_(s32), [[UV9:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[UV1]](s64) |
| ; CHECK: [[UV10:%[0-9]+]]:_(s32), [[UV11:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[UV3]](s64) |
| ; CHECK: [[UADDO2:%[0-9]+]]:_(s32), [[UADDO3:%[0-9]+]]:_(s1) = G_UADDO [[UV8]], [[UV10]] |
| ; CHECK: [[UADDE2:%[0-9]+]]:_(s32), [[UADDE3:%[0-9]+]]:_(s1) = G_UADDE [[UV9]], [[UV11]], [[UADDO3]] |
| ; CHECK: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[UADDO2]](s32), [[UADDE2]](s32) |
| ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[MV]](s64), [[MV1]](s64) |
| ; CHECK: G_BR %bb.2 |
| ; CHECK: bb.2: |
| ; CHECK: [[PHI:%[0-9]+]]:_(<2 x s64>) = G_PHI [[COPY]](<2 x s64>), %bb.0, [[BUILD_VECTOR]](<2 x s64>), %bb.1 |
| ; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[PHI]](<2 x s64>) |
| ; CHECK: S_SETPC_B64 undef $sgpr30_sgpr31 |
| bb.0: |
| successors: %bb.1, %bb.2 |
| liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4 |
| |
| %0:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 |
| %1:_(s32) = COPY $vgpr4 |
| %2:_(s32) = G_CONSTANT i32 0 |
| %3:_(s1) = G_ICMP intpred(eq), %1, %2 |
| G_BRCOND %3, %bb.1 |
| G_BR %bb.2 |
| |
| bb.1: |
| successors: %bb.2 |
| |
| %4:_(<2 x s64>) = G_ADD %0, %0 |
| G_BR %bb.2 |
| |
| bb.2: |
| %5:_(<2 x s64>) = G_PHI %0, %bb.0, %4, %bb.1 |
| $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %5 |
| S_SETPC_B64 undef $sgpr30_sgpr31 |
| |
| ... |
| --- |
| name: test_phi_v3s64 |
| tracksRegLiveness: true |
| |
| body: | |
| ; CHECK-LABEL: name: test_phi_v3s64 |
| ; CHECK: bb.0: |
| ; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000) |
| ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7, $vgpr8 |
| ; CHECK: [[COPY:%[0-9]+]]:_(<4 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 |
| ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr8 |
| ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 |
| ; CHECK: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]] |
| ; CHECK: [[EXTRACT:%[0-9]+]]:_(<3 x s64>) = G_EXTRACT [[COPY]](<4 x s64>), 0 |
| ; CHECK: G_BRCOND [[ICMP]](s1), %bb.1 |
| ; CHECK: G_BR %bb.2 |
| ; CHECK: bb.1: |
| ; CHECK: successors: %bb.2(0x80000000) |
| ; CHECK: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64), [[UV2:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[EXTRACT]](<3 x s64>) |
| ; CHECK: [[UV3:%[0-9]+]]:_(s64), [[UV4:%[0-9]+]]:_(s64), [[UV5:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[EXTRACT]](<3 x s64>) |
| ; CHECK: [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[UV]](s64) |
| ; CHECK: [[UV8:%[0-9]+]]:_(s32), [[UV9:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[UV3]](s64) |
| ; CHECK: [[UADDO:%[0-9]+]]:_(s32), [[UADDO1:%[0-9]+]]:_(s1) = G_UADDO [[UV6]], [[UV8]] |
| ; CHECK: [[UADDE:%[0-9]+]]:_(s32), [[UADDE1:%[0-9]+]]:_(s1) = G_UADDE [[UV7]], [[UV9]], [[UADDO1]] |
| ; CHECK: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[UADDO]](s32), [[UADDE]](s32) |
| ; CHECK: [[UV10:%[0-9]+]]:_(s32), [[UV11:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[UV1]](s64) |
| ; CHECK: [[UV12:%[0-9]+]]:_(s32), [[UV13:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[UV4]](s64) |
| ; CHECK: [[UADDO2:%[0-9]+]]:_(s32), [[UADDO3:%[0-9]+]]:_(s1) = G_UADDO [[UV10]], [[UV12]] |
| ; CHECK: [[UADDE2:%[0-9]+]]:_(s32), [[UADDE3:%[0-9]+]]:_(s1) = G_UADDE [[UV11]], [[UV13]], [[UADDO3]] |
| ; CHECK: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[UADDO2]](s32), [[UADDE2]](s32) |
| ; CHECK: [[UV14:%[0-9]+]]:_(s32), [[UV15:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[UV2]](s64) |
| ; CHECK: [[UV16:%[0-9]+]]:_(s32), [[UV17:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[UV5]](s64) |
| ; CHECK: [[UADDO4:%[0-9]+]]:_(s32), [[UADDO5:%[0-9]+]]:_(s1) = G_UADDO [[UV14]], [[UV16]] |
| ; CHECK: [[UADDE4:%[0-9]+]]:_(s32), [[UADDE5:%[0-9]+]]:_(s1) = G_UADDE [[UV15]], [[UV17]], [[UADDO5]] |
| ; CHECK: [[MV2:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[UADDO4]](s32), [[UADDE4]](s32) |
| ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s64>) = G_BUILD_VECTOR [[MV]](s64), [[MV1]](s64), [[MV2]](s64) |
| ; CHECK: G_BR %bb.2 |
| ; CHECK: bb.2: |
| ; CHECK: [[PHI:%[0-9]+]]:_(<3 x s64>) = G_PHI [[EXTRACT]](<3 x s64>), %bb.0, [[BUILD_VECTOR]](<3 x s64>), %bb.1 |
| ; CHECK: [[DEF:%[0-9]+]]:_(<4 x s64>) = G_IMPLICIT_DEF |
| ; CHECK: [[INSERT:%[0-9]+]]:_(<4 x s64>) = G_INSERT [[DEF]], [[PHI]](<3 x s64>), 0 |
| ; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[INSERT]](<4 x s64>) |
| ; CHECK: S_SETPC_B64 undef $sgpr30_sgpr31 |
| bb.0: |
| successors: %bb.1, %bb.2 |
| liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7, $vgpr8 |
| |
| %0:_(<4 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 |
| %1:_(s32) = COPY $vgpr8 |
| %2:_(s32) = G_CONSTANT i32 0 |
| %3:_(s1) = G_ICMP intpred(eq), %1, %2 |
| %4:_(<3 x s64>) = G_EXTRACT %0, 0 |
| G_BRCOND %3, %bb.1 |
| G_BR %bb.2 |
| |
| bb.1: |
| successors: %bb.2 |
| |
| %5:_(<3 x s64>) = G_ADD %4, %4 |
| G_BR %bb.2 |
| |
| bb.2: |
| %6:_(<3 x s64>) = G_PHI %4, %bb.0, %5, %bb.1 |
| %7:_(<4 x s64>) = G_IMPLICIT_DEF |
| %8:_(<4 x s64>) = G_INSERT %7, %6, 0 |
| $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY %8 |
| S_SETPC_B64 undef $sgpr30_sgpr31 |
| |
| ... |
| --- |
| name: test_phi_p3 |
| tracksRegLiveness: true |
| |
| body: | |
| ; CHECK-LABEL: name: test_phi_p3 |
| ; CHECK: bb.0: |
| ; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000) |
| ; CHECK: liveins: $vgpr0, $vgpr1 |
| ; CHECK: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 |
| ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 |
| ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 |
| ; CHECK: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]] |
| ; CHECK: G_BRCOND [[ICMP]](s1), %bb.1 |
| ; CHECK: G_BR %bb.2 |
| ; CHECK: bb.1: |
| ; CHECK: successors: %bb.2(0x80000000) |
| ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 |
| ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) |
| ; CHECK: G_BR %bb.2 |
| ; CHECK: bb.2: |
| ; CHECK: [[PHI:%[0-9]+]]:_(p3) = G_PHI [[COPY]](p3), %bb.0, [[PTR_ADD]](p3), %bb.1 |
| ; CHECK: $vgpr0 = COPY [[PHI]](p3) |
| ; CHECK: S_SETPC_B64 undef $sgpr30_sgpr31 |
| bb.0: |
| successors: %bb.1, %bb.2 |
| liveins: $vgpr0, $vgpr1 |
| |
| %0:_(p3) = COPY $vgpr0 |
| %1:_(s32) = COPY $vgpr1 |
| %2:_(s32) = G_CONSTANT i32 0 |
| %3:_(s1) = G_ICMP intpred(eq), %1, %2 |
| G_BRCOND %3, %bb.1 |
| G_BR %bb.2 |
| |
| bb.1: |
| successors: %bb.2 |
| |
| %4:_(s32) = G_CONSTANT i32 8 |
| %5:_(p3) = G_PTR_ADD %0, %4 |
| G_BR %bb.2 |
| |
| bb.2: |
| %6:_(p3) = G_PHI %0, %bb.0, %5, %bb.1 |
| $vgpr0 = COPY %6 |
| S_SETPC_B64 undef $sgpr30_sgpr31 |
| |
| ... |
| --- |
| name: test_phi_p5 |
| tracksRegLiveness: true |
| |
| body: | |
| ; CHECK-LABEL: name: test_phi_p5 |
| ; CHECK: bb.0: |
| ; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000) |
| ; CHECK: liveins: $vgpr0, $vgpr1 |
| ; CHECK: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 |
| ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 |
| ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 |
| ; CHECK: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]] |
| ; CHECK: G_BRCOND [[ICMP]](s1), %bb.1 |
| ; CHECK: G_BR %bb.2 |
| ; CHECK: bb.1: |
| ; CHECK: successors: %bb.2(0x80000000) |
| ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 |
| ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) |
| ; CHECK: G_BR %bb.2 |
| ; CHECK: bb.2: |
| ; CHECK: [[PHI:%[0-9]+]]:_(p5) = G_PHI [[COPY]](p5), %bb.0, [[PTR_ADD]](p5), %bb.1 |
| ; CHECK: $vgpr0 = COPY [[PHI]](p5) |
| ; CHECK: S_SETPC_B64 undef $sgpr30_sgpr31 |
| bb.0: |
| successors: %bb.1, %bb.2 |
| liveins: $vgpr0, $vgpr1 |
| |
| %0:_(p5) = COPY $vgpr0 |
| %1:_(s32) = COPY $vgpr1 |
| %2:_(s32) = G_CONSTANT i32 0 |
| %3:_(s1) = G_ICMP intpred(eq), %1, %2 |
| G_BRCOND %3, %bb.1 |
| G_BR %bb.2 |
| |
| bb.1: |
| successors: %bb.2 |
| |
| %4:_(s32) = G_CONSTANT i32 8 |
| %5:_(p5) = G_PTR_ADD %0, %4 |
| G_BR %bb.2 |
| |
| bb.2: |
| %6:_(p5) = G_PHI %0, %bb.0, %5, %bb.1 |
| $vgpr0 = COPY %6 |
| S_SETPC_B64 undef $sgpr30_sgpr31 |
| |
| ... |
| --- |
| name: test_phi_p0 |
| tracksRegLiveness: true |
| |
| body: | |
| ; CHECK-LABEL: name: test_phi_p0 |
| ; CHECK: bb.0: |
| ; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000) |
| ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2 |
| ; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1 |
| ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2 |
| ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 |
| ; CHECK: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]] |
| ; CHECK: G_BRCOND [[ICMP]](s1), %bb.1 |
| ; CHECK: G_BR %bb.2 |
| ; CHECK: bb.1: |
| ; CHECK: successors: %bb.2(0x80000000) |
| ; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 |
| ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C1]](s64) |
| ; CHECK: G_BR %bb.2 |
| ; CHECK: bb.2: |
| ; CHECK: [[PHI:%[0-9]+]]:_(p0) = G_PHI [[COPY]](p0), %bb.0, [[PTR_ADD]](p0), %bb.1 |
| ; CHECK: $vgpr0_vgpr1 = COPY [[PHI]](p0) |
| ; CHECK: S_SETPC_B64 undef $sgpr30_sgpr31 |
| bb.0: |
| successors: %bb.1, %bb.2 |
| liveins: $vgpr0_vgpr1, $vgpr2 |
| |
| %0:_(p0) = COPY $vgpr0_vgpr1 |
| %1:_(s32) = COPY $vgpr2 |
| %2:_(s32) = G_CONSTANT i32 0 |
| %3:_(s1) = G_ICMP intpred(eq), %1, %2 |
| G_BRCOND %3, %bb.1 |
| G_BR %bb.2 |
| |
| bb.1: |
| successors: %bb.2 |
| |
| %4:_(s64) = G_CONSTANT i64 8 |
| %5:_(p0) = G_PTR_ADD %0, %4 |
| G_BR %bb.2 |
| |
| bb.2: |
| %6:_(p0) = G_PHI %0, %bb.0, %5, %bb.1 |
| $vgpr0_vgpr1 = COPY %6 |
| S_SETPC_B64 undef $sgpr30_sgpr31 |
| |
| ... |
| --- |
| name: test_phi_p1 |
| tracksRegLiveness: true |
| |
| body: | |
| ; CHECK-LABEL: name: test_phi_p1 |
| ; CHECK: bb.0: |
| ; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000) |
| ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2 |
| ; CHECK: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 |
| ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2 |
| ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 |
| ; CHECK: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]] |
| ; CHECK: G_BRCOND [[ICMP]](s1), %bb.1 |
| ; CHECK: G_BR %bb.2 |
| ; CHECK: bb.1: |
| ; CHECK: successors: %bb.2(0x80000000) |
| ; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 |
| ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C1]](s64) |
| ; CHECK: G_BR %bb.2 |
| ; CHECK: bb.2: |
| ; CHECK: [[PHI:%[0-9]+]]:_(p1) = G_PHI [[COPY]](p1), %bb.0, [[PTR_ADD]](p1), %bb.1 |
| ; CHECK: $vgpr0_vgpr1 = COPY [[PHI]](p1) |
| ; CHECK: S_SETPC_B64 undef $sgpr30_sgpr31 |
| bb.0: |
| successors: %bb.1, %bb.2 |
| liveins: $vgpr0_vgpr1, $vgpr2 |
| |
| %0:_(p1) = COPY $vgpr0_vgpr1 |
| %1:_(s32) = COPY $vgpr2 |
| %2:_(s32) = G_CONSTANT i32 0 |
| %3:_(s1) = G_ICMP intpred(eq), %1, %2 |
| G_BRCOND %3, %bb.1 |
| G_BR %bb.2 |
| |
| bb.1: |
| successors: %bb.2 |
| |
| %4:_(s64) = G_CONSTANT i64 8 |
| %5:_(p1) = G_PTR_ADD %0, %4 |
| G_BR %bb.2 |
| |
| bb.2: |
| %6:_(p1) = G_PHI %0, %bb.0, %5, %bb.1 |
| $vgpr0_vgpr1 = COPY %6 |
| S_SETPC_B64 undef $sgpr30_sgpr31 |
| |
| ... |
| --- |
| name: test_phi_p4 |
| tracksRegLiveness: true |
| |
| body: | |
| ; CHECK-LABEL: name: test_phi_p4 |
| ; CHECK: bb.0: |
| ; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000) |
| ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2 |
| ; CHECK: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 |
| ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2 |
| ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 |
| ; CHECK: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]] |
| ; CHECK: G_BRCOND [[ICMP]](s1), %bb.1 |
| ; CHECK: G_BR %bb.2 |
| ; CHECK: bb.1: |
| ; CHECK: successors: %bb.2(0x80000000) |
| ; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 |
| ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) |
| ; CHECK: G_BR %bb.2 |
| ; CHECK: bb.2: |
| ; CHECK: [[PHI:%[0-9]+]]:_(p4) = G_PHI [[COPY]](p4), %bb.0, [[PTR_ADD]](p4), %bb.1 |
| ; CHECK: $vgpr0_vgpr1 = COPY [[PHI]](p4) |
| ; CHECK: S_SETPC_B64 undef $sgpr30_sgpr31 |
| bb.0: |
| successors: %bb.1, %bb.2 |
| liveins: $vgpr0_vgpr1, $vgpr2 |
| |
| %0:_(p4) = COPY $vgpr0_vgpr1 |
| %1:_(s32) = COPY $vgpr2 |
| %2:_(s32) = G_CONSTANT i32 0 |
| %3:_(s1) = G_ICMP intpred(eq), %1, %2 |
| G_BRCOND %3, %bb.1 |
| G_BR %bb.2 |
| |
| bb.1: |
| successors: %bb.2 |
| |
| %4:_(s64) = G_CONSTANT i64 8 |
| %5:_(p4) = G_PTR_ADD %0, %4 |
| G_BR %bb.2 |
| |
| bb.2: |
| %6:_(p4) = G_PHI %0, %bb.0, %5, %bb.1 |
| $vgpr0_vgpr1 = COPY %6 |
| S_SETPC_B64 undef $sgpr30_sgpr31 |
| |
| ... |
| --- |
| name: test_phi_p9999 |
| tracksRegLiveness: true |
| |
| body: | |
| ; CHECK-LABEL: name: test_phi_p9999 |
| ; CHECK: bb.0: |
| ; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000) |
| ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2 |
| ; CHECK: [[COPY:%[0-9]+]]:_(p9999) = COPY $vgpr0_vgpr1 |
| ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2 |
| ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 |
| ; CHECK: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]] |
| ; CHECK: G_BRCOND [[ICMP]](s1), %bb.1 |
| ; CHECK: G_BR %bb.2 |
| ; CHECK: bb.1: |
| ; CHECK: successors: %bb.2(0x80000000) |
| ; CHECK: [[DEF:%[0-9]+]]:_(p9999) = G_IMPLICIT_DEF |
| ; CHECK: G_BR %bb.2 |
| ; CHECK: bb.2: |
| ; CHECK: [[PHI:%[0-9]+]]:_(p9999) = G_PHI [[COPY]](p9999), %bb.0, [[DEF]](p9999), %bb.1 |
| ; CHECK: $vgpr0_vgpr1 = COPY [[PHI]](p9999) |
| ; CHECK: S_SETPC_B64 undef $sgpr30_sgpr31 |
| bb.0: |
| successors: %bb.1, %bb.2 |
| liveins: $vgpr0_vgpr1, $vgpr2 |
| |
| %0:_(p9999) = COPY $vgpr0_vgpr1 |
| %1:_(s32) = COPY $vgpr2 |
| %2:_(s32) = G_CONSTANT i32 0 |
| %3:_(s1) = G_ICMP intpred(eq), %1, %2 |
| G_BRCOND %3, %bb.1 |
| G_BR %bb.2 |
| |
| bb.1: |
| successors: %bb.2 |
| |
| %4:_(p9999) = G_IMPLICIT_DEF |
| G_BR %bb.2 |
| |
| bb.2: |
| %5:_(p9999) = G_PHI %0, %bb.0, %4, %bb.1 |
| $vgpr0_vgpr1 = COPY %5 |
| S_SETPC_B64 undef $sgpr30_sgpr31 |
| |
| ... |
| --- |
| name: test_phi_s1 |
| tracksRegLiveness: true |
| |
| body: | |
| ; CHECK-LABEL: name: test_phi_s1 |
| ; CHECK: bb.0: |
| ; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000) |
| ; CHECK: liveins: $vgpr0, $vgpr1 |
| ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 |
| ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 |
| ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 |
| ; CHECK: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]] |
| ; CHECK: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[COPY1]](s32) |
| ; CHECK: G_BRCOND [[ICMP]](s1), %bb.1 |
| ; CHECK: G_BR %bb.2 |
| ; CHECK: bb.1: |
| ; CHECK: successors: %bb.2(0x80000000) |
| ; CHECK: [[DEF:%[0-9]+]]:_(s1) = G_IMPLICIT_DEF |
| ; CHECK: G_BR %bb.2 |
| ; CHECK: bb.2: |
| ; CHECK: [[PHI:%[0-9]+]]:_(s1) = G_PHI [[TRUNC]](s1), %bb.0, [[DEF]](s1), %bb.1 |
| ; CHECK: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[PHI]](s1) |
| ; CHECK: $vgpr0 = COPY [[ZEXT]](s32) |
| ; CHECK: S_SETPC_B64 undef $sgpr30_sgpr31 |
| bb.0: |
| successors: %bb.1, %bb.2 |
| liveins: $vgpr0, $vgpr1 |
| |
| %0:_(s32) = COPY $vgpr0 |
| %1:_(s32) = COPY $vgpr1 |
| %2:_(s32) = G_CONSTANT i32 0 |
| %3:_(s1) = G_ICMP intpred(eq), %1, %2 |
| %4:_(s1) = G_TRUNC %1 |
| G_BRCOND %3, %bb.1 |
| G_BR %bb.2 |
| |
| bb.1: |
| successors: %bb.2 |
| |
| %5:_(s1) = G_IMPLICIT_DEF |
| G_BR %bb.2 |
| |
| bb.2: |
| %6:_(s1) = G_PHI %4, %bb.0, %5, %bb.1 |
| %7:_(s32) = G_ZEXT %6 |
| $vgpr0 = COPY %7 |
| S_SETPC_B64 undef $sgpr30_sgpr31 |
| |
| ... |
| --- |
| name: test_phi_s7 |
| tracksRegLiveness: true |
| |
| body: | |
| ; CHECK-LABEL: name: test_phi_s7 |
| ; CHECK: bb.0: |
| ; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000) |
| ; CHECK: liveins: $vgpr0, $vgpr1 |
| ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 |
| ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 |
| ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 |
| ; CHECK: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]] |
| ; CHECK: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32) |
| ; CHECK: G_BRCOND [[ICMP]](s1), %bb.1 |
| ; CHECK: G_BR %bb.2 |
| ; CHECK: bb.1: |
| ; CHECK: successors: %bb.2(0x80000000) |
| ; CHECK: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF |
| ; CHECK: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[DEF]](s32) |
| ; CHECK: G_BR %bb.2 |
| ; CHECK: bb.2: |
| ; CHECK: [[PHI:%[0-9]+]]:_(s16) = G_PHI [[TRUNC]](s16), %bb.0, [[TRUNC1]](s16), %bb.1 |
| ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 127 |
| ; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[PHI]](s16) |
| ; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[ANYEXT]], [[C1]] |
| ; CHECK: $vgpr0 = COPY [[AND]](s32) |
| ; CHECK: S_SETPC_B64 undef $sgpr30_sgpr31 |
| bb.0: |
| successors: %bb.1, %bb.2 |
| liveins: $vgpr0, $vgpr1 |
| |
| %0:_(s32) = COPY $vgpr0 |
| %1:_(s32) = COPY $vgpr1 |
| %2:_(s32) = G_CONSTANT i32 0 |
| %3:_(s1) = G_ICMP intpred(eq), %1, %2 |
| %4:_(s7) = G_TRUNC %1 |
| G_BRCOND %3, %bb.1 |
| G_BR %bb.2 |
| |
| bb.1: |
| successors: %bb.2 |
| |
| %5:_(s7) = G_IMPLICIT_DEF |
| G_BR %bb.2 |
| |
| bb.2: |
| %6:_(s7) = G_PHI %4, %bb.0, %5, %bb.1 |
| %7:_(s32) = G_ZEXT %6 |
| $vgpr0 = COPY %7 |
| S_SETPC_B64 undef $sgpr30_sgpr31 |
| |
| ... |
| --- |
| name: test_phi_s8 |
| tracksRegLiveness: true |
| |
| body: | |
| ; CHECK-LABEL: name: test_phi_s8 |
| ; CHECK: bb.0: |
| ; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000) |
| ; CHECK: liveins: $vgpr0, $vgpr1 |
| ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 |
| ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 |
| ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 |
| ; CHECK: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]] |
| ; CHECK: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32) |
| ; CHECK: G_BRCOND [[ICMP]](s1), %bb.1 |
| ; CHECK: G_BR %bb.2 |
| ; CHECK: bb.1: |
| ; CHECK: successors: %bb.2(0x80000000) |
| ; CHECK: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF |
| ; CHECK: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[DEF]](s32) |
| ; CHECK: G_BR %bb.2 |
| ; CHECK: bb.2: |
| ; CHECK: [[PHI:%[0-9]+]]:_(s16) = G_PHI [[TRUNC]](s16), %bb.0, [[TRUNC1]](s16), %bb.1 |
| ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 |
| ; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[PHI]](s16) |
| ; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[ANYEXT]], [[C1]] |
| ; CHECK: $vgpr0 = COPY [[AND]](s32) |
| ; CHECK: S_SETPC_B64 undef $sgpr30_sgpr31 |
| bb.0: |
| successors: %bb.1, %bb.2 |
| liveins: $vgpr0, $vgpr1 |
| |
| %0:_(s32) = COPY $vgpr0 |
| %1:_(s32) = COPY $vgpr1 |
| %2:_(s32) = G_CONSTANT i32 0 |
| %3:_(s1) = G_ICMP intpred(eq), %1, %2 |
| %4:_(s8) = G_TRUNC %1 |
| G_BRCOND %3, %bb.1 |
| G_BR %bb.2 |
| |
| bb.1: |
| successors: %bb.2 |
| |
| %5:_(s8) = G_IMPLICIT_DEF |
| G_BR %bb.2 |
| |
| bb.2: |
| %6:_(s8) = G_PHI %4, %bb.0, %5, %bb.1 |
| %7:_(s32) = G_ZEXT %6 |
| $vgpr0 = COPY %7 |
| S_SETPC_B64 undef $sgpr30_sgpr31 |
| |
| ... |
| --- |
| name: test_phi_s16 |
| tracksRegLiveness: true |
| |
| body: | |
| ; CHECK-LABEL: name: test_phi_s16 |
| ; CHECK: bb.0: |
| ; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000) |
| ; CHECK: liveins: $vgpr0, $vgpr1 |
| ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 |
| ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 |
| ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 |
| ; CHECK: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]] |
| ; CHECK: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32) |
| ; CHECK: G_BRCOND [[ICMP]](s1), %bb.1 |
| ; CHECK: G_BR %bb.2 |
| ; CHECK: bb.1: |
| ; CHECK: successors: %bb.2(0x80000000) |
| ; CHECK: [[DEF:%[0-9]+]]:_(s16) = G_IMPLICIT_DEF |
| ; CHECK: G_BR %bb.2 |
| ; CHECK: bb.2: |
| ; CHECK: [[PHI:%[0-9]+]]:_(s16) = G_PHI [[TRUNC]](s16), %bb.0, [[DEF]](s16), %bb.1 |
| ; CHECK: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[PHI]](s16) |
| ; CHECK: $vgpr0 = COPY [[ZEXT]](s32) |
| ; CHECK: S_SETPC_B64 undef $sgpr30_sgpr31 |
| bb.0: |
| successors: %bb.1, %bb.2 |
| liveins: $vgpr0, $vgpr1 |
| |
| %0:_(s32) = COPY $vgpr0 |
| %1:_(s32) = COPY $vgpr1 |
| %2:_(s32) = G_CONSTANT i32 0 |
| %3:_(s1) = G_ICMP intpred(eq), %1, %2 |
| %4:_(s16) = G_TRUNC %1 |
| G_BRCOND %3, %bb.1 |
| G_BR %bb.2 |
| |
| bb.1: |
| successors: %bb.2 |
| |
| %5:_(s16) = G_IMPLICIT_DEF |
| G_BR %bb.2 |
| |
| bb.2: |
| %6:_(s16) = G_PHI %4, %bb.0, %5, %bb.1 |
| %7:_(s32) = G_ZEXT %6 |
| $vgpr0 = COPY %7 |
| S_SETPC_B64 undef $sgpr30_sgpr31 |
| |
| ... |
| --- |
| name: test_phi_s128 |
| tracksRegLiveness: true |
| |
| body: | |
| ; CHECK-LABEL: name: test_phi_s128 |
| ; CHECK: bb.0: |
| ; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000) |
| ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4 |
| ; CHECK: [[COPY:%[0-9]+]]:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 |
| ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr4 |
| ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 |
| ; CHECK: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]] |
| ; CHECK: G_BRCOND [[ICMP]](s1), %bb.1 |
| ; CHECK: G_BR %bb.2 |
| ; CHECK: bb.1: |
| ; CHECK: successors: %bb.2(0x80000000) |
| ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s128) |
| ; CHECK: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32), [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s128) |
| ; CHECK: [[UADDO:%[0-9]+]]:_(s32), [[UADDO1:%[0-9]+]]:_(s1) = G_UADDO [[UV]], [[UV4]] |
| ; CHECK: [[UADDE:%[0-9]+]]:_(s32), [[UADDE1:%[0-9]+]]:_(s1) = G_UADDE [[UV1]], [[UV5]], [[UADDO1]] |
| ; CHECK: [[UADDE2:%[0-9]+]]:_(s32), [[UADDE3:%[0-9]+]]:_(s1) = G_UADDE [[UV2]], [[UV6]], [[UADDE1]] |
| ; CHECK: [[UADDE4:%[0-9]+]]:_(s32), [[UADDE5:%[0-9]+]]:_(s1) = G_UADDE [[UV3]], [[UV7]], [[UADDE3]] |
| ; CHECK: [[MV:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[UADDO]](s32), [[UADDE]](s32), [[UADDE2]](s32), [[UADDE4]](s32) |
| ; CHECK: G_BR %bb.2 |
| ; CHECK: bb.2: |
| ; CHECK: [[PHI:%[0-9]+]]:_(s128) = G_PHI [[COPY]](s128), %bb.0, [[MV]](s128), %bb.1 |
| ; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[PHI]](s128) |
| ; CHECK: S_SETPC_B64 undef $sgpr30_sgpr31 |
| bb.0: |
| successors: %bb.1, %bb.2 |
| liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4 |
| |
| %0:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 |
| %1:_(s32) = COPY $vgpr4 |
| %2:_(s32) = G_CONSTANT i32 0 |
| %3:_(s1) = G_ICMP intpred(eq), %1, %2 |
| G_BRCOND %3, %bb.1 |
| G_BR %bb.2 |
| |
| bb.1: |
| successors: %bb.2 |
| |
| %4:_(s128) = G_ADD %0, %0 |
| G_BR %bb.2 |
| |
| bb.2: |
| %5:_(s128) = G_PHI %0, %bb.0, %4, %bb.1 |
| $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %5 |
| S_SETPC_B64 undef $sgpr30_sgpr31 |
| |
| ... |
| --- |
| name: test_phi_s256 |
| tracksRegLiveness: true |
| |
| body: | |
| ; CHECK-LABEL: name: test_phi_s256 |
| ; CHECK: bb.0: |
| ; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000) |
| ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7, $vgpr8 |
| ; CHECK: [[COPY:%[0-9]+]]:_(s256) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 |
| ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr8 |
| ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 |
| ; CHECK: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]] |
| ; CHECK: G_BRCOND [[ICMP]](s1), %bb.1 |
| ; CHECK: G_BR %bb.2 |
| ; CHECK: bb.1: |
| ; CHECK: successors: %bb.2(0x80000000) |
| ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32), [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s256) |
| ; CHECK: [[UV8:%[0-9]+]]:_(s32), [[UV9:%[0-9]+]]:_(s32), [[UV10:%[0-9]+]]:_(s32), [[UV11:%[0-9]+]]:_(s32), [[UV12:%[0-9]+]]:_(s32), [[UV13:%[0-9]+]]:_(s32), [[UV14:%[0-9]+]]:_(s32), [[UV15:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s256) |
| ; CHECK: [[UADDO:%[0-9]+]]:_(s32), [[UADDO1:%[0-9]+]]:_(s1) = G_UADDO [[UV]], [[UV8]] |
| ; CHECK: [[UADDE:%[0-9]+]]:_(s32), [[UADDE1:%[0-9]+]]:_(s1) = G_UADDE [[UV1]], [[UV9]], [[UADDO1]] |
| ; CHECK: [[UADDE2:%[0-9]+]]:_(s32), [[UADDE3:%[0-9]+]]:_(s1) = G_UADDE [[UV2]], [[UV10]], [[UADDE1]] |
| ; CHECK: [[UADDE4:%[0-9]+]]:_(s32), [[UADDE5:%[0-9]+]]:_(s1) = G_UADDE [[UV3]], [[UV11]], [[UADDE3]] |
| ; CHECK: [[UADDE6:%[0-9]+]]:_(s32), [[UADDE7:%[0-9]+]]:_(s1) = G_UADDE [[UV4]], [[UV12]], [[UADDE5]] |
| ; CHECK: [[UADDE8:%[0-9]+]]:_(s32), [[UADDE9:%[0-9]+]]:_(s1) = G_UADDE [[UV5]], [[UV13]], [[UADDE7]] |
| ; CHECK: [[UADDE10:%[0-9]+]]:_(s32), [[UADDE11:%[0-9]+]]:_(s1) = G_UADDE [[UV6]], [[UV14]], [[UADDE9]] |
| ; CHECK: [[UADDE12:%[0-9]+]]:_(s32), [[UADDE13:%[0-9]+]]:_(s1) = G_UADDE [[UV7]], [[UV15]], [[UADDE11]] |
| ; CHECK: [[MV:%[0-9]+]]:_(s256) = G_MERGE_VALUES [[UADDO]](s32), [[UADDE]](s32), [[UADDE2]](s32), [[UADDE4]](s32), [[UADDE6]](s32), [[UADDE8]](s32), [[UADDE10]](s32), [[UADDE12]](s32) |
| ; CHECK: G_BR %bb.2 |
| ; CHECK: bb.2: |
| ; CHECK: [[PHI:%[0-9]+]]:_(s256) = G_PHI [[COPY]](s256), %bb.0, [[MV]](s256), %bb.1 |
| ; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[PHI]](s256) |
| ; CHECK: S_SETPC_B64 undef $sgpr30_sgpr31 |
| bb.0: |
| successors: %bb.1, %bb.2 |
| liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7, $vgpr8 |
| |
| %0:_(s256) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 |
| %1:_(s32) = COPY $vgpr8 |
| %2:_(s32) = G_CONSTANT i32 0 |
| %3:_(s1) = G_ICMP intpred(eq), %1, %2 |
| G_BRCOND %3, %bb.1 |
| G_BR %bb.2 |
| |
| bb.1: |
| successors: %bb.2 |
| |
| %4:_(s256) = G_ADD %0, %0 |
| G_BR %bb.2 |
| |
| bb.2: |
| %5:_(s256) = G_PHI %0, %bb.0, %4, %bb.1 |
| $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY %5 |
| S_SETPC_B64 undef $sgpr30_sgpr31 |
| |
| ... |
| --- |
| name: test_phi_v2s1 |
| tracksRegLiveness: true |
| |
| body: | |
| ; CHECK-LABEL: name: test_phi_v2s1 |
| ; CHECK: bb.0: |
| ; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000) |
| ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3 |
| ; CHECK: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0 |
| ; CHECK: [[COPY1:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr1 |
| ; CHECK: [[COPY2:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr2 |
| ; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr1 |
| ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 |
| ; CHECK: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[COPY]](<2 x s16>) |
| ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 |
| ; CHECK: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C1]](s32) |
| ; CHECK: [[BITCAST1:%[0-9]+]]:_(s32) = G_BITCAST [[COPY1]](<2 x s16>) |
| ; CHECK: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST1]], [[C1]](s32) |
| ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 |
| ; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[BITCAST]], [[C2]] |
| ; CHECK: [[AND1:%[0-9]+]]:_(s32) = G_AND [[BITCAST1]], [[C2]] |
| ; CHECK: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[AND]](s32), [[AND1]] |
| ; CHECK: [[AND2:%[0-9]+]]:_(s32) = G_AND [[LSHR]], [[C2]] |
| ; CHECK: [[AND3:%[0-9]+]]:_(s32) = G_AND [[LSHR1]], [[C2]] |
| ; CHECK: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[AND2]](s32), [[AND3]] |
| ; CHECK: [[ICMP2:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[COPY3]](s32), [[C]] |
| ; CHECK: G_BRCOND [[ICMP2]](s1), %bb.1 |
| ; CHECK: G_BR %bb.2 |
| ; CHECK: bb.1: |
| ; CHECK: successors: %bb.2(0x80000000) |
| ; CHECK: [[BITCAST2:%[0-9]+]]:_(s32) = G_BITCAST [[COPY]](<2 x s16>) |
| ; CHECK: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 |
| ; CHECK: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST2]], [[C3]](s32) |
| ; CHECK: [[BITCAST3:%[0-9]+]]:_(s32) = G_BITCAST [[COPY2]](<2 x s16>) |
| ; CHECK: [[LSHR3:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST3]], [[C3]](s32) |
| ; CHECK: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 |
| ; CHECK: [[AND4:%[0-9]+]]:_(s32) = G_AND [[BITCAST2]], [[C4]] |
| ; CHECK: [[AND5:%[0-9]+]]:_(s32) = G_AND [[BITCAST3]], [[C4]] |
| ; CHECK: [[ICMP3:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[AND4]](s32), [[AND5]] |
| ; CHECK: [[AND6:%[0-9]+]]:_(s32) = G_AND [[LSHR2]], [[C4]] |
| ; CHECK: [[AND7:%[0-9]+]]:_(s32) = G_AND [[LSHR3]], [[C4]] |
| ; CHECK: [[ICMP4:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[AND6]](s32), [[AND7]] |
| ; CHECK: G_BR %bb.2 |
| ; CHECK: bb.2: |
| ; CHECK: [[PHI:%[0-9]+]]:_(s1) = G_PHI [[ICMP]](s1), %bb.0, [[ICMP3]](s1), %bb.1 |
| ; CHECK: [[PHI1:%[0-9]+]]:_(s1) = G_PHI [[ICMP1]](s1), %bb.0, [[ICMP4]](s1), %bb.1 |
| ; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[PHI]](s1) |
| ; CHECK: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[PHI1]](s1) |
| ; CHECK: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 |
| ; CHECK: [[AND8:%[0-9]+]]:_(s32) = G_AND [[ANYEXT]], [[C5]] |
| ; CHECK: [[AND9:%[0-9]+]]:_(s32) = G_AND [[ANYEXT1]], [[C5]] |
| ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[AND8]](s32), [[AND9]](s32) |
| ; CHECK: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>) |
| ; CHECK: S_SETPC_B64 undef $sgpr30_sgpr31 |
| bb.0: |
| successors: %bb.1, %bb.2 |
| liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3 |
| |
| %0:_(<2 x s16>) = COPY $vgpr0 |
| %1:_(<2 x s16>) = COPY $vgpr1 |
| %2:_(<2 x s16>) = COPY $vgpr2 |
| %3:_(s32) = COPY $vgpr1 |
| %4:_(s32) = G_CONSTANT i32 0 |
| %5:_(<2 x s1>) = G_ICMP intpred(eq), %0, %1 |
| %6:_(s1) = G_ICMP intpred(eq), %3, %4 |
| G_BRCOND %6, %bb.1 |
| G_BR %bb.2 |
| |
| bb.1: |
| successors: %bb.2 |
| |
| %7:_(<2 x s1>) = G_ICMP intpred(ne), %0, %2 |
| G_BR %bb.2 |
| |
| bb.2: |
| %8:_(<2 x s1>) = G_PHI %5, %bb.0, %7, %bb.1 |
| %9:_(<2 x s32>) = G_ZEXT %8 |
| $vgpr0_vgpr1 = COPY %9 |
| S_SETPC_B64 undef $sgpr30_sgpr31 |
| ... |