| # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py |
| # RUN: llc -march=amdgcn -mcpu=fiji -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck %s |
| # RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck %s |
| # RUN: llc -march=amdgcn -mcpu=gfx1010 -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck %s |
| |
| --- |
| name: fmaxnum_ieee_f16_vv |
| legalized: true |
| regBankSelected: true |
| |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1 |
| |
| ; CHECK-LABEL: name: fmaxnum_ieee_f16_vv |
| ; CHECK: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1 |
| ; CHECK: %4:vgpr_32 = nofpexcept V_MAX_F16_e64 0, [[COPY]], 0, [[COPY1]], 0, 0, implicit $mode, implicit $exec |
| ; CHECK: S_ENDPGM 0, implicit %4 |
| %0:vgpr(s32) = COPY $vgpr0 |
| %1:vgpr(s32) = COPY $vgpr1 |
| %2:vgpr(s16) = G_TRUNC %0 |
| %3:vgpr(s16) = G_TRUNC %1 |
| %4:vgpr(s16) = G_FMAXNUM_IEEE %2, %3 |
| S_ENDPGM 0, implicit %4 |
| ... |
| |
| --- |
| name: fmaxnum_ieee_f16_v_fneg_v |
| legalized: true |
| regBankSelected: true |
| |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1 |
| |
| ; CHECK-LABEL: name: fmaxnum_ieee_f16_v_fneg_v |
| ; CHECK: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1 |
| ; CHECK: %5:vgpr_32 = nofpexcept V_MAX_F16_e64 0, [[COPY]], 1, [[COPY1]], 0, 0, implicit $mode, implicit $exec |
| ; CHECK: S_ENDPGM 0, implicit %5 |
| %0:vgpr(s32) = COPY $vgpr0 |
| %1:vgpr(s32) = COPY $vgpr1 |
| %2:vgpr(s16) = G_TRUNC %0 |
| %3:vgpr(s16) = G_TRUNC %1 |
| %4:vgpr(s16) = G_FNEG %3 |
| %5:vgpr(s16) = G_FMAXNUM_IEEE %2, %4 |
| S_ENDPGM 0, implicit %5 |
| ... |