llvm/test/CodeGen/Thumb2/mve-vpt-block-debug.mir - llvm-project - Git at Google

 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
 # RUN: llc -run-pass arm-mve-vpt %s -o - | FileCheck %s

 --- |
   target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
   target triple = "thumbv8.1m.main-none-unknown-eabihf"

   define <4 x i32> @test(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) #0 !dbg !5 {
   entry:
     call void @llvm.dbg.value(metadata <4 x i32> %x, metadata !17, metadata !DIExpression()), !dbg !21
     call void @llvm.dbg.value(metadata <4 x i32> %y, metadata !18, metadata !DIExpression()), !dbg !21
     call void @llvm.dbg.value(metadata <4 x i32> %z, metadata !19, metadata !DIExpression()), !dbg !21
     %0 = icmp sle <4 x i32> %x, %y, !dbg !22
     call void @llvm.dbg.value(metadata i32 undef, metadata !20, metadata !DIExpression()), !dbg !21
     %1 = tail call <4 x i32> @llvm.arm.mve.add.predicated.v4i32.v4i1(<4 x i32> %x, <4 x i32> %y, <4 x i1> %0, <4 x i32> %z), !dbg !23
     call void @llvm.dbg.value(metadata <4 x i32> %1, metadata !19, metadata !DIExpression()), !dbg !21
     %2 = icmp sgt <4 x i32> %x, %y, !dbg !24
     call void @llvm.dbg.value(metadata i32 undef, metadata !20, metadata !DIExpression()), !dbg !21
     %3 = tail call <4 x i32> @llvm.arm.mve.add.predicated.v4i32.v4i1(<4 x i32> %x, <4 x i32> %y, <4 x i1> %2, <4 x i32> %1), !dbg !25
     call void @llvm.dbg.value(metadata <4 x i32> %3, metadata !19, metadata !DIExpression()), !dbg !21
     ret <4 x i32> %3, !dbg !26
   }

   declare <4 x i32> @llvm.arm.mve.add.predicated.v4i32.v4i1(<4 x i32>, <4 x i32>, <4 x i1>, <4 x i32>) #1
   declare void @llvm.dbg.value(metadata, metadata, metadata) #2

   attributes #0 = { "target-features"="+fullfp16,+lob,+mve.fp" }
   attributes #1 = { nounwind readnone "target-features"="+fullfp16,+lob,+mve.fp" }
   attributes #2 = { nofree nosync nounwind readnone speculatable willreturn "target-features"="+fullfp16,+lob,+mve.fp" }

   !llvm.dbg.cu = !{!0}
   !llvm.module.flags = !{!3, !4}

   !0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 13.0.0 (https://github.com/llvm/llvm-project 921572a18dc9b97c259bda2ce8130f04b2ebe3ed)", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, splitDebugInlining: false, nameTableKind: None)
   !1 = !DIFile(filename: "tmp.c", directory: "/work/llvm-project/build")
   !2 = !{}
   !3 = !{i32 7, !"Dwarf Version", i32 4}
   !4 = !{i32 2, !"Debug Info Version", i32 3}
   !5 = distinct !DISubprogram(name: "test", scope: !1, file: !1, line: 2, type: !6, scopeLine: 2, flags: DIFlagPrototyped | DIFlagAllCallsDescribed, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0, retainedNodes: !16)
   !6 = !DISubroutineType(types: !7)
   !7 = !{!8, !8, !8, !8}
   !8 = !DIDerivedType(tag: DW_TAG_typedef, name: "int32x4_t", file: !9, line: 28, baseType: !10)
   !9 = !DIFile(filename: "lib/clang/13.0.0/include/arm_mve.h", directory: "/work/llvm-project/build")
   !10 = !DICompositeType(tag: DW_TAG_array_type, baseType: !11, size: 128, flags: DIFlagVector, elements: !14)
   !11 = !DIDerivedType(tag: DW_TAG_typedef, name: "int32_t", file: !12, line: 58, baseType: !13)
   !12 = !DIFile(filename: "pb-rel/testabletools/include/stdint.h", directory: "/work")
   !13 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
   !14 = !{!15}
   !15 = !DISubrange(count: 4)
   !16 = !{!17, !18, !19, !20}
   !17 = !DILocalVariable(name: "x", arg: 1, scope: !5, file: !1, line: 2, type: !8)
   !18 = !DILocalVariable(name: "y", arg: 2, scope: !5, file: !1, line: 2, type: !8)
   !19 = !DILocalVariable(name: "z", arg: 3, scope: !5, file: !1, line: 2, type: !8)
   !20 = !DILocalVariable(name: "p", scope: !5, file: !1, line: 3, type: !13)
   !21 = !DILocation(line: 0, scope: !5)
   !22 = !DILocation(line: 3, column: 11, scope: !5)
   !23 = !DILocation(line: 4, column: 7, scope: !5)
   !24 = !DILocation(line: 5, column: 7, scope: !5)
   !25 = !DILocation(line: 6, column: 7, scope: !5)
   !26 = !DILocation(line: 7, column: 3, scope: !5)

 ...
 ---
 name:            test
 tracksRegLiveness: true
 liveins:
   - { reg: '$q0', virtual-reg: '' }
   - { reg: '$q1', virtual-reg: '' }
   - { reg: '$q2', virtual-reg: '' }
 body:             |
   bb.0.entry:
     liveins: $q0, $q1, $q2

     ; CHECK-LABEL: name: test
     ; CHECK: liveins: $q0, $q1, $q2
     ; CHECK: DBG_VALUE $q0, $noreg, !17, !DIExpression(), debug-location !21
     ; CHECK: DBG_VALUE $q0, $noreg, !17, !DIExpression(), debug-location !21
     ; CHECK: DBG_VALUE $q1, $noreg, !18, !DIExpression(), debug-location !21
     ; CHECK: DBG_VALUE $q1, $noreg, !18, !DIExpression(), debug-location !21
     ; CHECK: DBG_VALUE $q2, $noreg, !19, !DIExpression(), debug-location !21
     ; CHECK: DBG_VALUE $q2, $noreg, !19, !DIExpression(), debug-location !21
     ; CHECK: DBG_VALUE $noreg, $noreg, !20, !DIExpression(), debug-location !21
     ; CHECK: BUNDLE implicit-def dead $vpr, implicit-def $q2, implicit-def $d4, implicit-def $s8, implicit-def $s9, implicit-def $d5, implicit-def $s10, implicit-def $s11, implicit killed $q1, implicit killed $q0, implicit killed $q2, debug-location !23 {
     ; CHECK:   MVE_VPTv4s32 12, renamable $q1, renamable $q0, 10, implicit-def $vpr, debug-location !23
     ; CHECK:   renamable $q2 = MVE_VADDi32 renamable $q0, renamable $q1, 1, internal renamable $vpr, $noreg, killed renamable $q2, debug-location !23
     ; CHECK:   DBG_VALUE $noreg, $noreg, !20, !DIExpression(), debug-location !21
     ; CHECK:   DBG_VALUE internal $q2, $noreg, !19, !DIExpression(), debug-location !21
     ; CHECK:   renamable $q2 = MVE_VADDi32 killed renamable $q0, killed renamable $q1, 2, internal killed renamable $vpr, $noreg, internal killed renamable $q2, debug-location !25
     ; CHECK:   DBG_VALUE internal $q2, $noreg, !19, !DIExpression(), debug-location !21
     ; CHECK: }
     ; CHECK: $q0 = MVE_VORR killed $q2, killed $q2, 0, $noreg, $noreg, undef $q0, debug-location !26
     ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $q0, debug-location !26
     DBG_VALUE $q0, $noreg, !17, !DIExpression(), debug-location !21
     DBG_VALUE $q0, $noreg, !17, !DIExpression(), debug-location !21
     DBG_VALUE $q1, $noreg, !18, !DIExpression(), debug-location !21
     DBG_VALUE $q1, $noreg, !18, !DIExpression(), debug-location !21
     DBG_VALUE $q2, $noreg, !19, !DIExpression(), debug-location !21
     DBG_VALUE $q2, $noreg, !19, !DIExpression(), debug-location !21
     renamable $vpr = MVE_VCMPs32 renamable $q1, renamable $q0, 10, 0, $noreg, $noreg, debug-location !22
     DBG_VALUE $noreg, $noreg, !20, !DIExpression(), debug-location !21
     renamable $q2 = MVE_VADDi32 renamable $q0, renamable $q1, 1, renamable $vpr, $noreg, killed renamable $q2, debug-location !23
     DBG_VALUE $noreg, $noreg, !20, !DIExpression(), debug-location !21
     DBG_VALUE $q2, $noreg, !19, !DIExpression(), debug-location !21
     renamable $vpr = MVE_VPNOT killed renamable $vpr, 0, $noreg, $noreg, debug-location !24
     renamable $q2 = MVE_VADDi32 killed renamable $q0, killed renamable $q1, 1, killed renamable $vpr, $noreg, killed renamable $q2, debug-location !25
     DBG_VALUE $q2, $noreg, !19, !DIExpression(), debug-location !21
     $q0 = MVE_VORR killed $q2, killed $q2, 0, $noreg, $noreg, undef $q0, debug-location !26
     tBX_RET 14 /* CC::al */, $noreg, implicit $q0, debug-location !26

 ...
	# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
	# RUN: llc -run-pass arm-mve-vpt %s -o - \| FileCheck %s

	--- \|
	target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
	target triple = "thumbv8.1m.main-none-unknown-eabihf"

	define <4 x i32> @test(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) #0 !dbg !5 {
	entry:
	call void @llvm.dbg.value(metadata <4 x i32> %x, metadata !17, metadata !DIExpression()), !dbg !21
	call void @llvm.dbg.value(metadata <4 x i32> %y, metadata !18, metadata !DIExpression()), !dbg !21
	call void @llvm.dbg.value(metadata <4 x i32> %z, metadata !19, metadata !DIExpression()), !dbg !21
	%0 = icmp sle <4 x i32> %x, %y, !dbg !22
	call void @llvm.dbg.value(metadata i32 undef, metadata !20, metadata !DIExpression()), !dbg !21
	%1 = tail call <4 x i32> @llvm.arm.mve.add.predicated.v4i32.v4i1(<4 x i32> %x, <4 x i32> %y, <4 x i1> %0, <4 x i32> %z), !dbg !23
	call void @llvm.dbg.value(metadata <4 x i32> %1, metadata !19, metadata !DIExpression()), !dbg !21
	%2 = icmp sgt <4 x i32> %x, %y, !dbg !24
	call void @llvm.dbg.value(metadata i32 undef, metadata !20, metadata !DIExpression()), !dbg !21
	%3 = tail call <4 x i32> @llvm.arm.mve.add.predicated.v4i32.v4i1(<4 x i32> %x, <4 x i32> %y, <4 x i1> %2, <4 x i32> %1), !dbg !25
	call void @llvm.dbg.value(metadata <4 x i32> %3, metadata !19, metadata !DIExpression()), !dbg !21
	ret <4 x i32> %3, !dbg !26
	}

	declare <4 x i32> @llvm.arm.mve.add.predicated.v4i32.v4i1(<4 x i32>, <4 x i32>, <4 x i1>, <4 x i32>) #1
	declare void @llvm.dbg.value(metadata, metadata, metadata) #2

	attributes #0 = { "target-features"="+fullfp16,+lob,+mve.fp" }
	attributes #1 = { nounwind readnone "target-features"="+fullfp16,+lob,+mve.fp" }
	attributes #2 = { nofree nosync nounwind readnone speculatable willreturn "target-features"="+fullfp16,+lob,+mve.fp" }

	!llvm.dbg.cu = !{!0}
	!llvm.module.flags = !{!3, !4}

	!0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 13.0.0 (https://github.com/llvm/llvm-project 921572a18dc9b97c259bda2ce8130f04b2ebe3ed)", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, splitDebugInlining: false, nameTableKind: None)
	!1 = !DIFile(filename: "tmp.c", directory: "/work/llvm-project/build")
	!2 = !{}
	!3 = !{i32 7, !"Dwarf Version", i32 4}
	!4 = !{i32 2, !"Debug Info Version", i32 3}
	!5 = distinct !DISubprogram(name: "test", scope: !1, file: !1, line: 2, type: !6, scopeLine: 2, flags: DIFlagPrototyped \| DIFlagAllCallsDescribed, spFlags: DISPFlagDefinition \| DISPFlagOptimized, unit: !0, retainedNodes: !16)
	!6 = !DISubroutineType(types: !7)
	!7 = !{!8, !8, !8, !8}
	!8 = !DIDerivedType(tag: DW_TAG_typedef, name: "int32x4_t", file: !9, line: 28, baseType: !10)
	!9 = !DIFile(filename: "lib/clang/13.0.0/include/arm_mve.h", directory: "/work/llvm-project/build")
	!10 = !DICompositeType(tag: DW_TAG_array_type, baseType: !11, size: 128, flags: DIFlagVector, elements: !14)
	!11 = !DIDerivedType(tag: DW_TAG_typedef, name: "int32_t", file: !12, line: 58, baseType: !13)
	!12 = !DIFile(filename: "pb-rel/testabletools/include/stdint.h", directory: "/work")
	!13 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
	!14 = !{!15}
	!15 = !DISubrange(count: 4)
	!16 = !{!17, !18, !19, !20}
	!17 = !DILocalVariable(name: "x", arg: 1, scope: !5, file: !1, line: 2, type: !8)
	!18 = !DILocalVariable(name: "y", arg: 2, scope: !5, file: !1, line: 2, type: !8)
	!19 = !DILocalVariable(name: "z", arg: 3, scope: !5, file: !1, line: 2, type: !8)
	!20 = !DILocalVariable(name: "p", scope: !5, file: !1, line: 3, type: !13)
	!21 = !DILocation(line: 0, scope: !5)
	!22 = !DILocation(line: 3, column: 11, scope: !5)
	!23 = !DILocation(line: 4, column: 7, scope: !5)
	!24 = !DILocation(line: 5, column: 7, scope: !5)
	!25 = !DILocation(line: 6, column: 7, scope: !5)
	!26 = !DILocation(line: 7, column: 3, scope: !5)

	...
	---
	name: test
	tracksRegLiveness: true
	liveins:
	- { reg: '$q0', virtual-reg: '' }
	- { reg: '$q1', virtual-reg: '' }
	- { reg: '$q2', virtual-reg: '' }
	body: \|
	bb.0.entry:
	liveins: $q0, $q1, $q2

	; CHECK-LABEL: name: test
	; CHECK: liveins: $q0, $q1, $q2
	; CHECK: DBG_VALUE $q0, $noreg, !17, !DIExpression(), debug-location !21
	; CHECK: DBG_VALUE $q0, $noreg, !17, !DIExpression(), debug-location !21
	; CHECK: DBG_VALUE $q1, $noreg, !18, !DIExpression(), debug-location !21
	; CHECK: DBG_VALUE $q1, $noreg, !18, !DIExpression(), debug-location !21
	; CHECK: DBG_VALUE $q2, $noreg, !19, !DIExpression(), debug-location !21
	; CHECK: DBG_VALUE $q2, $noreg, !19, !DIExpression(), debug-location !21
	; CHECK: DBG_VALUE $noreg, $noreg, !20, !DIExpression(), debug-location !21
	; CHECK: BUNDLE implicit-def dead $vpr, implicit-def $q2, implicit-def $d4, implicit-def $s8, implicit-def $s9, implicit-def $d5, implicit-def $s10, implicit-def $s11, implicit killed $q1, implicit killed $q0, implicit killed $q2, debug-location !23 {
	; CHECK: MVE_VPTv4s32 12, renamable $q1, renamable $q0, 10, implicit-def $vpr, debug-location !23
	; CHECK: renamable $q2 = MVE_VADDi32 renamable $q0, renamable $q1, 1, internal renamable $vpr, $noreg, killed renamable $q2, debug-location !23
	; CHECK: DBG_VALUE $noreg, $noreg, !20, !DIExpression(), debug-location !21
	; CHECK: DBG_VALUE internal $q2, $noreg, !19, !DIExpression(), debug-location !21
	; CHECK: renamable $q2 = MVE_VADDi32 killed renamable $q0, killed renamable $q1, 2, internal killed renamable $vpr, $noreg, internal killed renamable $q2, debug-location !25
	; CHECK: DBG_VALUE internal $q2, $noreg, !19, !DIExpression(), debug-location !21
	; CHECK: }
	; CHECK: $q0 = MVE_VORR killed $q2, killed $q2, 0, $noreg, $noreg, undef $q0, debug-location !26
	; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $q0, debug-location !26
	DBG_VALUE $q0, $noreg, !17, !DIExpression(), debug-location !21
	DBG_VALUE $q0, $noreg, !17, !DIExpression(), debug-location !21
	DBG_VALUE $q1, $noreg, !18, !DIExpression(), debug-location !21
	DBG_VALUE $q1, $noreg, !18, !DIExpression(), debug-location !21
	DBG_VALUE $q2, $noreg, !19, !DIExpression(), debug-location !21
	DBG_VALUE $q2, $noreg, !19, !DIExpression(), debug-location !21
	renamable $vpr = MVE_VCMPs32 renamable $q1, renamable $q0, 10, 0, $noreg, $noreg, debug-location !22
	DBG_VALUE $noreg, $noreg, !20, !DIExpression(), debug-location !21
	renamable $q2 = MVE_VADDi32 renamable $q0, renamable $q1, 1, renamable $vpr, $noreg, killed renamable $q2, debug-location !23
	DBG_VALUE $noreg, $noreg, !20, !DIExpression(), debug-location !21
	DBG_VALUE $q2, $noreg, !19, !DIExpression(), debug-location !21
	renamable $vpr = MVE_VPNOT killed renamable $vpr, 0, $noreg, $noreg, debug-location !24
	renamable $q2 = MVE_VADDi32 killed renamable $q0, killed renamable $q1, 1, killed renamable $vpr, $noreg, killed renamable $q2, debug-location !25
	DBG_VALUE $q2, $noreg, !19, !DIExpression(), debug-location !21
	$q0 = MVE_VORR killed $q2, killed $q2, 0, $noreg, $noreg, undef $q0, debug-location !26
	tBX_RET 14 /* CC::al */, $noreg, implicit $q0, debug-location !26

	...