| # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py |
| # RUN: llc -march=amdgcn -run-pass=amdgpu-prelegalizer-combiner -verify-machineinstrs %s -o - | FileCheck %s |
| |
| --- |
| name: rotl_i32 |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1, $vgpr2 |
| |
| ; CHECK-LABEL: name: rotl_i32 |
| ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: %a:_(s32) = COPY $vgpr0 |
| ; CHECK-NEXT: %amt:_(s32) = COPY $vgpr1 |
| ; CHECK-NEXT: %or:_(s32) = G_ROTL %a, %amt(s32) |
| ; CHECK-NEXT: $vgpr2 = COPY %or(s32) |
| %a:_(s32) = COPY $vgpr0 |
| %amt:_(s32) = COPY $vgpr1 |
| %bw:_(s32) = G_CONSTANT i32 32 |
| %shl:_(s32) = G_SHL %a:_, %amt:_(s32) |
| %sub:_(s32) = G_SUB %bw:_, %amt:_ |
| %lshr:_(s32) = G_LSHR %a:_, %sub:_(s32) |
| %or:_(s32) = G_OR %shl:_, %lshr:_ |
| $vgpr2 = COPY %or |
| ... |
| |
| --- |
| name: rotl_commute_i32 |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1, $vgpr2 |
| |
| ; CHECK-LABEL: name: rotl_commute_i32 |
| ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: %a:_(s32) = COPY $vgpr0 |
| ; CHECK-NEXT: %amt:_(s32) = COPY $vgpr1 |
| ; CHECK-NEXT: %or:_(s32) = G_ROTL %a, %amt(s32) |
| ; CHECK-NEXT: $vgpr2 = COPY %or(s32) |
| %a:_(s32) = COPY $vgpr0 |
| %amt:_(s32) = COPY $vgpr1 |
| %bw:_(s32) = G_CONSTANT i32 32 |
| %shl:_(s32) = G_SHL %a:_, %amt:_(s32) |
| %sub:_(s32) = G_SUB %bw:_, %amt:_ |
| %lshr:_(s32) = G_LSHR %a:_, %sub:_(s32) |
| %or:_(s32) = G_OR %lshr:_, %shl:_ |
| $vgpr2 = COPY %or |
| ... |
| |
| --- |
| name: rotr_i32 |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1, $vgpr2 |
| ; CHECK-LABEL: name: rotr_i32 |
| ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: %a:_(s32) = COPY $vgpr0 |
| ; CHECK-NEXT: %amt:_(s32) = COPY $vgpr1 |
| ; CHECK-NEXT: %or:_(s32) = G_ROTR %a, %amt(s32) |
| ; CHECK-NEXT: $vgpr2 = COPY %or(s32) |
| %a:_(s32) = COPY $vgpr0 |
| %amt:_(s32) = COPY $vgpr1 |
| %bw:_(s32) = G_CONSTANT i32 32 |
| %lshr:_(s32) = G_LSHR %a:_, %amt:_(s32) |
| %sub:_(s32) = G_SUB %bw:_, %amt:_ |
| %shl:_(s32) = G_SHL %a:_, %sub:_(s32) |
| %or:_(s32) = G_OR %shl:_, %lshr:_ |
| $vgpr2 = COPY %or |
| ... |
| |
| --- |
| name: rotl_i32_bad_const |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1, $vgpr2 |
| |
| ; CHECK-LABEL: name: rotl_i32_bad_const |
| ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: %a:_(s32) = COPY $vgpr0 |
| ; CHECK-NEXT: %amt:_(s32) = COPY $vgpr1 |
| ; CHECK-NEXT: %bw:_(s32) = G_CONSTANT i32 31 |
| ; CHECK-NEXT: %shl:_(s32) = G_SHL %a, %amt(s32) |
| ; CHECK-NEXT: %sub:_(s32) = G_SUB %bw, %amt |
| ; CHECK-NEXT: %lshr:_(s32) = G_LSHR %a, %sub(s32) |
| ; CHECK-NEXT: %or:_(s32) = G_OR %shl, %lshr |
| ; CHECK-NEXT: $vgpr2 = COPY %or(s32) |
| %a:_(s32) = COPY $vgpr0 |
| %amt:_(s32) = COPY $vgpr1 |
| %bw:_(s32) = G_CONSTANT i32 31 |
| %shl:_(s32) = G_SHL %a:_, %amt:_(s32) |
| %sub:_(s32) = G_SUB %bw:_, %amt:_ |
| %lshr:_(s32) = G_LSHR %a:_, %sub:_(s32) |
| %or:_(s32) = G_OR %shl:_, %lshr:_ |
| $vgpr2 = COPY %or |
| ... |
| |
| --- |
| name: rotl_i32_bad_amt_reg |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3 |
| |
| ; CHECK-LABEL: name: rotl_i32_bad_amt_reg |
| ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: %a:_(s32) = COPY $vgpr0 |
| ; CHECK-NEXT: %amt:_(s32) = COPY $vgpr1 |
| ; CHECK-NEXT: %amt1:_(s32) = COPY $vgpr2 |
| ; CHECK-NEXT: %bw:_(s32) = G_CONSTANT i32 32 |
| ; CHECK-NEXT: %shl:_(s32) = G_SHL %a, %amt(s32) |
| ; CHECK-NEXT: %sub:_(s32) = G_SUB %bw, %amt1 |
| ; CHECK-NEXT: %lshr:_(s32) = G_LSHR %a, %sub(s32) |
| ; CHECK-NEXT: %or:_(s32) = G_OR %shl, %lshr |
| ; CHECK-NEXT: $vgpr3 = COPY %or(s32) |
| %a:_(s32) = COPY $vgpr0 |
| %amt:_(s32) = COPY $vgpr1 |
| %amt1:_(s32) = COPY $vgpr2 |
| %bw:_(s32) = G_CONSTANT i32 32 |
| %shl:_(s32) = G_SHL %a:_, %amt:_(s32) |
| %sub:_(s32) = G_SUB %bw:_, %amt1:_ |
| %lshr:_(s32) = G_LSHR %a:_, %sub:_(s32) |
| %or:_(s32) = G_OR %shl:_, %lshr:_ |
| $vgpr3 = COPY %or |
| ... |