commit 9e026273b030d77b5429e31fd2d7ce3ca6b68cd8
author Jay Foad <jay.foad@amd.com> Thu May 06 14:47:43 2021 +0100
committer Jay Foad <jay.foad@amd.com> Thu May 06 14:47:54 2021 +0100
tree 7bd696f65f2c542cd89d1d16b457f805b7bf3205
parent ed87f512bb9eb5c1d44e9a1182ffeaf23d6c5ae8

[AMDGPU] SIInsertHardClauses: move more stuff into the class. NFC.

llvm/lib/Target/AMDGPU/SIInsertHardClauses.cpp

diff --git a/llvm/lib/Target/AMDGPU/SIInsertHardClauses.cpp b/llvm/lib/Target/AMDGPU/SIInsertHardClauses.cpp
index 5611c9c..e778f59 100644
--- a/llvm/lib/Target/AMDGPU/SIInsertHardClauses.cpp
+++ b/llvm/lib/Target/AMDGPU/SIInsertHardClauses.cpp
@@ -63,30 +63,10 @@
   HARDCLAUSE_ILLEGAL,
 };
 
-HardClauseType getHardClauseType(const MachineInstr &MI) {
-  // On current architectures we only get a benefit from clausing loads.
-  if (MI.mayLoad()) {
-    if (SIInstrInfo::isVMEM(MI) || SIInstrInfo::isSegmentSpecificFLAT(MI))
-      return HARDCLAUSE_VMEM;
-    if (SIInstrInfo::isFLAT(MI))
-      return HARDCLAUSE_FLAT;
-    // TODO: LDS
-    if (SIInstrInfo::isSMRD(MI))
-      return HARDCLAUSE_SMEM;
-  }
-
-  // Don't form VALU clauses. It's not clear what benefit they give, if any.
-
-  // In practice s_nop is the only internal instruction we're likely to see.
-  // It's safe to treat the rest as illegal.
-  if (MI.getOpcode() == AMDGPU::S_NOP)
-    return HARDCLAUSE_INTERNAL;
-  return HARDCLAUSE_ILLEGAL;
-}
-
 class SIInsertHardClauses : public MachineFunctionPass {
 public:
   static char ID;
+  const GCNSubtarget *ST = nullptr;
 
   SIInsertHardClauses() : MachineFunctionPass(ID) {}
 
@@ -95,6 +75,27 @@
     MachineFunctionPass::getAnalysisUsage(AU);
   }
 
+  HardClauseType getHardClauseType(const MachineInstr &MI) {
+    // On current architectures we only get a benefit from clausing loads.
+    if (MI.mayLoad()) {
+      if (SIInstrInfo::isVMEM(MI) || SIInstrInfo::isSegmentSpecificFLAT(MI))
+        return HARDCLAUSE_VMEM;
+      if (SIInstrInfo::isFLAT(MI))
+        return HARDCLAUSE_FLAT;
+      // TODO: LDS
+      if (SIInstrInfo::isSMRD(MI))
+        return HARDCLAUSE_SMEM;
+    }
+
+    // Don't form VALU clauses. It's not clear what benefit they give, if any.
+
+    // In practice s_nop is the only internal instruction we're likely to see.
+    // It's safe to treat the rest as illegal.
+    if (MI.getOpcode() == AMDGPU::S_NOP)
+      return HARDCLAUSE_INTERNAL;
+    return HARDCLAUSE_ILLEGAL;
+  }
+
   // Track information about a clause as we discover it.
   struct ClauseInfo {
     // The type of all (non-internal) instructions in the clause.
@@ -132,12 +133,12 @@
     if (skipFunction(MF.getFunction()))
       return false;
 
-    const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>();
-    if (!ST.hasHardClauses())
+    ST = &MF.getSubtarget<GCNSubtarget>();
+    if (!ST->hasHardClauses())
       return false;
 
-    const SIInstrInfo *SII = ST.getInstrInfo();
-    const TargetRegisterInfo *TRI = ST.getRegisterInfo();
+    const SIInstrInfo *SII = ST->getInstrInfo();
+    const TargetRegisterInfo *TRI = ST->getRegisterInfo();
 
     bool Changed = false;
     for (auto &MBB : MF) {