[AArch64][GlobalISel] Use the look-through constant helper for the shift s32->s64 custom legalization.
Almost NFC, except it catches more cases and gives a 0.1% CTMark -O0 size win.
diff --git a/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp b/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
index 2eaec0b..3dcc244 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
@@ -710,16 +710,14 @@
// If the shift amount is a G_CONSTANT, promote it to a 64 bit type so the
// imported patterns can select it later. Either way, it will be legal.
Register AmtReg = MI.getOperand(2).getReg();
- auto *CstMI = MRI.getVRegDef(AmtReg);
- assert(CstMI && "expected to find a vreg def");
- if (CstMI->getOpcode() != TargetOpcode::G_CONSTANT)
+ auto VRegAndVal = getConstantVRegValWithLookThrough(AmtReg, MRI);
+ if (!VRegAndVal)
return true;
// Check the shift amount is in range for an immediate form.
- unsigned Amount = CstMI->getOperand(1).getCImm()->getZExtValue();
+ int64_t Amount = VRegAndVal->Value;
if (Amount > 31)
return true; // This will have to remain a register variant.
- assert(MRI.getType(AmtReg).getSizeInBits() == 32);
- auto ExtCst = MIRBuilder.buildZExt(LLT::scalar(64), AmtReg);
+ auto ExtCst = MIRBuilder.buildConstant(LLT::scalar(64), Amount);
MI.getOperand(2).setReg(ExtCst.getReg(0));
return true;
}
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-unmerge-values.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-unmerge-values.mir
index 56c5b8a..9c1f6fc 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-unmerge-values.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-unmerge-values.mir
@@ -24,9 +24,10 @@
; CHECK-LABEL: name: test_unmerge_s4
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
; CHECK: [[UV:%[0-9]+]]:_(s8), [[UV1:%[0-9]+]]:_(s8), [[UV2:%[0-9]+]]:_(s8), [[UV3:%[0-9]+]]:_(s8) = G_UNMERGE_VALUES [[COPY]](s32)
- ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4
+ ; CHECK: [[C:%[0-9]+]]:_(s8) = G_CONSTANT i8 4
; CHECK: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[UV]](s8)
- ; CHECK: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[ZEXT]], [[C]](s32)
+ ; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 4
+ ; CHECK: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[ZEXT]], [[C1]](s64)
; CHECK: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[UV]](s8)
; CHECK: [[ANYEXT1:%[0-9]+]]:_(s64) = G_ANYEXT [[LSHR]](s32)
; CHECK: $x0 = COPY [[ANYEXT]](s64)
