llvm/test/CodeGen/X86/vector-compress.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc -mtriple=x86_64 -mattr=+avx2                           < %s | FileCheck %s --check-prefixes=CHECK,AVX2
; RUN: llc -mtriple=x86_64 -mattr=+avx512f                        < %s | FileCheck %s --check-prefixes=CHECK,AVX512F
; RUN: llc -mtriple=x86_64 -mattr=+avx512f,+avx512vl,+avx512vbmi2 < %s | FileCheck %s --check-prefixes=CHECK,AVX512VL

define <4 x i32> @test_compress_v4i32(<4 x i32> %vec, <4 x i1> %mask, <4 x i32> %passthru) {
; AVX2-LABEL: test_compress_v4i32:
; AVX2:       # %bb.0:
; AVX2-NEXT:    vpslld $31, %xmm1, %xmm1
; AVX2-NEXT:    vpsrad $31, %xmm1, %xmm1
; AVX2-NEXT:    vmovaps %xmm2, -{{[0-9]+}}(%rsp)
; AVX2-NEXT:    vpextrd $1, %xmm1, %eax
; AVX2-NEXT:    vmovd %xmm1, %esi
; AVX2-NEXT:    andl $1, %esi
; AVX2-NEXT:    movl %esi, %edi
; AVX2-NEXT:    subl %eax, %edi
; AVX2-NEXT:    vpextrd $2, %xmm1, %edx
; AVX2-NEXT:    subl %edx, %edi
; AVX2-NEXT:    vpextrd $3, %xmm1, %ecx
; AVX2-NEXT:    subl %ecx, %edi
; AVX2-NEXT:    andl $3, %edi
; AVX2-NEXT:    andl $1, %eax
; AVX2-NEXT:    addq %rsi, %rax
; AVX2-NEXT:    andl $1, %edx
; AVX2-NEXT:    addq %rax, %rdx
; AVX2-NEXT:    andl $1, %ecx
; AVX2-NEXT:    addq %rdx, %rcx
; AVX2-NEXT:    vextractps $3, %xmm0, %r8d
; AVX2-NEXT:    cmpq $4, %rcx
; AVX2-NEXT:    cmovbl -24(%rsp,%rdi,4), %r8d
; AVX2-NEXT:    vmovss %xmm0, -{{[0-9]+}}(%rsp)
; AVX2-NEXT:    vextractps $1, %xmm0, -24(%rsp,%rsi,4)
; AVX2-NEXT:    vextractps $2, %xmm0, -24(%rsp,%rax,4)
; AVX2-NEXT:    andl $3, %edx
; AVX2-NEXT:    vextractps $3, %xmm0, -24(%rsp,%rdx,4)
; AVX2-NEXT:    cmpq $3, %rcx
; AVX2-NEXT:    movl $3, %eax
; AVX2-NEXT:    cmovbq %rcx, %rax
; AVX2-NEXT:    movl %r8d, -24(%rsp,%rax,4)
; AVX2-NEXT:    vmovaps -{{[0-9]+}}(%rsp), %xmm0
; AVX2-NEXT:    retq
;
; AVX512F-LABEL: test_compress_v4i32:
; AVX512F:       # %bb.0:
; AVX512F-NEXT:    # kill: def $xmm2 killed $xmm2 def $zmm2
; AVX512F-NEXT:    # kill: def $xmm0 killed $xmm0 def $zmm0
; AVX512F-NEXT:    vpslld $31, %xmm1, %xmm1
; AVX512F-NEXT:    vptestmd %zmm1, %zmm1, %k0
; AVX512F-NEXT:    kshiftlw $12, %k0, %k0
; AVX512F-NEXT:    kshiftrw $12, %k0, %k1
; AVX512F-NEXT:    vpcompressd %zmm0, %zmm2 {%k1}
; AVX512F-NEXT:    vmovdqa %xmm2, %xmm0
; AVX512F-NEXT:    vzeroupper
; AVX512F-NEXT:    retq
;
; AVX512VL-LABEL: test_compress_v4i32:
; AVX512VL:       # %bb.0:
; AVX512VL-NEXT:    vpslld $31, %xmm1, %xmm1
; AVX512VL-NEXT:    vptestmd %xmm1, %xmm1, %k1
; AVX512VL-NEXT:    vpcompressd %xmm0, %xmm2 {%k1}
; AVX512VL-NEXT:    vmovdqa %xmm2, %xmm0
; AVX512VL-NEXT:    retq
    %out = call <4 x i32> @llvm.experimental.vector.compress(<4 x i32> %vec, <4 x i1> %mask, <4 x i32> %passthru)
    ret <4 x i32> %out
}

define <4 x float> @test_compress_v4f32(<4 x float> %vec, <4 x i1> %mask, <4 x float> %passthru) {
; AVX2-LABEL: test_compress_v4f32:
; AVX2:       # %bb.0:
; AVX2-NEXT:    vpslld $31, %xmm1, %xmm1
; AVX2-NEXT:    vpsrad $31, %xmm1, %xmm1
; AVX2-NEXT:    vmovaps %xmm2, -{{[0-9]+}}(%rsp)
; AVX2-NEXT:    vpextrd $1, %xmm1, %edx
; AVX2-NEXT:    vmovd %xmm1, %esi
; AVX2-NEXT:    andl $1, %esi
; AVX2-NEXT:    movl %esi, %edi
; AVX2-NEXT:    subl %edx, %edi
; AVX2-NEXT:    vpextrd $2, %xmm1, %ecx
; AVX2-NEXT:    subl %ecx, %edi
; AVX2-NEXT:    vpextrd $3, %xmm1, %eax
; AVX2-NEXT:    subl %eax, %edi
; AVX2-NEXT:    andl $3, %edi
; AVX2-NEXT:    vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
; AVX2-NEXT:    vmovss %xmm0, -{{[0-9]+}}(%rsp)
; AVX2-NEXT:    vextractps $1, %xmm0, -24(%rsp,%rsi,4)
; AVX2-NEXT:    andl $1, %edx
; AVX2-NEXT:    addq %rsi, %rdx
; AVX2-NEXT:    vextractps $2, %xmm0, -24(%rsp,%rdx,4)
; AVX2-NEXT:    andl $1, %ecx
; AVX2-NEXT:    addq %rdx, %rcx
; AVX2-NEXT:    andl $1, %eax
; AVX2-NEXT:    addq %rcx, %rax
; AVX2-NEXT:    # kill: def $ecx killed $ecx killed $rcx def $rcx
; AVX2-NEXT:    andl $3, %ecx
; AVX2-NEXT:    vshufps {{.*#+}} xmm0 = xmm0[3,3,3,3]
; AVX2-NEXT:    vmovss %xmm0, -24(%rsp,%rcx,4)
; AVX2-NEXT:    cmpq $3, %rax
; AVX2-NEXT:    movl $3, %ecx
; AVX2-NEXT:    cmovbq %rax, %rcx
; AVX2-NEXT:    ja .LBB1_2
; AVX2-NEXT:  # %bb.1:
; AVX2-NEXT:    vmovaps %xmm1, %xmm0
; AVX2-NEXT:  .LBB1_2:
; AVX2-NEXT:    vmovss %xmm0, -24(%rsp,%rcx,4)
; AVX2-NEXT:    vmovaps -{{[0-9]+}}(%rsp), %xmm0
; AVX2-NEXT:    retq
;
; AVX512F-LABEL: test_compress_v4f32:
; AVX512F:       # %bb.0:
; AVX512F-NEXT:    # kill: def $xmm2 killed $xmm2 def $zmm2
; AVX512F-NEXT:    # kill: def $xmm0 killed $xmm0 def $zmm0
; AVX512F-NEXT:    vpslld $31, %xmm1, %xmm1
; AVX512F-NEXT:    vptestmd %zmm1, %zmm1, %k0
; AVX512F-NEXT:    kshiftlw $12, %k0, %k0
; AVX512F-NEXT:    kshiftrw $12, %k0, %k1
; AVX512F-NEXT:    vcompressps %zmm0, %zmm2 {%k1}
; AVX512F-NEXT:    vmovdqa %xmm2, %xmm0
; AVX512F-NEXT:    vzeroupper
; AVX512F-NEXT:    retq
;
; AVX512VL-LABEL: test_compress_v4f32:
; AVX512VL:       # %bb.0:
; AVX512VL-NEXT:    vpslld $31, %xmm1, %xmm1
; AVX512VL-NEXT:    vptestmd %xmm1, %xmm1, %k1
; AVX512VL-NEXT:    vcompressps %xmm0, %xmm2 {%k1}
; AVX512VL-NEXT:    vmovdqa %xmm2, %xmm0
; AVX512VL-NEXT:    retq
    %out = call <4 x float> @llvm.experimental.vector.compress(<4 x float> %vec, <4 x i1> %mask, <4 x float> %passthru)
    ret <4 x float> %out
}

define <2 x i64> @test_compress_v2i64(<2 x i64> %vec, <2 x i1> %mask, <2 x i64> %passthru) {
; AVX2-LABEL: test_compress_v2i64:
; AVX2:       # %bb.0:
; AVX2-NEXT:    vpsllq $63, %xmm1, %xmm1
; AVX2-NEXT:    vpxor %xmm3, %xmm3, %xmm3
; AVX2-NEXT:    vpcmpgtq %xmm1, %xmm3, %xmm1
; AVX2-NEXT:    vmovaps %xmm2, -{{[0-9]+}}(%rsp)
; AVX2-NEXT:    vpextrq $1, %xmm1, %rax
; AVX2-NEXT:    vmovq %xmm1, %rcx
; AVX2-NEXT:    movl %ecx, %edx
; AVX2-NEXT:    subl %eax, %edx
; AVX2-NEXT:    andl $1, %edx
; AVX2-NEXT:    andl $1, %eax
; AVX2-NEXT:    andl $1, %ecx
; AVX2-NEXT:    addq %rcx, %rax
; AVX2-NEXT:    vpextrq $1, %xmm0, %rsi
; AVX2-NEXT:    cmpq $2, %rax
; AVX2-NEXT:    cmovbq -24(%rsp,%rdx,8), %rsi
; AVX2-NEXT:    vmovq %xmm0, -{{[0-9]+}}(%rsp)
; AVX2-NEXT:    movl %ecx, %ecx
; AVX2-NEXT:    vpextrq $1, %xmm0, -24(%rsp,%rcx,8)
; AVX2-NEXT:    cmpq $1, %rax
; AVX2-NEXT:    movl $1, %ecx
; AVX2-NEXT:    cmovbq %rax, %rcx
; AVX2-NEXT:    movq %rsi, -24(%rsp,%rcx,8)
; AVX2-NEXT:    vmovaps -{{[0-9]+}}(%rsp), %xmm0
; AVX2-NEXT:    retq
;
; AVX512F-LABEL: test_compress_v2i64:
; AVX512F:       # %bb.0:
; AVX512F-NEXT:    # kill: def $xmm2 killed $xmm2 def $zmm2
; AVX512F-NEXT:    # kill: def $xmm0 killed $xmm0 def $zmm0
; AVX512F-NEXT:    vpsllq $63, %xmm1, %xmm1
; AVX512F-NEXT:    vptestmq %zmm1, %zmm1, %k0
; AVX512F-NEXT:    kshiftlw $14, %k0, %k0
; AVX512F-NEXT:    kshiftrw $14, %k0, %k1
; AVX512F-NEXT:    vpcompressq %zmm0, %zmm2 {%k1}
; AVX512F-NEXT:    vmovdqa %xmm2, %xmm0
; AVX512F-NEXT:    vzeroupper
; AVX512F-NEXT:    retq
;
; AVX512VL-LABEL: test_compress_v2i64:
; AVX512VL:       # %bb.0:
; AVX512VL-NEXT:    vpsllq $63, %xmm1, %xmm1
; AVX512VL-NEXT:    vptestmq %xmm1, %xmm1, %k1
; AVX512VL-NEXT:    vpcompressq %xmm0, %xmm2 {%k1}
; AVX512VL-NEXT:    vmovdqa %xmm2, %xmm0
; AVX512VL-NEXT:    retq
    %out = call <2 x i64> @llvm.experimental.vector.compress(<2 x i64> %vec, <2 x i1> %mask, <2 x i64> %passthru)
    ret <2 x i64> %out
}

define <2 x double> @test_compress_v2f64(<2 x double> %vec, <2 x i1> %mask, <2 x double> %passthru) {
; AVX2-LABEL: test_compress_v2f64:
; AVX2:       # %bb.0:
; AVX2-NEXT:    vpsllq $63, %xmm1, %xmm1
; AVX2-NEXT:    vpxor %xmm3, %xmm3, %xmm3
; AVX2-NEXT:    vpcmpgtq %xmm1, %xmm3, %xmm1
; AVX2-NEXT:    vmovaps %xmm2, -{{[0-9]+}}(%rsp)
; AVX2-NEXT:    vpextrq $1, %xmm1, %rax
; AVX2-NEXT:    vmovq %xmm1, %rcx
; AVX2-NEXT:    movl %ecx, %edx
; AVX2-NEXT:    subl %eax, %edx
; AVX2-NEXT:    andl $1, %edx
; AVX2-NEXT:    vmovsd {{.*#+}} xmm1 = mem[0],zero
; AVX2-NEXT:    vmovlpd %xmm0, -{{[0-9]+}}(%rsp)
; AVX2-NEXT:    andl $1, %ecx
; AVX2-NEXT:    movl %ecx, %edx
; AVX2-NEXT:    vmovhpd %xmm0, -24(%rsp,%rdx,8)
; AVX2-NEXT:    andl $1, %eax
; AVX2-NEXT:    addq %rcx, %rax
; AVX2-NEXT:    cmpq $2, %rax
; AVX2-NEXT:    jb .LBB3_2
; AVX2-NEXT:  # %bb.1:
; AVX2-NEXT:    vshufpd {{.*#+}} xmm1 = xmm0[1,0]
; AVX2-NEXT:  .LBB3_2:
; AVX2-NEXT:    cmpq $1, %rax
; AVX2-NEXT:    movl $1, %ecx
; AVX2-NEXT:    cmovbq %rax, %rcx
; AVX2-NEXT:    vmovsd %xmm1, -24(%rsp,%rcx,8)
; AVX2-NEXT:    vmovaps -{{[0-9]+}}(%rsp), %xmm0
; AVX2-NEXT:    retq
;
; AVX512F-LABEL: test_compress_v2f64:
; AVX512F:       # %bb.0:
; AVX512F-NEXT:    # kill: def $xmm2 killed $xmm2 def $zmm2
; AVX512F-NEXT:    # kill: def $xmm0 killed $xmm0 def $zmm0
; AVX512F-NEXT:    vpsllq $63, %xmm1, %xmm1
; AVX512F-NEXT:    vptestmq %zmm1, %zmm1, %k0
; AVX512F-NEXT:    kshiftlw $14, %k0, %k0
; AVX512F-NEXT:    kshiftrw $14, %k0, %k1
; AVX512F-NEXT:    vcompresspd %zmm0, %zmm2 {%k1}
; AVX512F-NEXT:    vmovdqa %xmm2, %xmm0
; AVX512F-NEXT:    vzeroupper
; AVX512F-NEXT:    retq
;
; AVX512VL-LABEL: test_compress_v2f64:
; AVX512VL:       # %bb.0:
; AVX512VL-NEXT:    vpsllq $63, %xmm1, %xmm1
; AVX512VL-NEXT:    vptestmq %xmm1, %xmm1, %k1
; AVX512VL-NEXT:    vcompresspd %xmm0, %xmm2 {%k1}
; AVX512VL-NEXT:    vmovdqa %xmm2, %xmm0
; AVX512VL-NEXT:    retq
    %out = call <2 x double> @llvm.experimental.vector.compress(<2 x double> %vec, <2 x i1> %mask, <2 x double> %passthru)
    ret <2 x double> %out
}

define <8 x i32> @test_compress_v8i32(<8 x i32> %vec, <8 x i1> %mask, <8 x i32> %passthru) {
; AVX2-LABEL: test_compress_v8i32:
; AVX2:       # %bb.0:
; AVX2-NEXT:    pushq %rbp
; AVX2-NEXT:    .cfi_def_cfa_offset 16
; AVX2-NEXT:    .cfi_offset %rbp, -16
; AVX2-NEXT:    movq %rsp, %rbp
; AVX2-NEXT:    .cfi_def_cfa_register %rbp
; AVX2-NEXT:    pushq %rbx
; AVX2-NEXT:    andq $-32, %rsp
; AVX2-NEXT:    subq $64, %rsp
; AVX2-NEXT:    .cfi_offset %rbx, -24
; AVX2-NEXT:    vpmovzxwd {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero
; AVX2-NEXT:    vpslld $31, %ymm1, %ymm1
; AVX2-NEXT:    vpsrad $31, %ymm1, %ymm3
; AVX2-NEXT:    vmovaps %ymm2, (%rsp)
; AVX2-NEXT:    vextracti128 $1, %ymm3, %xmm1
; AVX2-NEXT:    vpackssdw %xmm1, %xmm3, %xmm2
; AVX2-NEXT:    vpmovzxwd {{.*#+}} ymm2 = xmm2[0],zero,xmm2[1],zero,xmm2[2],zero,xmm2[3],zero,xmm2[4],zero,xmm2[5],zero,xmm2[6],zero,xmm2[7],zero
; AVX2-NEXT:    vpslld $31, %ymm2, %ymm2
; AVX2-NEXT:    vpsrld $31, %ymm2, %ymm2
; AVX2-NEXT:    vextracti128 $1, %ymm2, %xmm4
; AVX2-NEXT:    vpaddd %xmm4, %xmm2, %xmm2
; AVX2-NEXT:    vpextrd $1, %xmm2, %eax
; AVX2-NEXT:    vmovd %xmm2, %ecx
; AVX2-NEXT:    addl %eax, %ecx
; AVX2-NEXT:    vpextrd $2, %xmm2, %edx
; AVX2-NEXT:    vpextrd $3, %xmm2, %eax
; AVX2-NEXT:    addl %edx, %eax
; AVX2-NEXT:    addl %ecx, %eax
; AVX2-NEXT:    andl $7, %eax
; AVX2-NEXT:    vpextrd $1, %xmm3, %ecx
; AVX2-NEXT:    andl $1, %ecx
; AVX2-NEXT:    vmovd %xmm3, %edx
; AVX2-NEXT:    andl $1, %edx
; AVX2-NEXT:    addq %rdx, %rcx
; AVX2-NEXT:    vpextrd $2, %xmm3, %esi
; AVX2-NEXT:    andl $1, %esi
; AVX2-NEXT:    addq %rcx, %rsi
; AVX2-NEXT:    vpextrd $3, %xmm3, %edi
; AVX2-NEXT:    andl $1, %edi
; AVX2-NEXT:    addq %rsi, %rdi
; AVX2-NEXT:    vmovd %xmm1, %r8d
; AVX2-NEXT:    andl $1, %r8d
; AVX2-NEXT:    addq %rdi, %r8
; AVX2-NEXT:    vpextrd $1, %xmm1, %r9d
; AVX2-NEXT:    andl $1, %r9d
; AVX2-NEXT:    addq %r8, %r9
; AVX2-NEXT:    vpextrd $2, %xmm1, %r10d
; AVX2-NEXT:    andl $1, %r10d
; AVX2-NEXT:    addq %r9, %r10
; AVX2-NEXT:    vpextrd $3, %xmm1, %r11d
; AVX2-NEXT:    andl $1, %r11d
; AVX2-NEXT:    addq %r10, %r11
; AVX2-NEXT:    vextractf128 $1, %ymm0, %xmm1
; AVX2-NEXT:    vextractps $3, %xmm1, %ebx
; AVX2-NEXT:    cmpq $8, %r11
; AVX2-NEXT:    cmovbl (%rsp,%rax,4), %ebx
; AVX2-NEXT:    vmovss %xmm0, (%rsp)
; AVX2-NEXT:    vextractps $1, %xmm0, (%rsp,%rdx,4)
; AVX2-NEXT:    vextractps $2, %xmm0, (%rsp,%rcx,4)
; AVX2-NEXT:    vextractps $3, %xmm0, (%rsp,%rsi,4)
; AVX2-NEXT:    andl $7, %edi
; AVX2-NEXT:    vmovss %xmm1, (%rsp,%rdi,4)
; AVX2-NEXT:    andl $7, %r8d
; AVX2-NEXT:    vextractps $1, %xmm1, (%rsp,%r8,4)
; AVX2-NEXT:    andl $7, %r9d
; AVX2-NEXT:    vextractps $2, %xmm1, (%rsp,%r9,4)
; AVX2-NEXT:    andl $7, %r10d
; AVX2-NEXT:    vextractps $3, %xmm1, (%rsp,%r10,4)
; AVX2-NEXT:    cmpq $7, %r11
; AVX2-NEXT:    movl $7, %eax
; AVX2-NEXT:    cmovbq %r11, %rax
; AVX2-NEXT:    movl %eax, %eax
; AVX2-NEXT:    movl %ebx, (%rsp,%rax,4)
; AVX2-NEXT:    vmovaps (%rsp), %ymm0
; AVX2-NEXT:    leaq -8(%rbp), %rsp
; AVX2-NEXT:    popq %rbx
; AVX2-NEXT:    popq %rbp
; AVX2-NEXT:    .cfi_def_cfa %rsp, 8
; AVX2-NEXT:    retq
;
; AVX512F-LABEL: test_compress_v8i32:
; AVX512F:       # %bb.0:
; AVX512F-NEXT:    # kill: def $ymm2 killed $ymm2 def $zmm2
; AVX512F-NEXT:    # kill: def $ymm0 killed $ymm0 def $zmm0
; AVX512F-NEXT:    vpmovsxwq %xmm1, %zmm1
; AVX512F-NEXT:    vpsllq $63, %zmm1, %zmm1
; AVX512F-NEXT:    vptestmq %zmm1, %zmm1, %k1
; AVX512F-NEXT:    vpcompressd %zmm0, %zmm2 {%k1}
; AVX512F-NEXT:    vmovdqa %ymm2, %ymm0
; AVX512F-NEXT:    retq
;
; AVX512VL-LABEL: test_compress_v8i32:
; AVX512VL:       # %bb.0:
; AVX512VL-NEXT:    vpsllw $15, %xmm1, %xmm1
; AVX512VL-NEXT:    vpmovw2m %xmm1, %k1
; AVX512VL-NEXT:    vpcompressd %ymm0, %ymm2 {%k1}
; AVX512VL-NEXT:    vmovdqa %ymm2, %ymm0
; AVX512VL-NEXT:    retq
    %out = call <8 x i32> @llvm.experimental.vector.compress(<8 x i32> %vec, <8 x i1> %mask, <8 x i32> %passthru)
    ret <8 x i32> %out
}

define <8 x float> @test_compress_v8f32(<8 x float> %vec, <8 x i1> %mask, <8 x float> %passthru) {
; AVX2-LABEL: test_compress_v8f32:
; AVX2:       # %bb.0:
; AVX2-NEXT:    pushq %rbp
; AVX2-NEXT:    .cfi_def_cfa_offset 16
; AVX2-NEXT:    .cfi_offset %rbp, -16
; AVX2-NEXT:    movq %rsp, %rbp
; AVX2-NEXT:    .cfi_def_cfa_register %rbp
; AVX2-NEXT:    andq $-32, %rsp
; AVX2-NEXT:    subq $64, %rsp
; AVX2-NEXT:    vpmovzxwd {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero
; AVX2-NEXT:    vpslld $31, %ymm1, %ymm1
; AVX2-NEXT:    vpsrad $31, %ymm1, %ymm3
; AVX2-NEXT:    vmovaps %ymm2, (%rsp)
; AVX2-NEXT:    vextracti128 $1, %ymm3, %xmm1
; AVX2-NEXT:    vpackssdw %xmm1, %xmm3, %xmm2
; AVX2-NEXT:    vpmovzxwd {{.*#+}} ymm2 = xmm2[0],zero,xmm2[1],zero,xmm2[2],zero,xmm2[3],zero,xmm2[4],zero,xmm2[5],zero,xmm2[6],zero,xmm2[7],zero
; AVX2-NEXT:    vpslld $31, %ymm2, %ymm2
; AVX2-NEXT:    vpsrld $31, %ymm2, %ymm2
; AVX2-NEXT:    vextracti128 $1, %ymm2, %xmm4
; AVX2-NEXT:    vpaddd %xmm4, %xmm2, %xmm2
; AVX2-NEXT:    vpextrd $1, %xmm2, %eax
; AVX2-NEXT:    vmovd %xmm2, %ecx
; AVX2-NEXT:    addl %eax, %ecx
; AVX2-NEXT:    vpextrd $2, %xmm2, %eax
; AVX2-NEXT:    vpextrd $3, %xmm2, %edx
; AVX2-NEXT:    addl %eax, %edx
; AVX2-NEXT:    addl %ecx, %edx
; AVX2-NEXT:    andl $7, %edx
; AVX2-NEXT:    vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero
; AVX2-NEXT:    vmovss %xmm0, (%rsp)
; AVX2-NEXT:    vmovd %xmm3, %eax
; AVX2-NEXT:    andl $1, %eax
; AVX2-NEXT:    vextractps $1, %xmm0, (%rsp,%rax,4)
; AVX2-NEXT:    vpextrd $1, %xmm3, %ecx
; AVX2-NEXT:    andl $1, %ecx
; AVX2-NEXT:    addq %rax, %rcx
; AVX2-NEXT:    vextractps $2, %xmm0, (%rsp,%rcx,4)
; AVX2-NEXT:    vpextrd $2, %xmm3, %eax
; AVX2-NEXT:    andl $1, %eax
; AVX2-NEXT:    addq %rcx, %rax
; AVX2-NEXT:    vextractps $3, %xmm0, (%rsp,%rax,4)
; AVX2-NEXT:    vpextrd $3, %xmm3, %ecx
; AVX2-NEXT:    andl $1, %ecx
; AVX2-NEXT:    addq %rax, %rcx
; AVX2-NEXT:    vmovd %xmm1, %eax
; AVX2-NEXT:    andl $1, %eax
; AVX2-NEXT:    addq %rcx, %rax
; AVX2-NEXT:    # kill: def $ecx killed $ecx killed $rcx def $rcx
; AVX2-NEXT:    andl $7, %ecx
; AVX2-NEXT:    vextractf128 $1, %ymm0, %xmm0
; AVX2-NEXT:    vmovss %xmm0, (%rsp,%rcx,4)
; AVX2-NEXT:    vpextrd $1, %xmm1, %ecx
; AVX2-NEXT:    andl $1, %ecx
; AVX2-NEXT:    addq %rax, %rcx
; AVX2-NEXT:    # kill: def $eax killed $eax killed $rax def $rax
; AVX2-NEXT:    andl $7, %eax
; AVX2-NEXT:    vextractps $1, %xmm0, (%rsp,%rax,4)
; AVX2-NEXT:    vpextrd $2, %xmm1, %edx
; AVX2-NEXT:    andl $1, %edx
; AVX2-NEXT:    addq %rcx, %rdx
; AVX2-NEXT:    # kill: def $ecx killed $ecx killed $rcx def $rcx
; AVX2-NEXT:    andl $7, %ecx
; AVX2-NEXT:    vextractps $2, %xmm0, (%rsp,%rcx,4)
; AVX2-NEXT:    vpextrd $3, %xmm1, %eax
; AVX2-NEXT:    andl $1, %eax
; AVX2-NEXT:    addq %rdx, %rax
; AVX2-NEXT:    # kill: def $edx killed $edx killed $rdx def $rdx
; AVX2-NEXT:    andl $7, %edx
; AVX2-NEXT:    vshufps {{.*#+}} xmm0 = xmm0[3,3,3,3]
; AVX2-NEXT:    vmovss %xmm0, (%rsp,%rdx,4)
; AVX2-NEXT:    cmpq $8, %rax
; AVX2-NEXT:    jae .LBB5_2
; AVX2-NEXT:  # %bb.1:
; AVX2-NEXT:    vmovaps %xmm2, %xmm0
; AVX2-NEXT:  .LBB5_2:
; AVX2-NEXT:    cmpq $7, %rax
; AVX2-NEXT:    movl $7, %ecx
; AVX2-NEXT:    cmovbq %rax, %rcx
; AVX2-NEXT:    movl %ecx, %eax
; AVX2-NEXT:    vmovss %xmm0, (%rsp,%rax,4)
; AVX2-NEXT:    vmovaps (%rsp), %ymm0
; AVX2-NEXT:    movq %rbp, %rsp
; AVX2-NEXT:    popq %rbp
; AVX2-NEXT:    .cfi_def_cfa %rsp, 8
; AVX2-NEXT:    retq
;
; AVX512F-LABEL: test_compress_v8f32:
; AVX512F:       # %bb.0:
; AVX512F-NEXT:    # kill: def $ymm2 killed $ymm2 def $zmm2
; AVX512F-NEXT:    # kill: def $ymm0 killed $ymm0 def $zmm0
; AVX512F-NEXT:    vpmovsxwq %xmm1, %zmm1
; AVX512F-NEXT:    vpsllq $63, %zmm1, %zmm1
; AVX512F-NEXT:    vptestmq %zmm1, %zmm1, %k1
; AVX512F-NEXT:    vcompressps %zmm0, %zmm2 {%k1}
; AVX512F-NEXT:    vmovdqa %ymm2, %ymm0
; AVX512F-NEXT:    retq
;
; AVX512VL-LABEL: test_compress_v8f32:
; AVX512VL:       # %bb.0:
; AVX512VL-NEXT:    vpsllw $15, %xmm1, %xmm1
; AVX512VL-NEXT:    vpmovw2m %xmm1, %k1
; AVX512VL-NEXT:    vcompressps %ymm0, %ymm2 {%k1}
; AVX512VL-NEXT:    vmovdqa %ymm2, %ymm0
; AVX512VL-NEXT:    retq
    %out = call <8 x float> @llvm.experimental.vector.compress(<8 x float> %vec, <8 x i1> %mask, <8 x float> %passthru)
    ret <8 x float> %out
}

define <4 x i64> @test_compress_v4i64(<4 x i64> %vec, <4 x i1> %mask, <4 x i64> %passthru) {
; AVX2-LABEL: test_compress_v4i64:
; AVX2:       # %bb.0:
; AVX2-NEXT:    pushq %rbp
; AVX2-NEXT:    .cfi_def_cfa_offset 16
; AVX2-NEXT:    .cfi_offset %rbp, -16
; AVX2-NEXT:    movq %rsp, %rbp
; AVX2-NEXT:    .cfi_def_cfa_register %rbp
; AVX2-NEXT:    andq $-32, %rsp
; AVX2-NEXT:    subq $64, %rsp
; AVX2-NEXT:    vpslld $31, %xmm1, %xmm1
; AVX2-NEXT:    vpsrad $31, %xmm1, %xmm1
; AVX2-NEXT:    vpmovsxdq %xmm1, %ymm1
; AVX2-NEXT:    vmovaps %ymm2, (%rsp)
; AVX2-NEXT:    vpsrlq $63, %ymm1, %ymm2
; AVX2-NEXT:    vextracti128 $1, %ymm2, %xmm3
; AVX2-NEXT:    vpaddq %xmm3, %xmm2, %xmm2
; AVX2-NEXT:    vpextrq $1, %xmm2, %rcx
; AVX2-NEXT:    vmovq %xmm2, %rax
; AVX2-NEXT:    addl %ecx, %eax
; AVX2-NEXT:    andl $3, %eax
; AVX2-NEXT:    vpextrq $1, %xmm1, %rcx
; AVX2-NEXT:    vmovq %xmm1, %rdx
; AVX2-NEXT:    andl $1, %edx
; AVX2-NEXT:    movl %edx, %esi
; AVX2-NEXT:    subq %rcx, %rdx
; AVX2-NEXT:    vextracti128 $1, %ymm1, %xmm1
; AVX2-NEXT:    vmovq %xmm1, %rcx
; AVX2-NEXT:    movl %edx, %edi
; AVX2-NEXT:    subq %rcx, %rdx
; AVX2-NEXT:    vpextrq $1, %xmm1, %rcx
; AVX2-NEXT:    movq %rdx, %r8
; AVX2-NEXT:    subq %rcx, %r8
; AVX2-NEXT:    vextracti128 $1, %ymm0, %xmm1
; AVX2-NEXT:    vpextrq $1, %xmm1, %rcx
; AVX2-NEXT:    cmpq $4, %r8
; AVX2-NEXT:    cmovbq (%rsp,%rax,8), %rcx
; AVX2-NEXT:    vmovq %xmm0, (%rsp)
; AVX2-NEXT:    vpextrq $1, %xmm0, (%rsp,%rsi,8)
; AVX2-NEXT:    vmovq %xmm1, (%rsp,%rdi,8)
; AVX2-NEXT:    andl $3, %edx
; AVX2-NEXT:    vpextrq $1, %xmm1, (%rsp,%rdx,8)
; AVX2-NEXT:    cmpq $3, %r8
; AVX2-NEXT:    movl $3, %eax
; AVX2-NEXT:    cmovbq %r8, %rax
; AVX2-NEXT:    movl %eax, %eax
; AVX2-NEXT:    movq %rcx, (%rsp,%rax,8)
; AVX2-NEXT:    vmovaps (%rsp), %ymm0
; AVX2-NEXT:    movq %rbp, %rsp
; AVX2-NEXT:    popq %rbp
; AVX2-NEXT:    .cfi_def_cfa %rsp, 8
; AVX2-NEXT:    retq
;
; AVX512F-LABEL: test_compress_v4i64:
; AVX512F:       # %bb.0:
; AVX512F-NEXT:    # kill: def $ymm2 killed $ymm2 def $zmm2
; AVX512F-NEXT:    # kill: def $ymm0 killed $ymm0 def $zmm0
; AVX512F-NEXT:    vpslld $31, %xmm1, %xmm1
; AVX512F-NEXT:    vptestmd %zmm1, %zmm1, %k0
; AVX512F-NEXT:    kshiftlw $12, %k0, %k0
; AVX512F-NEXT:    kshiftrw $12, %k0, %k1
; AVX512F-NEXT:    vpcompressq %zmm0, %zmm2 {%k1}
; AVX512F-NEXT:    vmovdqa %ymm2, %ymm0
; AVX512F-NEXT:    retq
;
; AVX512VL-LABEL: test_compress_v4i64:
; AVX512VL:       # %bb.0:
; AVX512VL-NEXT:    vpslld $31, %xmm1, %xmm1
; AVX512VL-NEXT:    vptestmd %xmm1, %xmm1, %k1
; AVX512VL-NEXT:    vpcompressq %ymm0, %ymm2 {%k1}
; AVX512VL-NEXT:    vmovdqa %ymm2, %ymm0
; AVX512VL-NEXT:    retq
    %out = call <4 x i64> @llvm.experimental.vector.compress(<4 x i64> %vec, <4 x i1> %mask, <4 x i64> %passthru)
    ret <4 x i64> %out
}

define <4 x double> @test_compress_v4f64(<4 x double> %vec, <4 x i1> %mask, <4 x double> %passthru) {
; AVX512F-LABEL: test_compress_v4f64:
; AVX512F:       # %bb.0:
; AVX512F-NEXT:    # kill: def $ymm2 killed $ymm2 def $zmm2
; AVX512F-NEXT:    # kill: def $ymm0 killed $ymm0 def $zmm0
; AVX512F-NEXT:    vpslld $31, %xmm1, %xmm1
; AVX512F-NEXT:    vptestmd %zmm1, %zmm1, %k0
; AVX512F-NEXT:    kshiftlw $12, %k0, %k0
; AVX512F-NEXT:    kshiftrw $12, %k0, %k1
; AVX512F-NEXT:    vcompresspd %zmm0, %zmm2 {%k1}
; AVX512F-NEXT:    vmovdqa %ymm2, %ymm0
; AVX512F-NEXT:    retq
;
; AVX512VL-LABEL: test_compress_v4f64:
; AVX512VL:       # %bb.0:
; AVX512VL-NEXT:    vpslld $31, %xmm1, %xmm1
; AVX512VL-NEXT:    vptestmd %xmm1, %xmm1, %k1
; AVX512VL-NEXT:    vcompresspd %ymm0, %ymm2 {%k1}
; AVX512VL-NEXT:    vmovdqa %ymm2, %ymm0
; AVX512VL-NEXT:    retq
    %out = call <4 x double> @llvm.experimental.vector.compress(<4 x double> %vec, <4 x i1> %mask, <4 x double> %passthru)
    ret <4 x double> %out
}

define <16 x i32> @test_compress_v16i32(<16 x i32> %vec, <16 x i1> %mask, <16 x i32> %passthru) {
; AVX512F-LABEL: test_compress_v16i32:
; AVX512F:       # %bb.0:
; AVX512F-NEXT:    vpmovsxbd %xmm1, %zmm1
; AVX512F-NEXT:    vpslld $31, %zmm1, %zmm1
; AVX512F-NEXT:    vptestmd %zmm1, %zmm1, %k1
; AVX512F-NEXT:    vpcompressd %zmm0, %zmm2 {%k1}
; AVX512F-NEXT:    vmovdqa64 %zmm2, %zmm0
; AVX512F-NEXT:    retq
;
; AVX512VL-LABEL: test_compress_v16i32:
; AVX512VL:       # %bb.0:
; AVX512VL-NEXT:    vpsllw $7, %xmm1, %xmm1
; AVX512VL-NEXT:    vpmovb2m %xmm1, %k1
; AVX512VL-NEXT:    vpcompressd %zmm0, %zmm2 {%k1}
; AVX512VL-NEXT:    vmovdqa64 %zmm2, %zmm0
; AVX512VL-NEXT:    retq
    %out = call <16 x i32> @llvm.experimental.vector.compress(<16 x i32> %vec, <16 x i1> %mask, <16 x i32> %passthru)
    ret <16 x i32> %out
}

define <16 x float> @test_compress_v16f32(<16 x float> %vec, <16 x i1> %mask, <16 x float> %passthru) {
; AVX512F-LABEL: test_compress_v16f32:
; AVX512F:       # %bb.0:
; AVX512F-NEXT:    vpmovsxbd %xmm1, %zmm1
; AVX512F-NEXT:    vpslld $31, %zmm1, %zmm1
; AVX512F-NEXT:    vptestmd %zmm1, %zmm1, %k1
; AVX512F-NEXT:    vcompressps %zmm0, %zmm2 {%k1}
; AVX512F-NEXT:    vmovdqa64 %zmm2, %zmm0
; AVX512F-NEXT:    retq
;
; AVX512VL-LABEL: test_compress_v16f32:
; AVX512VL:       # %bb.0:
; AVX512VL-NEXT:    vpsllw $7, %xmm1, %xmm1
; AVX512VL-NEXT:    vpmovb2m %xmm1, %k1
; AVX512VL-NEXT:    vcompressps %zmm0, %zmm2 {%k1}
; AVX512VL-NEXT:    vmovdqa64 %zmm2, %zmm0
; AVX512VL-NEXT:    retq
    %out = call <16 x float> @llvm.experimental.vector.compress(<16 x float> %vec, <16 x i1> %mask, <16 x float> %passthru)
    ret <16 x float> %out
}

define <8 x i64> @test_compress_v8i64(<8 x i64> %vec, <8 x i1> %mask, <8 x i64> %passthru) {
; AVX512F-LABEL: test_compress_v8i64:
; AVX512F:       # %bb.0:
; AVX512F-NEXT:    vpmovsxwq %xmm1, %zmm1
; AVX512F-NEXT:    vpsllq $63, %zmm1, %zmm1
; AVX512F-NEXT:    vptestmq %zmm1, %zmm1, %k1
; AVX512F-NEXT:    vpcompressq %zmm0, %zmm2 {%k1}
; AVX512F-NEXT:    vmovdqa64 %zmm2, %zmm0
; AVX512F-NEXT:    retq
;
; AVX512VL-LABEL: test_compress_v8i64:
; AVX512VL:       # %bb.0:
; AVX512VL-NEXT:    vpsllw $15, %xmm1, %xmm1
; AVX512VL-NEXT:    vpmovw2m %xmm1, %k1
; AVX512VL-NEXT:    vpcompressq %zmm0, %zmm2 {%k1}
; AVX512VL-NEXT:    vmovdqa64 %zmm2, %zmm0
; AVX512VL-NEXT:    retq
    %out = call <8 x i64> @llvm.experimental.vector.compress(<8 x i64> %vec, <8 x i1> %mask, <8 x i64> %passthru)
    ret <8 x i64> %out
}

define <8 x double> @test_compress_v8f64(<8 x double> %vec, <8 x i1> %mask, <8 x double> %passthru) {
; AVX512F-LABEL: test_compress_v8f64:
; AVX512F:       # %bb.0:
; AVX512F-NEXT:    vpmovsxwq %xmm1, %zmm1
; AVX512F-NEXT:    vpsllq $63, %zmm1, %zmm1
; AVX512F-NEXT:    vptestmq %zmm1, %zmm1, %k1
; AVX512F-NEXT:    vcompresspd %zmm0, %zmm2 {%k1}
; AVX512F-NEXT:    vmovdqa64 %zmm2, %zmm0
; AVX512F-NEXT:    retq
;
; AVX512VL-LABEL: test_compress_v8f64:
; AVX512VL:       # %bb.0:
; AVX512VL-NEXT:    vpsllw $15, %xmm1, %xmm1
; AVX512VL-NEXT:    vpmovw2m %xmm1, %k1
; AVX512VL-NEXT:    vcompresspd %zmm0, %zmm2 {%k1}
; AVX512VL-NEXT:    vmovdqa64 %zmm2, %zmm0
; AVX512VL-NEXT:    retq
    %out = call <8 x double> @llvm.experimental.vector.compress(<8 x double> %vec, <8 x i1> %mask, <8 x double> %passthru)
    ret <8 x double> %out
}

define <16 x i8> @test_compress_v16i8(<16 x i8> %vec, <16 x i1> %mask, <16 x i8> %passthru) {
; AVX512F-LABEL: test_compress_v16i8:
; AVX512F:       # %bb.0:
; AVX512F-NEXT:    vpmovsxbd %xmm1, %zmm1
; AVX512F-NEXT:    vpslld $31, %zmm1, %zmm1
; AVX512F-NEXT:    vptestmd %zmm1, %zmm1, %k1
; AVX512F-NEXT:    vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
; AVX512F-NEXT:    vpmovzxbd {{.*#+}} zmm1 = xmm2[0],zero,zero,zero,xmm2[1],zero,zero,zero,xmm2[2],zero,zero,zero,xmm2[3],zero,zero,zero,xmm2[4],zero,zero,zero,xmm2[5],zero,zero,zero,xmm2[6],zero,zero,zero,xmm2[7],zero,zero,zero,xmm2[8],zero,zero,zero,xmm2[9],zero,zero,zero,xmm2[10],zero,zero,zero,xmm2[11],zero,zero,zero,xmm2[12],zero,zero,zero,xmm2[13],zero,zero,zero,xmm2[14],zero,zero,zero,xmm2[15],zero,zero,zero
; AVX512F-NEXT:    vpcompressd %zmm0, %zmm1 {%k1}
; AVX512F-NEXT:    vpmovdb %zmm1, %xmm0
; AVX512F-NEXT:    vzeroupper
; AVX512F-NEXT:    retq
;
; AVX512VL-LABEL: test_compress_v16i8:
; AVX512VL:       # %bb.0:
; AVX512VL-NEXT:    vpsllw $7, %xmm1, %xmm1
; AVX512VL-NEXT:    vpmovb2m %xmm1, %k1
; AVX512VL-NEXT:    vpcompressb %xmm0, %xmm2 {%k1}
; AVX512VL-NEXT:    vmovdqa %xmm2, %xmm0
; AVX512VL-NEXT:    retq
    %out = call <16 x i8> @llvm.experimental.vector.compress(<16 x i8> %vec, <16 x i1> %mask, <16 x i8> %passthru)
    ret <16 x i8> %out
}

define <8 x i16> @test_compress_v8i16(<8 x i16> %vec, <8 x i1> %mask, <8 x i16> %passthru) {
; AVX512F-LABEL: test_compress_v8i16:
; AVX512F:       # %bb.0:
; AVX512F-NEXT:    vpmovsxwq %xmm1, %zmm1
; AVX512F-NEXT:    vpsllq $63, %zmm1, %zmm1
; AVX512F-NEXT:    vptestmq %zmm1, %zmm1, %k1
; AVX512F-NEXT:    vpmovzxwq {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero
; AVX512F-NEXT:    vpmovzxwq {{.*#+}} zmm1 = xmm2[0],zero,zero,zero,xmm2[1],zero,zero,zero,xmm2[2],zero,zero,zero,xmm2[3],zero,zero,zero,xmm2[4],zero,zero,zero,xmm2[5],zero,zero,zero,xmm2[6],zero,zero,zero,xmm2[7],zero,zero,zero
; AVX512F-NEXT:    vpcompressq %zmm0, %zmm1 {%k1}
; AVX512F-NEXT:    vpmovqw %zmm1, %xmm0
; AVX512F-NEXT:    vzeroupper
; AVX512F-NEXT:    retq
;
; AVX512VL-LABEL: test_compress_v8i16:
; AVX512VL:       # %bb.0:
; AVX512VL-NEXT:    vpsllw $15, %xmm1, %xmm1
; AVX512VL-NEXT:    vpmovw2m %xmm1, %k1
; AVX512VL-NEXT:    vpcompressw %xmm0, %xmm2 {%k1}
; AVX512VL-NEXT:    vmovdqa %xmm2, %xmm0
; AVX512VL-NEXT:    retq
    %out = call <8 x i16> @llvm.experimental.vector.compress(<8 x i16> %vec, <8 x i1> %mask, <8 x i16> %passthru)
    ret <8 x i16> %out
}

define <32 x i8> @test_compress_v32i8(<32 x i8> %vec, <32 x i1> %mask, <32 x i8> %passthru) {
; AVX512F-LABEL: test_compress_v32i8:
; AVX512F:       # %bb.0:
; AVX512F-NEXT:    pushq %rbp
; AVX512F-NEXT:    .cfi_def_cfa_offset 16
; AVX512F-NEXT:    .cfi_offset %rbp, -16
; AVX512F-NEXT:    movq %rsp, %rbp
; AVX512F-NEXT:    .cfi_def_cfa_register %rbp
; AVX512F-NEXT:    andq $-32, %rsp
; AVX512F-NEXT:    subq $64, %rsp
; AVX512F-NEXT:    vextracti128 $1, %ymm1, %xmm3
; AVX512F-NEXT:    vpmovsxbd %xmm3, %zmm3
; AVX512F-NEXT:    vpslld $31, %zmm3, %zmm3
; AVX512F-NEXT:    vptestmd %zmm3, %zmm3, %k1
; AVX512F-NEXT:    vpmovsxbd %xmm1, %zmm3
; AVX512F-NEXT:    vpslld $31, %zmm3, %zmm3
; AVX512F-NEXT:    vptestmd %zmm3, %zmm3, %k2
; AVX512F-NEXT:    vpmovzxbd {{.*#+}} zmm3 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
; AVX512F-NEXT:    vpcompressd %zmm3, %zmm3 {%k2} {z}
; AVX512F-NEXT:    vpmovdb %zmm3, (%rsp)
; AVX512F-NEXT:    kshiftrw $8, %k2, %k0
; AVX512F-NEXT:    kxorw %k0, %k2, %k0
; AVX512F-NEXT:    kshiftrw $4, %k0, %k2
; AVX512F-NEXT:    kxorw %k2, %k0, %k0
; AVX512F-NEXT:    kshiftrw $2, %k0, %k2
; AVX512F-NEXT:    kxorw %k2, %k0, %k0
; AVX512F-NEXT:    kshiftrw $1, %k0, %k2
; AVX512F-NEXT:    kxorw %k2, %k0, %k0
; AVX512F-NEXT:    kmovw %k0, %eax
; AVX512F-NEXT:    andl $31, %eax
; AVX512F-NEXT:    vextracti128 $1, %ymm0, %xmm0
; AVX512F-NEXT:    vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
; AVX512F-NEXT:    vpcompressd %zmm0, %zmm0 {%k1} {z}
; AVX512F-NEXT:    vpmovdb %zmm0, (%rsp,%rax)
; AVX512F-NEXT:    vpsllw $7, %ymm1, %ymm0
; AVX512F-NEXT:    vpblendvb %ymm0, (%rsp), %ymm2, %ymm0
; AVX512F-NEXT:    movq %rbp, %rsp
; AVX512F-NEXT:    popq %rbp
; AVX512F-NEXT:    .cfi_def_cfa %rsp, 8
; AVX512F-NEXT:    retq
;
; AVX512VL-LABEL: test_compress_v32i8:
; AVX512VL:       # %bb.0:
; AVX512VL-NEXT:    vpsllw $7, %ymm1, %ymm1
; AVX512VL-NEXT:    vpmovb2m %ymm1, %k1
; AVX512VL-NEXT:    vpcompressb %ymm0, %ymm2 {%k1}
; AVX512VL-NEXT:    vmovdqa %ymm2, %ymm0
; AVX512VL-NEXT:    retq
    %out = call <32 x i8> @llvm.experimental.vector.compress(<32 x i8> %vec, <32 x i1> %mask, <32 x i8> %passthru)
    ret <32 x i8> %out
}

define <16 x i16> @test_compress_v16i16(<16 x i16> %vec, <16 x i1> %mask, <16 x i16> %passthru) {
; AVX512F-LABEL: test_compress_v16i16:
; AVX512F:       # %bb.0:
; AVX512F-NEXT:    vpmovsxbd %xmm1, %zmm1
; AVX512F-NEXT:    vpslld $31, %zmm1, %zmm1
; AVX512F-NEXT:    vptestmd %zmm1, %zmm1, %k1
; AVX512F-NEXT:    vpmovzxwd {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero
; AVX512F-NEXT:    vpmovzxwd {{.*#+}} zmm1 = ymm2[0],zero,ymm2[1],zero,ymm2[2],zero,ymm2[3],zero,ymm2[4],zero,ymm2[5],zero,ymm2[6],zero,ymm2[7],zero,ymm2[8],zero,ymm2[9],zero,ymm2[10],zero,ymm2[11],zero,ymm2[12],zero,ymm2[13],zero,ymm2[14],zero,ymm2[15],zero
; AVX512F-NEXT:    vpcompressd %zmm0, %zmm1 {%k1}
; AVX512F-NEXT:    vpmovdw %zmm1, %ymm0
; AVX512F-NEXT:    retq
;
; AVX512VL-LABEL: test_compress_v16i16:
; AVX512VL:       # %bb.0:
; AVX512VL-NEXT:    vpsllw $7, %xmm1, %xmm1
; AVX512VL-NEXT:    vpmovb2m %xmm1, %k1
; AVX512VL-NEXT:    vpcompressw %ymm0, %ymm2 {%k1}
; AVX512VL-NEXT:    vmovdqa %ymm2, %ymm0
; AVX512VL-NEXT:    retq
    %out = call <16 x i16> @llvm.experimental.vector.compress(<16 x i16> %vec, <16 x i1> %mask, <16 x i16> %passthru)
    ret <16 x i16> %out
}

define <64 x i8> @test_compress_v64i8(<64 x i8> %vec, <64 x i1> %mask, <64 x i8> %passthru) {
; AVX512VL-LABEL: test_compress_v64i8:
; AVX512VL:       # %bb.0:
; AVX512VL-NEXT:    vpsllw $7, %zmm1, %zmm1
; AVX512VL-NEXT:    vpmovb2m %zmm1, %k1
; AVX512VL-NEXT:    vpcompressb %zmm0, %zmm2 {%k1}
; AVX512VL-NEXT:    vmovdqa64 %zmm2, %zmm0
; AVX512VL-NEXT:    retq
    %out = call <64 x i8> @llvm.experimental.vector.compress(<64 x i8> %vec, <64 x i1> %mask, <64 x i8> %passthru)
    ret <64 x i8> %out
}

define <32 x i16> @test_compress_v32i16(<32 x i16> %vec, <32 x i1> %mask, <32 x i16> %passthru) {
; AVX512F-LABEL: test_compress_v32i16:
; AVX512F:       # %bb.0:
; AVX512F-NEXT:    pushq %rbp
; AVX512F-NEXT:    .cfi_def_cfa_offset 16
; AVX512F-NEXT:    .cfi_offset %rbp, -16
; AVX512F-NEXT:    movq %rsp, %rbp
; AVX512F-NEXT:    .cfi_def_cfa_register %rbp
; AVX512F-NEXT:    andq $-64, %rsp
; AVX512F-NEXT:    subq $128, %rsp
; AVX512F-NEXT:    vpmovzxbw {{.*#+}} ymm3 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero,xmm1[8],zero,xmm1[9],zero,xmm1[10],zero,xmm1[11],zero,xmm1[12],zero,xmm1[13],zero,xmm1[14],zero,xmm1[15],zero
; AVX512F-NEXT:    vextracti128 $1, %ymm1, %xmm5
; AVX512F-NEXT:    vpmovzxbw {{.*#+}} ymm4 = xmm5[0],zero,xmm5[1],zero,xmm5[2],zero,xmm5[3],zero,xmm5[4],zero,xmm5[5],zero,xmm5[6],zero,xmm5[7],zero,xmm5[8],zero,xmm5[9],zero,xmm5[10],zero,xmm5[11],zero,xmm5[12],zero,xmm5[13],zero,xmm5[14],zero,xmm5[15],zero
; AVX512F-NEXT:    vpmovsxbd %xmm5, %zmm5
; AVX512F-NEXT:    vpslld $31, %zmm5, %zmm5
; AVX512F-NEXT:    vptestmd %zmm5, %zmm5, %k1
; AVX512F-NEXT:    vpmovsxbd %xmm1, %zmm1
; AVX512F-NEXT:    vpslld $31, %zmm1, %zmm1
; AVX512F-NEXT:    vptestmd %zmm1, %zmm1, %k2
; AVX512F-NEXT:    vpmovzxwd {{.*#+}} zmm1 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero
; AVX512F-NEXT:    vpcompressd %zmm1, %zmm1 {%k2} {z}
; AVX512F-NEXT:    vpmovdw %zmm1, (%rsp)
; AVX512F-NEXT:    kshiftrw $8, %k2, %k0
; AVX512F-NEXT:    kxorw %k0, %k2, %k0
; AVX512F-NEXT:    kshiftrw $4, %k0, %k2
; AVX512F-NEXT:    kxorw %k2, %k0, %k0
; AVX512F-NEXT:    kshiftrw $2, %k0, %k2
; AVX512F-NEXT:    kxorw %k2, %k0, %k0
; AVX512F-NEXT:    kshiftrw $1, %k0, %k2
; AVX512F-NEXT:    kxorw %k2, %k0, %k0
; AVX512F-NEXT:    kmovw %k0, %eax
; AVX512F-NEXT:    andl $31, %eax
; AVX512F-NEXT:    vextracti64x4 $1, %zmm0, %ymm0
; AVX512F-NEXT:    vpmovzxwd {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero
; AVX512F-NEXT:    vpcompressd %zmm0, %zmm0 {%k1} {z}
; AVX512F-NEXT:    vpmovdw %zmm0, (%rsp,%rax,2)
; AVX512F-NEXT:    vextracti64x4 $1, %zmm2, %ymm0
; AVX512F-NEXT:    vpsllw $15, %ymm4, %ymm1
; AVX512F-NEXT:    vpsraw $15, %ymm1, %ymm1
; AVX512F-NEXT:    vpblendvb %ymm1, {{[0-9]+}}(%rsp), %ymm0, %ymm0
; AVX512F-NEXT:    vpsllw $15, %ymm3, %ymm1
; AVX512F-NEXT:    vpsraw $15, %ymm1, %ymm1
; AVX512F-NEXT:    vpblendvb %ymm1, (%rsp), %ymm2, %ymm1
; AVX512F-NEXT:    vinserti64x4 $1, %ymm0, %zmm1, %zmm0
; AVX512F-NEXT:    movq %rbp, %rsp
; AVX512F-NEXT:    popq %rbp
; AVX512F-NEXT:    .cfi_def_cfa %rsp, 8
; AVX512F-NEXT:    retq
;
; AVX512VL-LABEL: test_compress_v32i16:
; AVX512VL:       # %bb.0:
; AVX512VL-NEXT:    vpsllw $7, %ymm1, %ymm1
; AVX512VL-NEXT:    vpmovb2m %ymm1, %k1
; AVX512VL-NEXT:    vpcompressw %zmm0, %zmm2 {%k1}
; AVX512VL-NEXT:    vmovdqa64 %zmm2, %zmm0
; AVX512VL-NEXT:    retq
    %out = call <32 x i16> @llvm.experimental.vector.compress(<32 x i16> %vec, <32 x i1> %mask, <32 x i16> %passthru)
    ret <32 x i16> %out
}

define <64 x i32> @test_compress_large(<64 x i1> %mask, <64 x i32> %vec, <64 x i32> %passthru) {
; AVX512VL-LABEL: test_compress_large:
; AVX512VL:       # %bb.0:
; AVX512VL-NEXT:    pushq %rbp
; AVX512VL-NEXT:    .cfi_def_cfa_offset 16
; AVX512VL-NEXT:    .cfi_offset %rbp, -16
; AVX512VL-NEXT:    movq %rsp, %rbp
; AVX512VL-NEXT:    .cfi_def_cfa_register %rbp
; AVX512VL-NEXT:    andq $-64, %rsp
; AVX512VL-NEXT:    subq $576, %rsp # imm = 0x240
; AVX512VL-NEXT:    vpsllw $7, %zmm0, %zmm0
; AVX512VL-NEXT:    vpmovb2m %zmm0, %k1
; AVX512VL-NEXT:    kshiftrq $32, %k1, %k4
; AVX512VL-NEXT:    kshiftrd $16, %k4, %k3
; AVX512VL-NEXT:    kshiftrd $16, %k1, %k2
; AVX512VL-NEXT:    vpcompressd %zmm1, %zmm0 {%k1} {z}
; AVX512VL-NEXT:    vmovdqa64 %zmm0, (%rsp)
; AVX512VL-NEXT:    kshiftrw $8, %k1, %k0
; AVX512VL-NEXT:    kxorw %k0, %k1, %k0
; AVX512VL-NEXT:    kshiftrw $4, %k0, %k5
; AVX512VL-NEXT:    kxorw %k5, %k0, %k0
; AVX512VL-NEXT:    kshiftrw $2, %k0, %k5
; AVX512VL-NEXT:    kxorw %k5, %k0, %k0
; AVX512VL-NEXT:    kshiftrw $1, %k0, %k5
; AVX512VL-NEXT:    kxorw %k5, %k0, %k0
; AVX512VL-NEXT:    kmovd %k0, %eax
; AVX512VL-NEXT:    andl $31, %eax
; AVX512VL-NEXT:    vpcompressd %zmm2, %zmm0 {%k2} {z}
; AVX512VL-NEXT:    vmovdqa64 %zmm0, (%rsp,%rax,4)
; AVX512VL-NEXT:    vpcompressd %zmm3, %zmm0 {%k4} {z}
; AVX512VL-NEXT:    vmovdqa64 %zmm0, {{[0-9]+}}(%rsp)
; AVX512VL-NEXT:    kshiftrw $8, %k4, %k0
; AVX512VL-NEXT:    kxorw %k0, %k4, %k0
; AVX512VL-NEXT:    kshiftrw $4, %k0, %k4
; AVX512VL-NEXT:    kxorw %k4, %k0, %k0
; AVX512VL-NEXT:    kshiftrw $2, %k0, %k4
; AVX512VL-NEXT:    kxorw %k4, %k0, %k0
; AVX512VL-NEXT:    kshiftrw $1, %k0, %k4
; AVX512VL-NEXT:    kxorw %k4, %k0, %k0
; AVX512VL-NEXT:    kmovd %k0, %eax
; AVX512VL-NEXT:    andl $31, %eax
; AVX512VL-NEXT:    vpcompressd %zmm4, %zmm0 {%k3} {z}
; AVX512VL-NEXT:    vmovdqa64 %zmm0, 128(%rsp,%rax,4)
; AVX512VL-NEXT:    vmovaps (%rsp), %zmm0
; AVX512VL-NEXT:    vmovaps {{[0-9]+}}(%rsp), %zmm1
; AVX512VL-NEXT:    vmovaps %zmm0, {{[0-9]+}}(%rsp)
; AVX512VL-NEXT:    kxorw %k2, %k1, %k0
; AVX512VL-NEXT:    kshiftrw $8, %k0, %k1
; AVX512VL-NEXT:    kxorw %k1, %k0, %k0
; AVX512VL-NEXT:    kshiftrw $4, %k0, %k1
; AVX512VL-NEXT:    kxorw %k1, %k0, %k0
; AVX512VL-NEXT:    kshiftrw $2, %k0, %k1
; AVX512VL-NEXT:    kxorw %k1, %k0, %k0
; AVX512VL-NEXT:    kshiftrw $1, %k0, %k1
; AVX512VL-NEXT:    kxorw %k1, %k0, %k0
; AVX512VL-NEXT:    kmovd %k0, %eax
; AVX512VL-NEXT:    andl $63, %eax
; AVX512VL-NEXT:    vmovaps {{[0-9]+}}(%rsp), %zmm0
; AVX512VL-NEXT:    vmovaps {{[0-9]+}}(%rsp), %zmm2
; AVX512VL-NEXT:    vmovaps %zmm0, 256(%rsp,%rax,4)
; AVX512VL-NEXT:    vmovaps %zmm1, {{[0-9]+}}(%rsp)
; AVX512VL-NEXT:    vmovaps %zmm2, 320(%rsp,%rax,4)
; AVX512VL-NEXT:    vmovaps {{[0-9]+}}(%rsp), %zmm0
; AVX512VL-NEXT:    vmovaps {{[0-9]+}}(%rsp), %zmm1
; AVX512VL-NEXT:    vmovaps {{[0-9]+}}(%rsp), %zmm2
; AVX512VL-NEXT:    vmovaps {{[0-9]+}}(%rsp), %zmm3
; AVX512VL-NEXT:    movq %rbp, %rsp
; AVX512VL-NEXT:    popq %rbp
; AVX512VL-NEXT:    .cfi_def_cfa %rsp, 8
; AVX512VL-NEXT:    retq
    %out = call <64 x i32> @llvm.experimental.vector.compress(<64 x i32> %vec, <64 x i1> %mask, <64 x i32> undef)
    ret <64 x i32> %out
}

define <4 x i32> @test_compress_all_const() {
; CHECK-LABEL: test_compress_all_const:
; CHECK:       # %bb.0:
; CHECK-NEXT:    vmovsd {{.*#+}} xmm0 = [5,9,0,0]
; CHECK-NEXT:    retq
    %out = call <4 x i32> @llvm.experimental.vector.compress(<4 x i32> <i32 3, i32 5, i32 7, i32 9>,
                                                <4 x i1>   <i1 0,  i1 1,  i1 0,  i1 1>,
                                                <4 x i32> undef)
    ret <4 x i32> %out
}

define <4 x i32> @test_compress_const_mask(<4 x i32> %vec) {
; CHECK-LABEL: test_compress_const_mask:
; CHECK:       # %bb.0:
; CHECK-NEXT:    vshufps {{.*#+}} xmm0 = xmm0[0,3,2,3]
; CHECK-NEXT:    retq
    %out = call <4 x i32> @llvm.experimental.vector.compress(<4 x i32> %vec, <4 x i1> <i1 1, i1 undef, i1 0, i1 1>, <4 x i32> undef)
    ret <4 x i32> %out
}

define <4 x i32> @test_compress_const_mask_passthrough(<4 x i32> %vec, <4 x i32> %passthru) {
; CHECK-LABEL: test_compress_const_mask_passthrough:
; CHECK:       # %bb.0:
; CHECK-NEXT:    vshufps {{.*#+}} xmm0 = xmm0[0,3],xmm1[2,3]
; CHECK-NEXT:    retq
    %out = call <4 x i32> @llvm.experimental.vector.compress(<4 x i32> %vec, <4 x i1> <i1 1, i1 undef, i1 0, i1 1>, <4 x i32> %passthru)
    ret <4 x i32> %out
}

define <4 x i32> @test_compress_const_mask_const_passthrough(<4 x i32> %vec) {
; CHECK-LABEL: test_compress_const_mask_const_passthrough:
; CHECK:       # %bb.0:
; CHECK-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,3,2,3]
; CHECK-NEXT:    movl $7, %eax
; CHECK-NEXT:    vpinsrd $2, %eax, %xmm0, %xmm0
; CHECK-NEXT:    movl $8, %eax
; CHECK-NEXT:    vpinsrd $3, %eax, %xmm0, %xmm0
; CHECK-NEXT:    retq
    %out = call <4 x i32> @llvm.experimental.vector.compress(<4 x i32> %vec, <4 x i1> <i1 1, i1 0, i1 0, i1 1>, <4 x i32> <i32 5, i32 6, i32 7, i32 8>)
    ret <4 x i32> %out
}

; We pass a placeholder value for the const_mask* tests to check that they are converted to a no-op by simply copying
; the second vector input register to the return register or doing nothing.
define <4 x i32> @test_compress_const_splat1_mask(<4 x i32> %ignore, <4 x i32> %vec) {
; CHECK-LABEL: test_compress_const_splat1_mask:
; CHECK:       # %bb.0:
; CHECK-NEXT:    vmovaps %xmm1, %xmm0
; CHECK-NEXT:    retq
    %out = call <4 x i32> @llvm.experimental.vector.compress(<4 x i32> %vec, <4 x i1> splat (i1 -1), <4 x i32> undef)
    ret <4 x i32> %out
}
define <4 x i32> @test_compress_const_splat0_mask(<4 x i32> %ignore, <4 x i32> %vec) {
; CHECK-LABEL: test_compress_const_splat0_mask:
; CHECK:       # %bb.0:
; CHECK-NEXT:    retq
    %out = call <4 x i32> @llvm.experimental.vector.compress(<4 x i32> %vec, <4 x i1> splat (i1 0), <4 x i32> undef)
    ret <4 x i32> %out
}
define <4 x i32> @test_compress_undef_mask(<4 x i32> %ignore, <4 x i32> %vec) {
; CHECK-LABEL: test_compress_undef_mask:
; CHECK:       # %bb.0:
; CHECK-NEXT:    retq
    %out = call <4 x i32> @llvm.experimental.vector.compress(<4 x i32> %vec, <4 x i1> undef, <4 x i32> undef)
    ret <4 x i32> %out
}
define <4 x i32> @test_compress_const_splat0_mask_with_passthru(<4 x i32> %ignore, <4 x i32> %vec, <4 x i32> %passthru) {
; CHECK-LABEL: test_compress_const_splat0_mask_with_passthru:
; CHECK:       # %bb.0:
; CHECK-NEXT:    vmovaps %xmm2, %xmm0
; CHECK-NEXT:    retq
    %out = call <4 x i32> @llvm.experimental.vector.compress(<4 x i32> %vec, <4 x i1> splat (i1 0), <4 x i32> %passthru)
    ret <4 x i32> %out
}
define <4 x i32> @test_compress_const_splat0_mask_without_passthru(<4 x i32> %ignore, <4 x i32> %vec) {
; CHECK-LABEL: test_compress_const_splat0_mask_without_passthru:
; CHECK:       # %bb.0:
; CHECK-NEXT:    retq
    %out = call <4 x i32> @llvm.experimental.vector.compress(<4 x i32> %vec, <4 x i1> splat (i1 0), <4 x i32> undef)
    ret <4 x i32> %out
}

define <4 x i8> @test_compress_small(<4 x i8> %vec, <4 x i1> %mask) {
; AVX512F-LABEL: test_compress_small:
; AVX512F:       # %bb.0:
; AVX512F-NEXT:    vpslld $31, %xmm1, %xmm1
; AVX512F-NEXT:    vptestmd %zmm1, %zmm1, %k0
; AVX512F-NEXT:    kshiftlw $12, %k0, %k0
; AVX512F-NEXT:    kshiftrw $12, %k0, %k1
; AVX512F-NEXT:    vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
; AVX512F-NEXT:    vpcompressd %zmm0, %zmm0 {%k1} {z}
; AVX512F-NEXT:    vpmovdb %zmm0, %xmm0
; AVX512F-NEXT:    vzeroupper
; AVX512F-NEXT:    retq
;
; AVX512VL-LABEL: test_compress_small:
; AVX512VL:       # %bb.0:
; AVX512VL-NEXT:    vpslld $31, %xmm1, %xmm1
; AVX512VL-NEXT:    vptestmd %xmm1, %xmm1, %k1
; AVX512VL-NEXT:    vpcompressb %xmm0, %xmm0 {%k1} {z}
; AVX512VL-NEXT:    retq
    %out = call <4 x i8> @llvm.experimental.vector.compress(<4 x i8> %vec, <4 x i1> %mask, <4 x i8> undef)
    ret <4 x i8> %out
}

define <4 x i4> @test_compress_illegal_element_type(<4 x i4> %vec, <4 x i1> %mask) {
; AVX2-LABEL: test_compress_illegal_element_type:
; AVX2:       # %bb.0:
; AVX2-NEXT:    vpslld $31, %xmm1, %xmm1
; AVX2-NEXT:    vpsrad $31, %xmm1, %xmm1
; AVX2-NEXT:    vmovss %xmm0, -{{[0-9]+}}(%rsp)
; AVX2-NEXT:    vmovd %xmm1, %eax
; AVX2-NEXT:    andl $1, %eax
; AVX2-NEXT:    vextractps $1, %xmm0, -24(%rsp,%rax,4)
; AVX2-NEXT:    vpextrd $1, %xmm1, %ecx
; AVX2-NEXT:    subl %ecx, %eax
; AVX2-NEXT:    leal (,%rax,4), %ecx
; AVX2-NEXT:    vextractps $2, %xmm0, -24(%rsp,%rcx)
; AVX2-NEXT:    vpextrd $2, %xmm1, %ecx
; AVX2-NEXT:    subl %ecx, %eax
; AVX2-NEXT:    andl $3, %eax
; AVX2-NEXT:    vextractps $3, %xmm0, -24(%rsp,%rax,4)
; AVX2-NEXT:    vmovaps -{{[0-9]+}}(%rsp), %xmm0
; AVX2-NEXT:    retq
;
; AVX512F-LABEL: test_compress_illegal_element_type:
; AVX512F:       # %bb.0:
; AVX512F-NEXT:    # kill: def $xmm0 killed $xmm0 def $zmm0
; AVX512F-NEXT:    vpslld $31, %xmm1, %xmm1
; AVX512F-NEXT:    vptestmd %zmm1, %zmm1, %k0
; AVX512F-NEXT:    kshiftlw $12, %k0, %k0
; AVX512F-NEXT:    kshiftrw $12, %k0, %k1
; AVX512F-NEXT:    vpcompressd %zmm0, %zmm0 {%k1} {z}
; AVX512F-NEXT:    # kill: def $xmm0 killed $xmm0 killed $zmm0
; AVX512F-NEXT:    vzeroupper
; AVX512F-NEXT:    retq
;
; AVX512VL-LABEL: test_compress_illegal_element_type:
; AVX512VL:       # %bb.0:
; AVX512VL-NEXT:    vpslld $31, %xmm1, %xmm1
; AVX512VL-NEXT:    vptestmd %xmm1, %xmm1, %k1
; AVX512VL-NEXT:    vpcompressd %xmm0, %xmm0 {%k1} {z}
; AVX512VL-NEXT:    retq
    %out = call <4 x i4> @llvm.experimental.vector.compress(<4 x i4> %vec, <4 x i1> %mask, <4 x i4> undef)
    ret <4 x i4> %out
}

define <3 x i32> @test_compress_narrow(<3 x i32> %vec, <3 x i1> %mask) {
; AVX2-LABEL: test_compress_narrow:
; AVX2:       # %bb.0:
; AVX2-NEXT:    vmovd %edi, %xmm1
; AVX2-NEXT:    vpinsrd $1, %esi, %xmm1, %xmm1
; AVX2-NEXT:    vpinsrd $2, %edx, %xmm1, %xmm1
; AVX2-NEXT:    vpslld $31, %xmm1, %xmm1
; AVX2-NEXT:    vpsrad $31, %xmm1, %xmm1
; AVX2-NEXT:    vmovss %xmm0, -{{[0-9]+}}(%rsp)
; AVX2-NEXT:    vmovd %xmm1, %eax
; AVX2-NEXT:    andl $1, %eax
; AVX2-NEXT:    vextractps $1, %xmm0, -24(%rsp,%rax,4)
; AVX2-NEXT:    vpextrd $1, %xmm1, %ecx
; AVX2-NEXT:    subl %ecx, %eax
; AVX2-NEXT:    leal (,%rax,4), %ecx
; AVX2-NEXT:    vextractps $2, %xmm0, -24(%rsp,%rcx)
; AVX2-NEXT:    vpextrd $2, %xmm1, %ecx
; AVX2-NEXT:    subl %ecx, %eax
; AVX2-NEXT:    andl $3, %eax
; AVX2-NEXT:    vextractps $3, %xmm0, -24(%rsp,%rax,4)
; AVX2-NEXT:    vmovaps -{{[0-9]+}}(%rsp), %xmm0
; AVX2-NEXT:    retq
;
; AVX512F-LABEL: test_compress_narrow:
; AVX512F:       # %bb.0:
; AVX512F-NEXT:    # kill: def $xmm0 killed $xmm0 def $zmm0
; AVX512F-NEXT:    andl $1, %edi
; AVX512F-NEXT:    kmovw %edi, %k0
; AVX512F-NEXT:    kmovw %esi, %k1
; AVX512F-NEXT:    kshiftlw $15, %k1, %k1
; AVX512F-NEXT:    kshiftrw $14, %k1, %k1
; AVX512F-NEXT:    korw %k1, %k0, %k0
; AVX512F-NEXT:    movw $-5, %ax
; AVX512F-NEXT:    kmovw %eax, %k1
; AVX512F-NEXT:    kandw %k1, %k0, %k0
; AVX512F-NEXT:    kmovw %edx, %k1
; AVX512F-NEXT:    kshiftlw $15, %k1, %k1
; AVX512F-NEXT:    kshiftrw $13, %k1, %k1
; AVX512F-NEXT:    korw %k1, %k0, %k0
; AVX512F-NEXT:    movb $7, %al
; AVX512F-NEXT:    kmovw %eax, %k1
; AVX512F-NEXT:    kandw %k1, %k0, %k0
; AVX512F-NEXT:    kshiftlw $12, %k0, %k0
; AVX512F-NEXT:    kshiftrw $12, %k0, %k1
; AVX512F-NEXT:    vpcompressd %zmm0, %zmm0 {%k1} {z}
; AVX512F-NEXT:    # kill: def $xmm0 killed $xmm0 killed $zmm0
; AVX512F-NEXT:    vzeroupper
; AVX512F-NEXT:    retq
;
; AVX512VL-LABEL: test_compress_narrow:
; AVX512VL:       # %bb.0:
; AVX512VL-NEXT:    andl $1, %edi
; AVX512VL-NEXT:    kmovw %edi, %k0
; AVX512VL-NEXT:    kmovd %esi, %k1
; AVX512VL-NEXT:    kshiftlw $15, %k1, %k1
; AVX512VL-NEXT:    kshiftrw $14, %k1, %k1
; AVX512VL-NEXT:    korw %k1, %k0, %k0
; AVX512VL-NEXT:    movw $-5, %ax
; AVX512VL-NEXT:    kmovd %eax, %k1
; AVX512VL-NEXT:    kandw %k1, %k0, %k0
; AVX512VL-NEXT:    kmovd %edx, %k1
; AVX512VL-NEXT:    kshiftlw $15, %k1, %k1
; AVX512VL-NEXT:    kshiftrw $13, %k1, %k1
; AVX512VL-NEXT:    korw %k1, %k0, %k0
; AVX512VL-NEXT:    movb $7, %al
; AVX512VL-NEXT:    kmovd %eax, %k1
; AVX512VL-NEXT:    kandw %k1, %k0, %k1
; AVX512VL-NEXT:    vpcompressd %xmm0, %xmm0 {%k1} {z}
; AVX512VL-NEXT:    retq
    %out = call <3 x i32> @llvm.experimental.vector.compress(<3 x i32> %vec, <3 x i1> %mask, <3 x i32> undef)
    ret <3 x i32> %out
}

define <3 x i3> @test_compress_narrow_illegal_element_type(<3 x i3> %vec, <3 x i1> %mask) {
; AVX2-LABEL: test_compress_narrow_illegal_element_type:
; AVX2:       # %bb.0:
; AVX2-NEXT:    vmovd %ecx, %xmm0
; AVX2-NEXT:    vpinsrd $1, %r8d, %xmm0, %xmm0
; AVX2-NEXT:    vpslld $31, %xmm0, %xmm0
; AVX2-NEXT:    vpsrad $31, %xmm0, %xmm0
; AVX2-NEXT:    movl %edi, -{{[0-9]+}}(%rsp)
; AVX2-NEXT:    vmovd %xmm0, %eax
; AVX2-NEXT:    andl $1, %eax
; AVX2-NEXT:    movl %esi, -24(%rsp,%rax,4)
; AVX2-NEXT:    vpextrd $1, %xmm0, %ecx
; AVX2-NEXT:    subl %ecx, %eax
; AVX2-NEXT:    shll $2, %eax
; AVX2-NEXT:    movl %edx, -24(%rsp,%rax)
; AVX2-NEXT:    vmovdqa -{{[0-9]+}}(%rsp), %xmm0
; AVX2-NEXT:    vmovd %xmm0, %eax
; AVX2-NEXT:    vpextrb $4, %xmm0, %edx
; AVX2-NEXT:    vpextrb $8, %xmm0, %ecx
; AVX2-NEXT:    # kill: def $al killed $al killed $eax
; AVX2-NEXT:    # kill: def $dl killed $dl killed $edx
; AVX2-NEXT:    # kill: def $cl killed $cl killed $ecx
; AVX2-NEXT:    retq
;
; AVX512F-LABEL: test_compress_narrow_illegal_element_type:
; AVX512F:       # %bb.0:
; AVX512F-NEXT:    andl $1, %ecx
; AVX512F-NEXT:    kmovw %ecx, %k0
; AVX512F-NEXT:    kmovw %r8d, %k1
; AVX512F-NEXT:    kshiftlw $15, %k1, %k1
; AVX512F-NEXT:    kshiftrw $14, %k1, %k1
; AVX512F-NEXT:    korw %k1, %k0, %k0
; AVX512F-NEXT:    movw $-5, %ax
; AVX512F-NEXT:    kmovw %eax, %k1
; AVX512F-NEXT:    kandw %k1, %k0, %k0
; AVX512F-NEXT:    kmovw %r9d, %k1
; AVX512F-NEXT:    kshiftlw $15, %k1, %k1
; AVX512F-NEXT:    kshiftrw $13, %k1, %k1
; AVX512F-NEXT:    korw %k1, %k0, %k0
; AVX512F-NEXT:    movb $7, %al
; AVX512F-NEXT:    kmovw %eax, %k1
; AVX512F-NEXT:    kandw %k1, %k0, %k0
; AVX512F-NEXT:    vmovd %edi, %xmm0
; AVX512F-NEXT:    vpinsrd $1, %esi, %xmm0, %xmm0
; AVX512F-NEXT:    vpinsrd $2, %edx, %xmm0, %xmm0
; AVX512F-NEXT:    kshiftlw $12, %k0, %k0
; AVX512F-NEXT:    kshiftrw $12, %k0, %k1
; AVX512F-NEXT:    vpcompressd %zmm0, %zmm0 {%k1} {z}
; AVX512F-NEXT:    vmovd %xmm0, %eax
; AVX512F-NEXT:    vpextrb $4, %xmm0, %edx
; AVX512F-NEXT:    vpextrb $8, %xmm0, %ecx
; AVX512F-NEXT:    # kill: def $al killed $al killed $eax
; AVX512F-NEXT:    # kill: def $dl killed $dl killed $edx
; AVX512F-NEXT:    # kill: def $cl killed $cl killed $ecx
; AVX512F-NEXT:    vzeroupper
; AVX512F-NEXT:    retq
;
; AVX512VL-LABEL: test_compress_narrow_illegal_element_type:
; AVX512VL:       # %bb.0:
; AVX512VL-NEXT:    andl $1, %ecx
; AVX512VL-NEXT:    kmovw %ecx, %k0
; AVX512VL-NEXT:    kmovd %r8d, %k1
; AVX512VL-NEXT:    kshiftlw $15, %k1, %k1
; AVX512VL-NEXT:    kshiftrw $14, %k1, %k1
; AVX512VL-NEXT:    korw %k1, %k0, %k0
; AVX512VL-NEXT:    movw $-5, %ax
; AVX512VL-NEXT:    kmovd %eax, %k1
; AVX512VL-NEXT:    kandw %k1, %k0, %k0
; AVX512VL-NEXT:    kmovd %r9d, %k1
; AVX512VL-NEXT:    kshiftlw $15, %k1, %k1
; AVX512VL-NEXT:    kshiftrw $13, %k1, %k1
; AVX512VL-NEXT:    korw %k1, %k0, %k0
; AVX512VL-NEXT:    movb $7, %al
; AVX512VL-NEXT:    kmovd %eax, %k1
; AVX512VL-NEXT:    kandw %k1, %k0, %k1
; AVX512VL-NEXT:    vmovd %edi, %xmm0
; AVX512VL-NEXT:    vpinsrd $1, %esi, %xmm0, %xmm0
; AVX512VL-NEXT:    vpinsrd $2, %edx, %xmm0, %xmm0
; AVX512VL-NEXT:    vpcompressd %xmm0, %xmm0 {%k1} {z}
; AVX512VL-NEXT:    vmovd %xmm0, %eax
; AVX512VL-NEXT:    vpextrb $4, %xmm0, %edx
; AVX512VL-NEXT:    vpextrb $8, %xmm0, %ecx
; AVX512VL-NEXT:    # kill: def $al killed $al killed $eax
; AVX512VL-NEXT:    # kill: def $dl killed $dl killed $edx
; AVX512VL-NEXT:    # kill: def $cl killed $cl killed $ecx
; AVX512VL-NEXT:    retq
    %out = call <3 x i3> @llvm.experimental.vector.compress(<3 x i3> %vec, <3 x i1> %mask, <3 x i3> undef)
    ret <3 x i3> %out
}

define <4 x i32> @test_compress_v4i32_zero_passthru(<4 x i32> %vec, <4 x i1> %mask) {
; AVX2-LABEL: test_compress_v4i32_zero_passthru:
; AVX2:       # %bb.0:
; AVX2-NEXT:    vpslld $31, %xmm1, %xmm1
; AVX2-NEXT:    vpsrad $31, %xmm1, %xmm1
; AVX2-NEXT:    vxorps %xmm2, %xmm2, %xmm2
; AVX2-NEXT:    vmovaps %xmm2, -{{[0-9]+}}(%rsp)
; AVX2-NEXT:    vmovss %xmm0, -{{[0-9]+}}(%rsp)
; AVX2-NEXT:    vmovd %xmm1, %eax
; AVX2-NEXT:    andl $1, %eax
; AVX2-NEXT:    vextractps $1, %xmm0, -24(%rsp,%rax,4)
; AVX2-NEXT:    vpextrd $1, %xmm1, %ecx
; AVX2-NEXT:    andl $1, %ecx
; AVX2-NEXT:    addq %rax, %rcx
; AVX2-NEXT:    vextractps $2, %xmm0, -24(%rsp,%rcx,4)
; AVX2-NEXT:    vpextrd $2, %xmm1, %eax
; AVX2-NEXT:    andl $1, %eax
; AVX2-NEXT:    addq %rcx, %rax
; AVX2-NEXT:    vpextrd $3, %xmm1, %ecx
; AVX2-NEXT:    andl $1, %ecx
; AVX2-NEXT:    addq %rax, %rcx
; AVX2-NEXT:    # kill: def $eax killed $eax killed $rax def $rax
; AVX2-NEXT:    andl $3, %eax
; AVX2-NEXT:    vextractps $3, %xmm0, -24(%rsp,%rax,4)
; AVX2-NEXT:    xorl %eax, %eax
; AVX2-NEXT:    cmpq $3, %rcx
; AVX2-NEXT:    movl $3, %edx
; AVX2-NEXT:    cmovbq %rcx, %rdx
; AVX2-NEXT:    vextractps $3, %xmm0, %ecx
; AVX2-NEXT:    cmovbel %eax, %ecx
; AVX2-NEXT:    movl %ecx, -24(%rsp,%rdx,4)
; AVX2-NEXT:    vmovaps -{{[0-9]+}}(%rsp), %xmm0
; AVX2-NEXT:    retq
;
; AVX512F-LABEL: test_compress_v4i32_zero_passthru:
; AVX512F:       # %bb.0:
; AVX512F-NEXT:    # kill: def $xmm0 killed $xmm0 def $zmm0
; AVX512F-NEXT:    vpslld $31, %xmm1, %xmm1
; AVX512F-NEXT:    vptestmd %zmm1, %zmm1, %k0
; AVX512F-NEXT:    kshiftlw $12, %k0, %k0
; AVX512F-NEXT:    kshiftrw $12, %k0, %k1
; AVX512F-NEXT:    vpcompressd %zmm0, %zmm0 {%k1} {z}
; AVX512F-NEXT:    # kill: def $xmm0 killed $xmm0 killed $zmm0
; AVX512F-NEXT:    vzeroupper
; AVX512F-NEXT:    retq
;
; AVX512VL-LABEL: test_compress_v4i32_zero_passthru:
; AVX512VL:       # %bb.0:
; AVX512VL-NEXT:    vpslld $31, %xmm1, %xmm1
; AVX512VL-NEXT:    vptestmd %xmm1, %xmm1, %k1
; AVX512VL-NEXT:    vpcompressd %xmm0, %xmm0 {%k1} {z}
; AVX512VL-NEXT:    retq
    %out = call <4 x i32> @llvm.experimental.vector.compress(<4 x i32> %vec, <4 x i1> %mask, <4 x i32> zeroinitializer)
    ret <4 x i32> %out
}