| ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5 |
| ; RUN: opt -passes=loop-vectorize \ |
| ; RUN: -prefer-predicate-over-epilogue=predicate-else-scalar-epilogue \ |
| ; RUN: -mtriple=riscv64 -mattr=+v -S %s | FileCheck %s --check-prefix=IF-EVL |
| |
| ; RUN: opt -passes=loop-vectorize \ |
| ; RUN: -prefer-predicate-over-epilogue=scalar-epilogue \ |
| ; RUN: -mtriple=riscv64 -mattr=+v -S %s | FileCheck %s --check-prefix=NO-VP |
| |
| |
| define void @test_and(ptr nocapture %a, ptr nocapture readonly %b) { |
| ; IF-EVL-LABEL: define void @test_and( |
| ; IF-EVL-SAME: ptr captures(none) [[A:%.*]], ptr readonly captures(none) [[B:%.*]]) #[[ATTR0:[0-9]+]] { |
| ; IF-EVL-NEXT: [[LOOP_PREHEADER:.*]]: |
| ; IF-EVL-NEXT: [[A2:%.*]] = ptrtoint ptr [[A]] to i64 |
| ; IF-EVL-NEXT: [[B1:%.*]] = ptrtoint ptr [[B]] to i64 |
| ; IF-EVL-NEXT: br i1 false, label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]] |
| ; IF-EVL: [[VECTOR_MEMCHECK]]: |
| ; IF-EVL-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() |
| ; IF-EVL-NEXT: [[TMP1:%.*]] = mul nuw i64 [[TMP0]], 16 |
| ; IF-EVL-NEXT: [[TMP2:%.*]] = sub i64 [[B1]], [[A2]] |
| ; IF-EVL-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP2]], [[TMP1]] |
| ; IF-EVL-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]] |
| ; IF-EVL: [[VECTOR_PH]]: |
| ; IF-EVL-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; IF-EVL: [[VECTOR_BODY]]: |
| ; IF-EVL-NEXT: [[EVL_BASED_IV:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_EVL_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; IF-EVL-NEXT: [[TMP10:%.*]] = phi i64 [ 100, %[[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; IF-EVL-NEXT: [[TMP11:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[TMP10]], i32 16, i1 true) |
| ; IF-EVL-NEXT: [[TMP13:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 [[EVL_BASED_IV]] |
| ; IF-EVL-NEXT: [[VP_OP_LOAD:%.*]] = call <vscale x 16 x i8> @llvm.vp.load.nxv16i8.p0(ptr align 1 [[TMP13]], <vscale x 16 x i1> splat (i1 true), i32 [[TMP11]]) |
| ; IF-EVL-NEXT: [[VP_OP:%.*]] = and <vscale x 16 x i8> [[VP_OP_LOAD]], splat (i8 1) |
| ; IF-EVL-NEXT: [[TMP16:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 [[EVL_BASED_IV]] |
| ; IF-EVL-NEXT: call void @llvm.vp.store.nxv16i8.p0(<vscale x 16 x i8> [[VP_OP]], ptr align 1 [[TMP16]], <vscale x 16 x i1> splat (i1 true), i32 [[TMP11]]) |
| ; IF-EVL-NEXT: [[TMP18:%.*]] = zext i32 [[TMP11]] to i64 |
| ; IF-EVL-NEXT: [[INDEX_EVL_NEXT]] = add nuw i64 [[TMP18]], [[EVL_BASED_IV]] |
| ; IF-EVL-NEXT: [[AVL_NEXT]] = sub nuw i64 [[TMP10]], [[TMP18]] |
| ; IF-EVL-NEXT: [[TMP14:%.*]] = icmp eq i64 [[AVL_NEXT]], 0 |
| ; IF-EVL-NEXT: br i1 [[TMP14]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]] |
| ; IF-EVL: [[MIDDLE_BLOCK]]: |
| ; IF-EVL-NEXT: br label %[[FINISH_LOOPEXIT:.*]] |
| ; IF-EVL: [[SCALAR_PH]]: |
| ; IF-EVL-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 0, %[[LOOP_PREHEADER]] ], [ 0, %[[VECTOR_MEMCHECK]] ] |
| ; IF-EVL-NEXT: br label %[[LOOP:.*]] |
| ; IF-EVL: [[LOOP]]: |
| ; IF-EVL-NEXT: [[LEN:%.*]] = phi i64 [ [[DEC:%.*]], %[[LOOP]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ] |
| ; IF-EVL-NEXT: [[DEC]] = add nsw i64 [[LEN]], 1 |
| ; IF-EVL-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 [[LEN]] |
| ; IF-EVL-NEXT: [[TMP20:%.*]] = load i8, ptr [[ARRAYIDX]], align 1 |
| ; IF-EVL-NEXT: [[TMP:%.*]] = and i8 [[TMP20]], 1 |
| ; IF-EVL-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 [[LEN]] |
| ; IF-EVL-NEXT: store i8 [[TMP]], ptr [[ARRAYIDX1]], align 1 |
| ; IF-EVL-NEXT: [[DOTNOT:%.*]] = icmp eq i64 [[DEC]], 100 |
| ; IF-EVL-NEXT: br i1 [[DOTNOT]], label %[[FINISH_LOOPEXIT]], label %[[LOOP]], !llvm.loop [[LOOP4:![0-9]+]] |
| ; IF-EVL: [[FINISH_LOOPEXIT]]: |
| ; IF-EVL-NEXT: ret void |
| ; |
| ; NO-VP-LABEL: define void @test_and( |
| ; NO-VP-SAME: ptr captures(none) [[A:%.*]], ptr readonly captures(none) [[B:%.*]]) #[[ATTR0:[0-9]+]] { |
| ; NO-VP-NEXT: [[LOOP_PREHEADER:.*]]: |
| ; NO-VP-NEXT: [[A2:%.*]] = ptrtoint ptr [[A]] to i64 |
| ; NO-VP-NEXT: [[B1:%.*]] = ptrtoint ptr [[B]] to i64 |
| ; NO-VP-NEXT: [[TMP7:%.*]] = call i64 @llvm.vscale.i64() |
| ; NO-VP-NEXT: [[TMP1:%.*]] = shl nuw i64 [[TMP7]], 4 |
| ; NO-VP-NEXT: [[TMP14:%.*]] = call i64 @llvm.umax.i64(i64 [[TMP1]], i64 32) |
| ; NO-VP-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 100, [[TMP14]] |
| ; NO-VP-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]] |
| ; NO-VP: [[VECTOR_MEMCHECK]]: |
| ; NO-VP-NEXT: [[TMP2:%.*]] = call i64 @llvm.vscale.i64() |
| ; NO-VP-NEXT: [[TMP3:%.*]] = mul nuw i64 [[TMP2]], 16 |
| ; NO-VP-NEXT: [[TMP4:%.*]] = sub i64 [[B1]], [[A2]] |
| ; NO-VP-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP4]], [[TMP3]] |
| ; NO-VP-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]] |
| ; NO-VP: [[VECTOR_PH]]: |
| ; NO-VP-NEXT: [[TMP5:%.*]] = call i64 @llvm.vscale.i64() |
| ; NO-VP-NEXT: [[TMP6:%.*]] = mul nuw i64 [[TMP5]], 16 |
| ; NO-VP-NEXT: [[N_MOD_VF:%.*]] = urem i64 100, [[TMP6]] |
| ; NO-VP-NEXT: [[N_VEC:%.*]] = sub i64 100, [[N_MOD_VF]] |
| ; NO-VP-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; NO-VP: [[VECTOR_BODY]]: |
| ; NO-VP-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; NO-VP-NEXT: [[TMP9:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 [[INDEX]] |
| ; NO-VP-NEXT: [[WIDE_LOAD:%.*]] = load <vscale x 16 x i8>, ptr [[TMP9]], align 1 |
| ; NO-VP-NEXT: [[TMP10:%.*]] = and <vscale x 16 x i8> [[WIDE_LOAD]], splat (i8 1) |
| ; NO-VP-NEXT: [[TMP11:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 [[INDEX]] |
| ; NO-VP-NEXT: store <vscale x 16 x i8> [[TMP10]], ptr [[TMP11]], align 1 |
| ; NO-VP-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP6]] |
| ; NO-VP-NEXT: [[TMP12:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] |
| ; NO-VP-NEXT: br i1 [[TMP12]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]] |
| ; NO-VP: [[MIDDLE_BLOCK]]: |
| ; NO-VP-NEXT: [[CMP_N:%.*]] = icmp eq i64 100, [[N_VEC]] |
| ; NO-VP-NEXT: br i1 [[CMP_N]], label %[[FINISH_LOOPEXIT:.*]], label %[[SCALAR_PH]] |
| ; NO-VP: [[SCALAR_PH]]: |
| ; NO-VP-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[LOOP_PREHEADER]] ], [ 0, %[[VECTOR_MEMCHECK]] ] |
| ; NO-VP-NEXT: br label %[[LOOP:.*]] |
| ; NO-VP: [[LOOP]]: |
| ; NO-VP-NEXT: [[LEN:%.*]] = phi i64 [ [[DEC:%.*]], %[[LOOP]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ] |
| ; NO-VP-NEXT: [[DEC]] = add nsw i64 [[LEN]], 1 |
| ; NO-VP-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 [[LEN]] |
| ; NO-VP-NEXT: [[TMP0:%.*]] = load i8, ptr [[ARRAYIDX]], align 1 |
| ; NO-VP-NEXT: [[TMP:%.*]] = and i8 [[TMP0]], 1 |
| ; NO-VP-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 [[LEN]] |
| ; NO-VP-NEXT: store i8 [[TMP]], ptr [[ARRAYIDX1]], align 1 |
| ; NO-VP-NEXT: [[DOTNOT:%.*]] = icmp eq i64 [[DEC]], 100 |
| ; NO-VP-NEXT: br i1 [[DOTNOT]], label %[[FINISH_LOOPEXIT]], label %[[LOOP]], !llvm.loop [[LOOP3:![0-9]+]] |
| ; NO-VP: [[FINISH_LOOPEXIT]]: |
| ; NO-VP-NEXT: ret void |
| ; |
| loop.preheader: |
| br label %loop |
| |
| loop: |
| %len = phi i64 [ %dec, %loop ], [ 0, %loop.preheader ] |
| %dec = add nsw i64 %len, 1 |
| %arrayidx = getelementptr inbounds i8, ptr %a, i64 %len |
| %0 = load i8, ptr %arrayidx, align 1 |
| %tmp = and i8 %0, 1 |
| %arrayidx1 = getelementptr inbounds i8, ptr %b, i64 %len |
| store i8 %tmp, ptr %arrayidx1, align 1 |
| %.not = icmp eq i64 %dec, 100 |
| br i1 %.not, label %finish.loopexit, label %loop |
| |
| finish.loopexit: |
| ret void |
| } |
| |
| define void @test_or(ptr nocapture %a, ptr nocapture readonly %b) { |
| ; IF-EVL-LABEL: define void @test_or( |
| ; IF-EVL-SAME: ptr captures(none) [[A:%.*]], ptr readonly captures(none) [[B:%.*]]) #[[ATTR0]] { |
| ; IF-EVL-NEXT: [[LOOP_PREHEADER:.*]]: |
| ; IF-EVL-NEXT: [[A2:%.*]] = ptrtoint ptr [[A]] to i64 |
| ; IF-EVL-NEXT: [[B1:%.*]] = ptrtoint ptr [[B]] to i64 |
| ; IF-EVL-NEXT: br i1 false, label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]] |
| ; IF-EVL: [[VECTOR_MEMCHECK]]: |
| ; IF-EVL-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() |
| ; IF-EVL-NEXT: [[TMP1:%.*]] = mul nuw i64 [[TMP0]], 16 |
| ; IF-EVL-NEXT: [[TMP2:%.*]] = sub i64 [[B1]], [[A2]] |
| ; IF-EVL-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP2]], [[TMP1]] |
| ; IF-EVL-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]] |
| ; IF-EVL: [[VECTOR_PH]]: |
| ; IF-EVL-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; IF-EVL: [[VECTOR_BODY]]: |
| ; IF-EVL-NEXT: [[EVL_BASED_IV:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_EVL_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; IF-EVL-NEXT: [[TMP10:%.*]] = phi i64 [ 100, %[[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; IF-EVL-NEXT: [[TMP11:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[TMP10]], i32 16, i1 true) |
| ; IF-EVL-NEXT: [[TMP13:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 [[EVL_BASED_IV]] |
| ; IF-EVL-NEXT: [[VP_OP_LOAD:%.*]] = call <vscale x 16 x i8> @llvm.vp.load.nxv16i8.p0(ptr align 1 [[TMP13]], <vscale x 16 x i1> splat (i1 true), i32 [[TMP11]]) |
| ; IF-EVL-NEXT: [[VP_OP:%.*]] = or <vscale x 16 x i8> [[VP_OP_LOAD]], splat (i8 1) |
| ; IF-EVL-NEXT: [[TMP16:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 [[EVL_BASED_IV]] |
| ; IF-EVL-NEXT: call void @llvm.vp.store.nxv16i8.p0(<vscale x 16 x i8> [[VP_OP]], ptr align 1 [[TMP16]], <vscale x 16 x i1> splat (i1 true), i32 [[TMP11]]) |
| ; IF-EVL-NEXT: [[TMP18:%.*]] = zext i32 [[TMP11]] to i64 |
| ; IF-EVL-NEXT: [[INDEX_EVL_NEXT]] = add nuw i64 [[TMP18]], [[EVL_BASED_IV]] |
| ; IF-EVL-NEXT: [[AVL_NEXT]] = sub nuw i64 [[TMP10]], [[TMP18]] |
| ; IF-EVL-NEXT: [[TMP14:%.*]] = icmp eq i64 [[AVL_NEXT]], 0 |
| ; IF-EVL-NEXT: br i1 [[TMP14]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]] |
| ; IF-EVL: [[MIDDLE_BLOCK]]: |
| ; IF-EVL-NEXT: br label %[[FINISH_LOOPEXIT:.*]] |
| ; IF-EVL: [[SCALAR_PH]]: |
| ; IF-EVL-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 0, %[[LOOP_PREHEADER]] ], [ 0, %[[VECTOR_MEMCHECK]] ] |
| ; IF-EVL-NEXT: br label %[[LOOP:.*]] |
| ; IF-EVL: [[LOOP]]: |
| ; IF-EVL-NEXT: [[LEN:%.*]] = phi i64 [ [[DEC:%.*]], %[[LOOP]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ] |
| ; IF-EVL-NEXT: [[DEC]] = add nsw i64 [[LEN]], 1 |
| ; IF-EVL-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 [[LEN]] |
| ; IF-EVL-NEXT: [[TMP20:%.*]] = load i8, ptr [[ARRAYIDX]], align 1 |
| ; IF-EVL-NEXT: [[TMP:%.*]] = or i8 [[TMP20]], 1 |
| ; IF-EVL-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 [[LEN]] |
| ; IF-EVL-NEXT: store i8 [[TMP]], ptr [[ARRAYIDX1]], align 1 |
| ; IF-EVL-NEXT: [[DOTNOT:%.*]] = icmp eq i64 [[DEC]], 100 |
| ; IF-EVL-NEXT: br i1 [[DOTNOT]], label %[[FINISH_LOOPEXIT]], label %[[LOOP]], !llvm.loop [[LOOP6:![0-9]+]] |
| ; IF-EVL: [[FINISH_LOOPEXIT]]: |
| ; IF-EVL-NEXT: ret void |
| ; |
| ; NO-VP-LABEL: define void @test_or( |
| ; NO-VP-SAME: ptr captures(none) [[A:%.*]], ptr readonly captures(none) [[B:%.*]]) #[[ATTR0]] { |
| ; NO-VP-NEXT: [[LOOP_PREHEADER:.*]]: |
| ; NO-VP-NEXT: [[A2:%.*]] = ptrtoint ptr [[A]] to i64 |
| ; NO-VP-NEXT: [[B1:%.*]] = ptrtoint ptr [[B]] to i64 |
| ; NO-VP-NEXT: [[TMP7:%.*]] = call i64 @llvm.vscale.i64() |
| ; NO-VP-NEXT: [[TMP1:%.*]] = shl nuw i64 [[TMP7]], 4 |
| ; NO-VP-NEXT: [[TMP14:%.*]] = call i64 @llvm.umax.i64(i64 [[TMP1]], i64 32) |
| ; NO-VP-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 100, [[TMP14]] |
| ; NO-VP-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]] |
| ; NO-VP: [[VECTOR_MEMCHECK]]: |
| ; NO-VP-NEXT: [[TMP2:%.*]] = call i64 @llvm.vscale.i64() |
| ; NO-VP-NEXT: [[TMP3:%.*]] = mul nuw i64 [[TMP2]], 16 |
| ; NO-VP-NEXT: [[TMP4:%.*]] = sub i64 [[B1]], [[A2]] |
| ; NO-VP-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP4]], [[TMP3]] |
| ; NO-VP-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]] |
| ; NO-VP: [[VECTOR_PH]]: |
| ; NO-VP-NEXT: [[TMP5:%.*]] = call i64 @llvm.vscale.i64() |
| ; NO-VP-NEXT: [[TMP6:%.*]] = mul nuw i64 [[TMP5]], 16 |
| ; NO-VP-NEXT: [[N_MOD_VF:%.*]] = urem i64 100, [[TMP6]] |
| ; NO-VP-NEXT: [[N_VEC:%.*]] = sub i64 100, [[N_MOD_VF]] |
| ; NO-VP-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; NO-VP: [[VECTOR_BODY]]: |
| ; NO-VP-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; NO-VP-NEXT: [[TMP9:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 [[INDEX]] |
| ; NO-VP-NEXT: [[WIDE_LOAD:%.*]] = load <vscale x 16 x i8>, ptr [[TMP9]], align 1 |
| ; NO-VP-NEXT: [[TMP10:%.*]] = or <vscale x 16 x i8> [[WIDE_LOAD]], splat (i8 1) |
| ; NO-VP-NEXT: [[TMP11:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 [[INDEX]] |
| ; NO-VP-NEXT: store <vscale x 16 x i8> [[TMP10]], ptr [[TMP11]], align 1 |
| ; NO-VP-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP6]] |
| ; NO-VP-NEXT: [[TMP12:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] |
| ; NO-VP-NEXT: br i1 [[TMP12]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]] |
| ; NO-VP: [[MIDDLE_BLOCK]]: |
| ; NO-VP-NEXT: [[CMP_N:%.*]] = icmp eq i64 100, [[N_VEC]] |
| ; NO-VP-NEXT: br i1 [[CMP_N]], label %[[FINISH_LOOPEXIT:.*]], label %[[SCALAR_PH]] |
| ; NO-VP: [[SCALAR_PH]]: |
| ; NO-VP-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[LOOP_PREHEADER]] ], [ 0, %[[VECTOR_MEMCHECK]] ] |
| ; NO-VP-NEXT: br label %[[LOOP:.*]] |
| ; NO-VP: [[LOOP]]: |
| ; NO-VP-NEXT: [[LEN:%.*]] = phi i64 [ [[DEC:%.*]], %[[LOOP]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ] |
| ; NO-VP-NEXT: [[DEC]] = add nsw i64 [[LEN]], 1 |
| ; NO-VP-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 [[LEN]] |
| ; NO-VP-NEXT: [[TMP0:%.*]] = load i8, ptr [[ARRAYIDX]], align 1 |
| ; NO-VP-NEXT: [[TMP:%.*]] = or i8 [[TMP0]], 1 |
| ; NO-VP-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 [[LEN]] |
| ; NO-VP-NEXT: store i8 [[TMP]], ptr [[ARRAYIDX1]], align 1 |
| ; NO-VP-NEXT: [[DOTNOT:%.*]] = icmp eq i64 [[DEC]], 100 |
| ; NO-VP-NEXT: br i1 [[DOTNOT]], label %[[FINISH_LOOPEXIT]], label %[[LOOP]], !llvm.loop [[LOOP5:![0-9]+]] |
| ; NO-VP: [[FINISH_LOOPEXIT]]: |
| ; NO-VP-NEXT: ret void |
| ; |
| loop.preheader: |
| br label %loop |
| |
| loop: |
| %len = phi i64 [ %dec, %loop ], [ 0, %loop.preheader ] |
| %dec = add nsw i64 %len, 1 |
| %arrayidx = getelementptr inbounds i8, ptr %a, i64 %len |
| %0 = load i8, ptr %arrayidx, align 1 |
| %tmp = or i8 %0, 1 |
| %arrayidx1 = getelementptr inbounds i8, ptr %b, i64 %len |
| store i8 %tmp, ptr %arrayidx1, align 1 |
| %.not = icmp eq i64 %dec, 100 |
| br i1 %.not, label %finish.loopexit, label %loop |
| |
| finish.loopexit: |
| ret void |
| } |
| |
| define void @test_xor(ptr nocapture %a, ptr nocapture readonly %b) { |
| ; IF-EVL-LABEL: define void @test_xor( |
| ; IF-EVL-SAME: ptr captures(none) [[A:%.*]], ptr readonly captures(none) [[B:%.*]]) #[[ATTR0]] { |
| ; IF-EVL-NEXT: [[LOOP_PREHEADER:.*]]: |
| ; IF-EVL-NEXT: [[A2:%.*]] = ptrtoint ptr [[A]] to i64 |
| ; IF-EVL-NEXT: [[B1:%.*]] = ptrtoint ptr [[B]] to i64 |
| ; IF-EVL-NEXT: br i1 false, label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]] |
| ; IF-EVL: [[VECTOR_MEMCHECK]]: |
| ; IF-EVL-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() |
| ; IF-EVL-NEXT: [[TMP1:%.*]] = mul nuw i64 [[TMP0]], 16 |
| ; IF-EVL-NEXT: [[TMP2:%.*]] = sub i64 [[B1]], [[A2]] |
| ; IF-EVL-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP2]], [[TMP1]] |
| ; IF-EVL-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]] |
| ; IF-EVL: [[VECTOR_PH]]: |
| ; IF-EVL-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; IF-EVL: [[VECTOR_BODY]]: |
| ; IF-EVL-NEXT: [[EVL_BASED_IV:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_EVL_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; IF-EVL-NEXT: [[TMP10:%.*]] = phi i64 [ 100, %[[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; IF-EVL-NEXT: [[TMP11:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[TMP10]], i32 16, i1 true) |
| ; IF-EVL-NEXT: [[TMP13:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 [[EVL_BASED_IV]] |
| ; IF-EVL-NEXT: [[VP_OP_LOAD:%.*]] = call <vscale x 16 x i8> @llvm.vp.load.nxv16i8.p0(ptr align 1 [[TMP13]], <vscale x 16 x i1> splat (i1 true), i32 [[TMP11]]) |
| ; IF-EVL-NEXT: [[VP_OP:%.*]] = xor <vscale x 16 x i8> [[VP_OP_LOAD]], splat (i8 1) |
| ; IF-EVL-NEXT: [[TMP16:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 [[EVL_BASED_IV]] |
| ; IF-EVL-NEXT: call void @llvm.vp.store.nxv16i8.p0(<vscale x 16 x i8> [[VP_OP]], ptr align 1 [[TMP16]], <vscale x 16 x i1> splat (i1 true), i32 [[TMP11]]) |
| ; IF-EVL-NEXT: [[TMP18:%.*]] = zext i32 [[TMP11]] to i64 |
| ; IF-EVL-NEXT: [[INDEX_EVL_NEXT]] = add nuw i64 [[TMP18]], [[EVL_BASED_IV]] |
| ; IF-EVL-NEXT: [[AVL_NEXT]] = sub nuw i64 [[TMP10]], [[TMP18]] |
| ; IF-EVL-NEXT: [[TMP14:%.*]] = icmp eq i64 [[AVL_NEXT]], 0 |
| ; IF-EVL-NEXT: br i1 [[TMP14]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP7:![0-9]+]] |
| ; IF-EVL: [[MIDDLE_BLOCK]]: |
| ; IF-EVL-NEXT: br label %[[FINISH_LOOPEXIT:.*]] |
| ; IF-EVL: [[SCALAR_PH]]: |
| ; IF-EVL-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 0, %[[LOOP_PREHEADER]] ], [ 0, %[[VECTOR_MEMCHECK]] ] |
| ; IF-EVL-NEXT: br label %[[LOOP:.*]] |
| ; IF-EVL: [[LOOP]]: |
| ; IF-EVL-NEXT: [[LEN:%.*]] = phi i64 [ [[DEC:%.*]], %[[LOOP]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ] |
| ; IF-EVL-NEXT: [[DEC]] = add nsw i64 [[LEN]], 1 |
| ; IF-EVL-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 [[LEN]] |
| ; IF-EVL-NEXT: [[TMP20:%.*]] = load i8, ptr [[ARRAYIDX]], align 1 |
| ; IF-EVL-NEXT: [[TMP:%.*]] = xor i8 [[TMP20]], 1 |
| ; IF-EVL-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 [[LEN]] |
| ; IF-EVL-NEXT: store i8 [[TMP]], ptr [[ARRAYIDX1]], align 1 |
| ; IF-EVL-NEXT: [[DOTNOT:%.*]] = icmp eq i64 [[DEC]], 100 |
| ; IF-EVL-NEXT: br i1 [[DOTNOT]], label %[[FINISH_LOOPEXIT]], label %[[LOOP]], !llvm.loop [[LOOP8:![0-9]+]] |
| ; IF-EVL: [[FINISH_LOOPEXIT]]: |
| ; IF-EVL-NEXT: ret void |
| ; |
| ; NO-VP-LABEL: define void @test_xor( |
| ; NO-VP-SAME: ptr captures(none) [[A:%.*]], ptr readonly captures(none) [[B:%.*]]) #[[ATTR0]] { |
| ; NO-VP-NEXT: [[LOOP_PREHEADER:.*]]: |
| ; NO-VP-NEXT: [[A2:%.*]] = ptrtoint ptr [[A]] to i64 |
| ; NO-VP-NEXT: [[B1:%.*]] = ptrtoint ptr [[B]] to i64 |
| ; NO-VP-NEXT: [[TMP7:%.*]] = call i64 @llvm.vscale.i64() |
| ; NO-VP-NEXT: [[TMP1:%.*]] = shl nuw i64 [[TMP7]], 4 |
| ; NO-VP-NEXT: [[TMP14:%.*]] = call i64 @llvm.umax.i64(i64 [[TMP1]], i64 32) |
| ; NO-VP-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 100, [[TMP14]] |
| ; NO-VP-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]] |
| ; NO-VP: [[VECTOR_MEMCHECK]]: |
| ; NO-VP-NEXT: [[TMP2:%.*]] = call i64 @llvm.vscale.i64() |
| ; NO-VP-NEXT: [[TMP3:%.*]] = mul nuw i64 [[TMP2]], 16 |
| ; NO-VP-NEXT: [[TMP4:%.*]] = sub i64 [[B1]], [[A2]] |
| ; NO-VP-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP4]], [[TMP3]] |
| ; NO-VP-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]] |
| ; NO-VP: [[VECTOR_PH]]: |
| ; NO-VP-NEXT: [[TMP5:%.*]] = call i64 @llvm.vscale.i64() |
| ; NO-VP-NEXT: [[TMP6:%.*]] = mul nuw i64 [[TMP5]], 16 |
| ; NO-VP-NEXT: [[N_MOD_VF:%.*]] = urem i64 100, [[TMP6]] |
| ; NO-VP-NEXT: [[N_VEC:%.*]] = sub i64 100, [[N_MOD_VF]] |
| ; NO-VP-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; NO-VP: [[VECTOR_BODY]]: |
| ; NO-VP-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; NO-VP-NEXT: [[TMP9:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 [[INDEX]] |
| ; NO-VP-NEXT: [[WIDE_LOAD:%.*]] = load <vscale x 16 x i8>, ptr [[TMP9]], align 1 |
| ; NO-VP-NEXT: [[TMP10:%.*]] = xor <vscale x 16 x i8> [[WIDE_LOAD]], splat (i8 1) |
| ; NO-VP-NEXT: [[TMP11:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 [[INDEX]] |
| ; NO-VP-NEXT: store <vscale x 16 x i8> [[TMP10]], ptr [[TMP11]], align 1 |
| ; NO-VP-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP6]] |
| ; NO-VP-NEXT: [[TMP12:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] |
| ; NO-VP-NEXT: br i1 [[TMP12]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]] |
| ; NO-VP: [[MIDDLE_BLOCK]]: |
| ; NO-VP-NEXT: [[CMP_N:%.*]] = icmp eq i64 100, [[N_VEC]] |
| ; NO-VP-NEXT: br i1 [[CMP_N]], label %[[FINISH_LOOPEXIT:.*]], label %[[SCALAR_PH]] |
| ; NO-VP: [[SCALAR_PH]]: |
| ; NO-VP-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[LOOP_PREHEADER]] ], [ 0, %[[VECTOR_MEMCHECK]] ] |
| ; NO-VP-NEXT: br label %[[LOOP:.*]] |
| ; NO-VP: [[LOOP]]: |
| ; NO-VP-NEXT: [[LEN:%.*]] = phi i64 [ [[DEC:%.*]], %[[LOOP]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ] |
| ; NO-VP-NEXT: [[DEC]] = add nsw i64 [[LEN]], 1 |
| ; NO-VP-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 [[LEN]] |
| ; NO-VP-NEXT: [[TMP0:%.*]] = load i8, ptr [[ARRAYIDX]], align 1 |
| ; NO-VP-NEXT: [[TMP:%.*]] = xor i8 [[TMP0]], 1 |
| ; NO-VP-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 [[LEN]] |
| ; NO-VP-NEXT: store i8 [[TMP]], ptr [[ARRAYIDX1]], align 1 |
| ; NO-VP-NEXT: [[DOTNOT:%.*]] = icmp eq i64 [[DEC]], 100 |
| ; NO-VP-NEXT: br i1 [[DOTNOT]], label %[[FINISH_LOOPEXIT]], label %[[LOOP]], !llvm.loop [[LOOP7:![0-9]+]] |
| ; NO-VP: [[FINISH_LOOPEXIT]]: |
| ; NO-VP-NEXT: ret void |
| ; |
| loop.preheader: |
| br label %loop |
| |
| loop: |
| %len = phi i64 [ %dec, %loop ], [ 0, %loop.preheader ] |
| %dec = add nsw i64 %len, 1 |
| %arrayidx = getelementptr inbounds i8, ptr %a, i64 %len |
| %0 = load i8, ptr %arrayidx, align 1 |
| %tmp = xor i8 %0, 1 |
| %arrayidx1 = getelementptr inbounds i8, ptr %b, i64 %len |
| store i8 %tmp, ptr %arrayidx1, align 1 |
| %.not = icmp eq i64 %dec, 100 |
| br i1 %.not, label %finish.loopexit, label %loop |
| |
| finish.loopexit: |
| ret void |
| } |
| |
| define void @test_shl(ptr nocapture %a, ptr nocapture readonly %b) { |
| ; IF-EVL-LABEL: define void @test_shl( |
| ; IF-EVL-SAME: ptr captures(none) [[A:%.*]], ptr readonly captures(none) [[B:%.*]]) #[[ATTR0]] { |
| ; IF-EVL-NEXT: [[LOOP_PREHEADER:.*]]: |
| ; IF-EVL-NEXT: [[A2:%.*]] = ptrtoint ptr [[A]] to i64 |
| ; IF-EVL-NEXT: [[B1:%.*]] = ptrtoint ptr [[B]] to i64 |
| ; IF-EVL-NEXT: br i1 false, label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]] |
| ; IF-EVL: [[VECTOR_MEMCHECK]]: |
| ; IF-EVL-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() |
| ; IF-EVL-NEXT: [[TMP1:%.*]] = mul nuw i64 [[TMP0]], 16 |
| ; IF-EVL-NEXT: [[TMP2:%.*]] = sub i64 [[B1]], [[A2]] |
| ; IF-EVL-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP2]], [[TMP1]] |
| ; IF-EVL-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]] |
| ; IF-EVL: [[VECTOR_PH]]: |
| ; IF-EVL-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; IF-EVL: [[VECTOR_BODY]]: |
| ; IF-EVL-NEXT: [[EVL_BASED_IV:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_EVL_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; IF-EVL-NEXT: [[TMP10:%.*]] = phi i64 [ 100, %[[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; IF-EVL-NEXT: [[TMP11:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[TMP10]], i32 16, i1 true) |
| ; IF-EVL-NEXT: [[TMP13:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 [[EVL_BASED_IV]] |
| ; IF-EVL-NEXT: [[VP_OP_LOAD:%.*]] = call <vscale x 16 x i8> @llvm.vp.load.nxv16i8.p0(ptr align 1 [[TMP13]], <vscale x 16 x i1> splat (i1 true), i32 [[TMP11]]) |
| ; IF-EVL-NEXT: [[VP_OP:%.*]] = shl <vscale x 16 x i8> [[VP_OP_LOAD]], splat (i8 1) |
| ; IF-EVL-NEXT: [[TMP16:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 [[EVL_BASED_IV]] |
| ; IF-EVL-NEXT: call void @llvm.vp.store.nxv16i8.p0(<vscale x 16 x i8> [[VP_OP]], ptr align 1 [[TMP16]], <vscale x 16 x i1> splat (i1 true), i32 [[TMP11]]) |
| ; IF-EVL-NEXT: [[TMP18:%.*]] = zext i32 [[TMP11]] to i64 |
| ; IF-EVL-NEXT: [[INDEX_EVL_NEXT]] = add nuw i64 [[TMP18]], [[EVL_BASED_IV]] |
| ; IF-EVL-NEXT: [[AVL_NEXT]] = sub nuw i64 [[TMP10]], [[TMP18]] |
| ; IF-EVL-NEXT: [[TMP14:%.*]] = icmp eq i64 [[AVL_NEXT]], 0 |
| ; IF-EVL-NEXT: br i1 [[TMP14]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP9:![0-9]+]] |
| ; IF-EVL: [[MIDDLE_BLOCK]]: |
| ; IF-EVL-NEXT: br label %[[FINISH_LOOPEXIT:.*]] |
| ; IF-EVL: [[SCALAR_PH]]: |
| ; IF-EVL-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 0, %[[LOOP_PREHEADER]] ], [ 0, %[[VECTOR_MEMCHECK]] ] |
| ; IF-EVL-NEXT: br label %[[LOOP:.*]] |
| ; IF-EVL: [[LOOP]]: |
| ; IF-EVL-NEXT: [[LEN:%.*]] = phi i64 [ [[DEC:%.*]], %[[LOOP]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ] |
| ; IF-EVL-NEXT: [[DEC]] = add nsw i64 [[LEN]], 1 |
| ; IF-EVL-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 [[LEN]] |
| ; IF-EVL-NEXT: [[TMP20:%.*]] = load i8, ptr [[ARRAYIDX]], align 1 |
| ; IF-EVL-NEXT: [[TMP:%.*]] = shl i8 [[TMP20]], 1 |
| ; IF-EVL-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 [[LEN]] |
| ; IF-EVL-NEXT: store i8 [[TMP]], ptr [[ARRAYIDX1]], align 1 |
| ; IF-EVL-NEXT: [[DOTNOT:%.*]] = icmp eq i64 [[DEC]], 100 |
| ; IF-EVL-NEXT: br i1 [[DOTNOT]], label %[[FINISH_LOOPEXIT]], label %[[LOOP]], !llvm.loop [[LOOP10:![0-9]+]] |
| ; IF-EVL: [[FINISH_LOOPEXIT]]: |
| ; IF-EVL-NEXT: ret void |
| ; |
| ; NO-VP-LABEL: define void @test_shl( |
| ; NO-VP-SAME: ptr captures(none) [[A:%.*]], ptr readonly captures(none) [[B:%.*]]) #[[ATTR0]] { |
| ; NO-VP-NEXT: [[LOOP_PREHEADER:.*]]: |
| ; NO-VP-NEXT: [[A2:%.*]] = ptrtoint ptr [[A]] to i64 |
| ; NO-VP-NEXT: [[B1:%.*]] = ptrtoint ptr [[B]] to i64 |
| ; NO-VP-NEXT: [[TMP7:%.*]] = call i64 @llvm.vscale.i64() |
| ; NO-VP-NEXT: [[TMP1:%.*]] = shl nuw i64 [[TMP7]], 4 |
| ; NO-VP-NEXT: [[TMP14:%.*]] = call i64 @llvm.umax.i64(i64 [[TMP1]], i64 32) |
| ; NO-VP-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 100, [[TMP14]] |
| ; NO-VP-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]] |
| ; NO-VP: [[VECTOR_MEMCHECK]]: |
| ; NO-VP-NEXT: [[TMP2:%.*]] = call i64 @llvm.vscale.i64() |
| ; NO-VP-NEXT: [[TMP3:%.*]] = mul nuw i64 [[TMP2]], 16 |
| ; NO-VP-NEXT: [[TMP4:%.*]] = sub i64 [[B1]], [[A2]] |
| ; NO-VP-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP4]], [[TMP3]] |
| ; NO-VP-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]] |
| ; NO-VP: [[VECTOR_PH]]: |
| ; NO-VP-NEXT: [[TMP5:%.*]] = call i64 @llvm.vscale.i64() |
| ; NO-VP-NEXT: [[TMP6:%.*]] = mul nuw i64 [[TMP5]], 16 |
| ; NO-VP-NEXT: [[N_MOD_VF:%.*]] = urem i64 100, [[TMP6]] |
| ; NO-VP-NEXT: [[N_VEC:%.*]] = sub i64 100, [[N_MOD_VF]] |
| ; NO-VP-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; NO-VP: [[VECTOR_BODY]]: |
| ; NO-VP-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; NO-VP-NEXT: [[TMP9:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 [[INDEX]] |
| ; NO-VP-NEXT: [[WIDE_LOAD:%.*]] = load <vscale x 16 x i8>, ptr [[TMP9]], align 1 |
| ; NO-VP-NEXT: [[TMP10:%.*]] = shl <vscale x 16 x i8> [[WIDE_LOAD]], splat (i8 1) |
| ; NO-VP-NEXT: [[TMP11:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 [[INDEX]] |
| ; NO-VP-NEXT: store <vscale x 16 x i8> [[TMP10]], ptr [[TMP11]], align 1 |
| ; NO-VP-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP6]] |
| ; NO-VP-NEXT: [[TMP12:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] |
| ; NO-VP-NEXT: br i1 [[TMP12]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]] |
| ; NO-VP: [[MIDDLE_BLOCK]]: |
| ; NO-VP-NEXT: [[CMP_N:%.*]] = icmp eq i64 100, [[N_VEC]] |
| ; NO-VP-NEXT: br i1 [[CMP_N]], label %[[FINISH_LOOPEXIT:.*]], label %[[SCALAR_PH]] |
| ; NO-VP: [[SCALAR_PH]]: |
| ; NO-VP-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[LOOP_PREHEADER]] ], [ 0, %[[VECTOR_MEMCHECK]] ] |
| ; NO-VP-NEXT: br label %[[LOOP:.*]] |
| ; NO-VP: [[LOOP]]: |
| ; NO-VP-NEXT: [[LEN:%.*]] = phi i64 [ [[DEC:%.*]], %[[LOOP]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ] |
| ; NO-VP-NEXT: [[DEC]] = add nsw i64 [[LEN]], 1 |
| ; NO-VP-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 [[LEN]] |
| ; NO-VP-NEXT: [[TMP0:%.*]] = load i8, ptr [[ARRAYIDX]], align 1 |
| ; NO-VP-NEXT: [[TMP:%.*]] = shl i8 [[TMP0]], 1 |
| ; NO-VP-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 [[LEN]] |
| ; NO-VP-NEXT: store i8 [[TMP]], ptr [[ARRAYIDX1]], align 1 |
| ; NO-VP-NEXT: [[DOTNOT:%.*]] = icmp eq i64 [[DEC]], 100 |
| ; NO-VP-NEXT: br i1 [[DOTNOT]], label %[[FINISH_LOOPEXIT]], label %[[LOOP]], !llvm.loop [[LOOP9:![0-9]+]] |
| ; NO-VP: [[FINISH_LOOPEXIT]]: |
| ; NO-VP-NEXT: ret void |
| ; |
| loop.preheader: |
| br label %loop |
| |
| loop: |
| %len = phi i64 [ %dec, %loop ], [ 0, %loop.preheader ] |
| %dec = add nsw i64 %len, 1 |
| %arrayidx = getelementptr inbounds i8, ptr %a, i64 %len |
| %0 = load i8, ptr %arrayidx, align 1 |
| %tmp = shl i8 %0, 1 |
| %arrayidx1 = getelementptr inbounds i8, ptr %b, i64 %len |
| store i8 %tmp, ptr %arrayidx1, align 1 |
| %.not = icmp eq i64 %dec, 100 |
| br i1 %.not, label %finish.loopexit, label %loop |
| |
| finish.loopexit: |
| ret void |
| } |
| |
| define void @test_lshr(ptr nocapture %a, ptr nocapture readonly %b) { |
| ; IF-EVL-LABEL: define void @test_lshr( |
| ; IF-EVL-SAME: ptr captures(none) [[A:%.*]], ptr readonly captures(none) [[B:%.*]]) #[[ATTR0]] { |
| ; IF-EVL-NEXT: [[LOOP_PREHEADER:.*]]: |
| ; IF-EVL-NEXT: [[A2:%.*]] = ptrtoint ptr [[A]] to i64 |
| ; IF-EVL-NEXT: [[B1:%.*]] = ptrtoint ptr [[B]] to i64 |
| ; IF-EVL-NEXT: br i1 false, label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]] |
| ; IF-EVL: [[VECTOR_MEMCHECK]]: |
| ; IF-EVL-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() |
| ; IF-EVL-NEXT: [[TMP1:%.*]] = mul nuw i64 [[TMP0]], 16 |
| ; IF-EVL-NEXT: [[TMP2:%.*]] = sub i64 [[B1]], [[A2]] |
| ; IF-EVL-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP2]], [[TMP1]] |
| ; IF-EVL-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]] |
| ; IF-EVL: [[VECTOR_PH]]: |
| ; IF-EVL-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; IF-EVL: [[VECTOR_BODY]]: |
| ; IF-EVL-NEXT: [[EVL_BASED_IV:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_EVL_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; IF-EVL-NEXT: [[TMP10:%.*]] = phi i64 [ 100, %[[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; IF-EVL-NEXT: [[TMP11:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[TMP10]], i32 16, i1 true) |
| ; IF-EVL-NEXT: [[TMP13:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 [[EVL_BASED_IV]] |
| ; IF-EVL-NEXT: [[VP_OP_LOAD:%.*]] = call <vscale x 16 x i8> @llvm.vp.load.nxv16i8.p0(ptr align 1 [[TMP13]], <vscale x 16 x i1> splat (i1 true), i32 [[TMP11]]) |
| ; IF-EVL-NEXT: [[VP_OP:%.*]] = lshr <vscale x 16 x i8> [[VP_OP_LOAD]], splat (i8 1) |
| ; IF-EVL-NEXT: [[TMP16:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 [[EVL_BASED_IV]] |
| ; IF-EVL-NEXT: call void @llvm.vp.store.nxv16i8.p0(<vscale x 16 x i8> [[VP_OP]], ptr align 1 [[TMP16]], <vscale x 16 x i1> splat (i1 true), i32 [[TMP11]]) |
| ; IF-EVL-NEXT: [[TMP18:%.*]] = zext i32 [[TMP11]] to i64 |
| ; IF-EVL-NEXT: [[INDEX_EVL_NEXT]] = add nuw i64 [[TMP18]], [[EVL_BASED_IV]] |
| ; IF-EVL-NEXT: [[AVL_NEXT]] = sub nuw i64 [[TMP10]], [[TMP18]] |
| ; IF-EVL-NEXT: [[TMP14:%.*]] = icmp eq i64 [[AVL_NEXT]], 0 |
| ; IF-EVL-NEXT: br i1 [[TMP14]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP11:![0-9]+]] |
| ; IF-EVL: [[MIDDLE_BLOCK]]: |
| ; IF-EVL-NEXT: br label %[[FINISH_LOOPEXIT:.*]] |
| ; IF-EVL: [[SCALAR_PH]]: |
| ; IF-EVL-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 0, %[[LOOP_PREHEADER]] ], [ 0, %[[VECTOR_MEMCHECK]] ] |
| ; IF-EVL-NEXT: br label %[[LOOP:.*]] |
| ; IF-EVL: [[LOOP]]: |
| ; IF-EVL-NEXT: [[LEN:%.*]] = phi i64 [ [[DEC:%.*]], %[[LOOP]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ] |
| ; IF-EVL-NEXT: [[DEC]] = add nsw i64 [[LEN]], 1 |
| ; IF-EVL-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 [[LEN]] |
| ; IF-EVL-NEXT: [[TMP20:%.*]] = load i8, ptr [[ARRAYIDX]], align 1 |
| ; IF-EVL-NEXT: [[TMP:%.*]] = lshr i8 [[TMP20]], 1 |
| ; IF-EVL-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 [[LEN]] |
| ; IF-EVL-NEXT: store i8 [[TMP]], ptr [[ARRAYIDX1]], align 1 |
| ; IF-EVL-NEXT: [[DOTNOT:%.*]] = icmp eq i64 [[DEC]], 100 |
| ; IF-EVL-NEXT: br i1 [[DOTNOT]], label %[[FINISH_LOOPEXIT]], label %[[LOOP]], !llvm.loop [[LOOP12:![0-9]+]] |
| ; IF-EVL: [[FINISH_LOOPEXIT]]: |
| ; IF-EVL-NEXT: ret void |
| ; |
| ; NO-VP-LABEL: define void @test_lshr( |
| ; NO-VP-SAME: ptr captures(none) [[A:%.*]], ptr readonly captures(none) [[B:%.*]]) #[[ATTR0]] { |
| ; NO-VP-NEXT: [[LOOP_PREHEADER:.*]]: |
| ; NO-VP-NEXT: [[A2:%.*]] = ptrtoint ptr [[A]] to i64 |
| ; NO-VP-NEXT: [[B1:%.*]] = ptrtoint ptr [[B]] to i64 |
| ; NO-VP-NEXT: [[TMP7:%.*]] = call i64 @llvm.vscale.i64() |
| ; NO-VP-NEXT: [[TMP1:%.*]] = shl nuw i64 [[TMP7]], 4 |
| ; NO-VP-NEXT: [[TMP14:%.*]] = call i64 @llvm.umax.i64(i64 [[TMP1]], i64 32) |
| ; NO-VP-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 100, [[TMP14]] |
| ; NO-VP-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]] |
| ; NO-VP: [[VECTOR_MEMCHECK]]: |
| ; NO-VP-NEXT: [[TMP2:%.*]] = call i64 @llvm.vscale.i64() |
| ; NO-VP-NEXT: [[TMP3:%.*]] = mul nuw i64 [[TMP2]], 16 |
| ; NO-VP-NEXT: [[TMP4:%.*]] = sub i64 [[B1]], [[A2]] |
| ; NO-VP-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP4]], [[TMP3]] |
| ; NO-VP-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]] |
| ; NO-VP: [[VECTOR_PH]]: |
| ; NO-VP-NEXT: [[TMP5:%.*]] = call i64 @llvm.vscale.i64() |
| ; NO-VP-NEXT: [[TMP6:%.*]] = mul nuw i64 [[TMP5]], 16 |
| ; NO-VP-NEXT: [[N_MOD_VF:%.*]] = urem i64 100, [[TMP6]] |
| ; NO-VP-NEXT: [[N_VEC:%.*]] = sub i64 100, [[N_MOD_VF]] |
| ; NO-VP-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; NO-VP: [[VECTOR_BODY]]: |
| ; NO-VP-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; NO-VP-NEXT: [[TMP9:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 [[INDEX]] |
| ; NO-VP-NEXT: [[WIDE_LOAD:%.*]] = load <vscale x 16 x i8>, ptr [[TMP9]], align 1 |
| ; NO-VP-NEXT: [[TMP10:%.*]] = lshr <vscale x 16 x i8> [[WIDE_LOAD]], splat (i8 1) |
| ; NO-VP-NEXT: [[TMP11:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 [[INDEX]] |
| ; NO-VP-NEXT: store <vscale x 16 x i8> [[TMP10]], ptr [[TMP11]], align 1 |
| ; NO-VP-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP6]] |
| ; NO-VP-NEXT: [[TMP12:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] |
| ; NO-VP-NEXT: br i1 [[TMP12]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP10:![0-9]+]] |
| ; NO-VP: [[MIDDLE_BLOCK]]: |
| ; NO-VP-NEXT: [[CMP_N:%.*]] = icmp eq i64 100, [[N_VEC]] |
| ; NO-VP-NEXT: br i1 [[CMP_N]], label %[[FINISH_LOOPEXIT:.*]], label %[[SCALAR_PH]] |
| ; NO-VP: [[SCALAR_PH]]: |
| ; NO-VP-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[LOOP_PREHEADER]] ], [ 0, %[[VECTOR_MEMCHECK]] ] |
| ; NO-VP-NEXT: br label %[[LOOP:.*]] |
| ; NO-VP: [[LOOP]]: |
| ; NO-VP-NEXT: [[LEN:%.*]] = phi i64 [ [[DEC:%.*]], %[[LOOP]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ] |
| ; NO-VP-NEXT: [[DEC]] = add nsw i64 [[LEN]], 1 |
| ; NO-VP-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 [[LEN]] |
| ; NO-VP-NEXT: [[TMP0:%.*]] = load i8, ptr [[ARRAYIDX]], align 1 |
| ; NO-VP-NEXT: [[TMP:%.*]] = lshr i8 [[TMP0]], 1 |
| ; NO-VP-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 [[LEN]] |
| ; NO-VP-NEXT: store i8 [[TMP]], ptr [[ARRAYIDX1]], align 1 |
| ; NO-VP-NEXT: [[DOTNOT:%.*]] = icmp eq i64 [[DEC]], 100 |
| ; NO-VP-NEXT: br i1 [[DOTNOT]], label %[[FINISH_LOOPEXIT]], label %[[LOOP]], !llvm.loop [[LOOP11:![0-9]+]] |
| ; NO-VP: [[FINISH_LOOPEXIT]]: |
| ; NO-VP-NEXT: ret void |
| ; |
| loop.preheader: |
| br label %loop |
| |
| loop: |
| %len = phi i64 [ %dec, %loop ], [ 0, %loop.preheader ] |
| %dec = add nsw i64 %len, 1 |
| %arrayidx = getelementptr inbounds i8, ptr %a, i64 %len |
| %0 = load i8, ptr %arrayidx, align 1 |
| %tmp = lshr i8 %0, 1 |
| %arrayidx1 = getelementptr inbounds i8, ptr %b, i64 %len |
| store i8 %tmp, ptr %arrayidx1, align 1 |
| %.not = icmp eq i64 %dec, 100 |
| br i1 %.not, label %finish.loopexit, label %loop |
| |
| finish.loopexit: |
| ret void |
| } |
| |
| define void @test_ashr(ptr nocapture %a, ptr nocapture readonly %b) { |
| ; IF-EVL-LABEL: define void @test_ashr( |
| ; IF-EVL-SAME: ptr captures(none) [[A:%.*]], ptr readonly captures(none) [[B:%.*]]) #[[ATTR0]] { |
| ; IF-EVL-NEXT: [[LOOP_PREHEADER:.*]]: |
| ; IF-EVL-NEXT: [[A2:%.*]] = ptrtoint ptr [[A]] to i64 |
| ; IF-EVL-NEXT: [[B1:%.*]] = ptrtoint ptr [[B]] to i64 |
| ; IF-EVL-NEXT: br i1 false, label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]] |
| ; IF-EVL: [[VECTOR_MEMCHECK]]: |
| ; IF-EVL-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() |
| ; IF-EVL-NEXT: [[TMP1:%.*]] = mul nuw i64 [[TMP0]], 16 |
| ; IF-EVL-NEXT: [[TMP2:%.*]] = sub i64 [[B1]], [[A2]] |
| ; IF-EVL-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP2]], [[TMP1]] |
| ; IF-EVL-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]] |
| ; IF-EVL: [[VECTOR_PH]]: |
| ; IF-EVL-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; IF-EVL: [[VECTOR_BODY]]: |
| ; IF-EVL-NEXT: [[EVL_BASED_IV:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_EVL_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; IF-EVL-NEXT: [[TMP10:%.*]] = phi i64 [ 100, %[[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; IF-EVL-NEXT: [[TMP11:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[TMP10]], i32 16, i1 true) |
| ; IF-EVL-NEXT: [[TMP13:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 [[EVL_BASED_IV]] |
| ; IF-EVL-NEXT: [[VP_OP_LOAD:%.*]] = call <vscale x 16 x i8> @llvm.vp.load.nxv16i8.p0(ptr align 1 [[TMP13]], <vscale x 16 x i1> splat (i1 true), i32 [[TMP11]]) |
| ; IF-EVL-NEXT: [[VP_OP:%.*]] = ashr <vscale x 16 x i8> [[VP_OP_LOAD]], splat (i8 1) |
| ; IF-EVL-NEXT: [[TMP16:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 [[EVL_BASED_IV]] |
| ; IF-EVL-NEXT: call void @llvm.vp.store.nxv16i8.p0(<vscale x 16 x i8> [[VP_OP]], ptr align 1 [[TMP16]], <vscale x 16 x i1> splat (i1 true), i32 [[TMP11]]) |
| ; IF-EVL-NEXT: [[TMP18:%.*]] = zext i32 [[TMP11]] to i64 |
| ; IF-EVL-NEXT: [[INDEX_EVL_NEXT]] = add nuw i64 [[TMP18]], [[EVL_BASED_IV]] |
| ; IF-EVL-NEXT: [[AVL_NEXT]] = sub nuw i64 [[TMP10]], [[TMP18]] |
| ; IF-EVL-NEXT: [[TMP14:%.*]] = icmp eq i64 [[AVL_NEXT]], 0 |
| ; IF-EVL-NEXT: br i1 [[TMP14]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP13:![0-9]+]] |
| ; IF-EVL: [[MIDDLE_BLOCK]]: |
| ; IF-EVL-NEXT: br label %[[FINISH_LOOPEXIT:.*]] |
| ; IF-EVL: [[SCALAR_PH]]: |
| ; IF-EVL-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 0, %[[LOOP_PREHEADER]] ], [ 0, %[[VECTOR_MEMCHECK]] ] |
| ; IF-EVL-NEXT: br label %[[LOOP:.*]] |
| ; IF-EVL: [[LOOP]]: |
| ; IF-EVL-NEXT: [[LEN:%.*]] = phi i64 [ [[DEC:%.*]], %[[LOOP]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ] |
| ; IF-EVL-NEXT: [[DEC]] = add nsw i64 [[LEN]], 1 |
| ; IF-EVL-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 [[LEN]] |
| ; IF-EVL-NEXT: [[TMP20:%.*]] = load i8, ptr [[ARRAYIDX]], align 1 |
| ; IF-EVL-NEXT: [[TMP:%.*]] = ashr i8 [[TMP20]], 1 |
| ; IF-EVL-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 [[LEN]] |
| ; IF-EVL-NEXT: store i8 [[TMP]], ptr [[ARRAYIDX1]], align 1 |
| ; IF-EVL-NEXT: [[DOTNOT:%.*]] = icmp eq i64 [[DEC]], 100 |
| ; IF-EVL-NEXT: br i1 [[DOTNOT]], label %[[FINISH_LOOPEXIT]], label %[[LOOP]], !llvm.loop [[LOOP14:![0-9]+]] |
| ; IF-EVL: [[FINISH_LOOPEXIT]]: |
| ; IF-EVL-NEXT: ret void |
| ; |
| ; NO-VP-LABEL: define void @test_ashr( |
| ; NO-VP-SAME: ptr captures(none) [[A:%.*]], ptr readonly captures(none) [[B:%.*]]) #[[ATTR0]] { |
| ; NO-VP-NEXT: [[LOOP_PREHEADER:.*]]: |
| ; NO-VP-NEXT: [[A2:%.*]] = ptrtoint ptr [[A]] to i64 |
| ; NO-VP-NEXT: [[B1:%.*]] = ptrtoint ptr [[B]] to i64 |
| ; NO-VP-NEXT: [[TMP7:%.*]] = call i64 @llvm.vscale.i64() |
| ; NO-VP-NEXT: [[TMP1:%.*]] = shl nuw i64 [[TMP7]], 4 |
| ; NO-VP-NEXT: [[TMP14:%.*]] = call i64 @llvm.umax.i64(i64 [[TMP1]], i64 32) |
| ; NO-VP-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 100, [[TMP14]] |
| ; NO-VP-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]] |
| ; NO-VP: [[VECTOR_MEMCHECK]]: |
| ; NO-VP-NEXT: [[TMP2:%.*]] = call i64 @llvm.vscale.i64() |
| ; NO-VP-NEXT: [[TMP3:%.*]] = mul nuw i64 [[TMP2]], 16 |
| ; NO-VP-NEXT: [[TMP4:%.*]] = sub i64 [[B1]], [[A2]] |
| ; NO-VP-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP4]], [[TMP3]] |
| ; NO-VP-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]] |
| ; NO-VP: [[VECTOR_PH]]: |
| ; NO-VP-NEXT: [[TMP5:%.*]] = call i64 @llvm.vscale.i64() |
| ; NO-VP-NEXT: [[TMP6:%.*]] = mul nuw i64 [[TMP5]], 16 |
| ; NO-VP-NEXT: [[N_MOD_VF:%.*]] = urem i64 100, [[TMP6]] |
| ; NO-VP-NEXT: [[N_VEC:%.*]] = sub i64 100, [[N_MOD_VF]] |
| ; NO-VP-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; NO-VP: [[VECTOR_BODY]]: |
| ; NO-VP-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; NO-VP-NEXT: [[TMP9:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 [[INDEX]] |
| ; NO-VP-NEXT: [[WIDE_LOAD:%.*]] = load <vscale x 16 x i8>, ptr [[TMP9]], align 1 |
| ; NO-VP-NEXT: [[TMP10:%.*]] = ashr <vscale x 16 x i8> [[WIDE_LOAD]], splat (i8 1) |
| ; NO-VP-NEXT: [[TMP11:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 [[INDEX]] |
| ; NO-VP-NEXT: store <vscale x 16 x i8> [[TMP10]], ptr [[TMP11]], align 1 |
| ; NO-VP-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP6]] |
| ; NO-VP-NEXT: [[TMP12:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] |
| ; NO-VP-NEXT: br i1 [[TMP12]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP12:![0-9]+]] |
| ; NO-VP: [[MIDDLE_BLOCK]]: |
| ; NO-VP-NEXT: [[CMP_N:%.*]] = icmp eq i64 100, [[N_VEC]] |
| ; NO-VP-NEXT: br i1 [[CMP_N]], label %[[FINISH_LOOPEXIT:.*]], label %[[SCALAR_PH]] |
| ; NO-VP: [[SCALAR_PH]]: |
| ; NO-VP-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[LOOP_PREHEADER]] ], [ 0, %[[VECTOR_MEMCHECK]] ] |
| ; NO-VP-NEXT: br label %[[LOOP:.*]] |
| ; NO-VP: [[LOOP]]: |
| ; NO-VP-NEXT: [[LEN:%.*]] = phi i64 [ [[DEC:%.*]], %[[LOOP]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ] |
| ; NO-VP-NEXT: [[DEC]] = add nsw i64 [[LEN]], 1 |
| ; NO-VP-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 [[LEN]] |
| ; NO-VP-NEXT: [[TMP0:%.*]] = load i8, ptr [[ARRAYIDX]], align 1 |
| ; NO-VP-NEXT: [[TMP:%.*]] = ashr i8 [[TMP0]], 1 |
| ; NO-VP-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 [[LEN]] |
| ; NO-VP-NEXT: store i8 [[TMP]], ptr [[ARRAYIDX1]], align 1 |
| ; NO-VP-NEXT: [[DOTNOT:%.*]] = icmp eq i64 [[DEC]], 100 |
| ; NO-VP-NEXT: br i1 [[DOTNOT]], label %[[FINISH_LOOPEXIT]], label %[[LOOP]], !llvm.loop [[LOOP13:![0-9]+]] |
| ; NO-VP: [[FINISH_LOOPEXIT]]: |
| ; NO-VP-NEXT: ret void |
| ; |
| loop.preheader: |
| br label %loop |
| |
| loop: |
| %len = phi i64 [ %dec, %loop ], [ 0, %loop.preheader ] |
| %dec = add nsw i64 %len, 1 |
| %arrayidx = getelementptr inbounds i8, ptr %a, i64 %len |
| %0 = load i8, ptr %arrayidx, align 1 |
| %tmp = ashr i8 %0, 1 |
| %arrayidx1 = getelementptr inbounds i8, ptr %b, i64 %len |
| store i8 %tmp, ptr %arrayidx1, align 1 |
| %.not = icmp eq i64 %dec, 100 |
| br i1 %.not, label %finish.loopexit, label %loop |
| |
| finish.loopexit: |
| ret void |
| } |
| |
| define void @test_add(ptr nocapture %a, ptr nocapture readonly %b) { |
| ; IF-EVL-LABEL: define void @test_add( |
| ; IF-EVL-SAME: ptr captures(none) [[A:%.*]], ptr readonly captures(none) [[B:%.*]]) #[[ATTR0]] { |
| ; IF-EVL-NEXT: [[LOOP_PREHEADER:.*]]: |
| ; IF-EVL-NEXT: [[A2:%.*]] = ptrtoint ptr [[A]] to i64 |
| ; IF-EVL-NEXT: [[B1:%.*]] = ptrtoint ptr [[B]] to i64 |
| ; IF-EVL-NEXT: br i1 false, label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]] |
| ; IF-EVL: [[VECTOR_MEMCHECK]]: |
| ; IF-EVL-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() |
| ; IF-EVL-NEXT: [[TMP1:%.*]] = mul nuw i64 [[TMP0]], 16 |
| ; IF-EVL-NEXT: [[TMP2:%.*]] = sub i64 [[B1]], [[A2]] |
| ; IF-EVL-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP2]], [[TMP1]] |
| ; IF-EVL-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]] |
| ; IF-EVL: [[VECTOR_PH]]: |
| ; IF-EVL-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; IF-EVL: [[VECTOR_BODY]]: |
| ; IF-EVL-NEXT: [[EVL_BASED_IV:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_EVL_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; IF-EVL-NEXT: [[TMP10:%.*]] = phi i64 [ 100, %[[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; IF-EVL-NEXT: [[TMP11:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[TMP10]], i32 16, i1 true) |
| ; IF-EVL-NEXT: [[TMP13:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 [[EVL_BASED_IV]] |
| ; IF-EVL-NEXT: [[VP_OP_LOAD:%.*]] = call <vscale x 16 x i8> @llvm.vp.load.nxv16i8.p0(ptr align 1 [[TMP13]], <vscale x 16 x i1> splat (i1 true), i32 [[TMP11]]) |
| ; IF-EVL-NEXT: [[VP_OP:%.*]] = add <vscale x 16 x i8> [[VP_OP_LOAD]], splat (i8 1) |
| ; IF-EVL-NEXT: [[TMP16:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 [[EVL_BASED_IV]] |
| ; IF-EVL-NEXT: call void @llvm.vp.store.nxv16i8.p0(<vscale x 16 x i8> [[VP_OP]], ptr align 1 [[TMP16]], <vscale x 16 x i1> splat (i1 true), i32 [[TMP11]]) |
| ; IF-EVL-NEXT: [[TMP18:%.*]] = zext i32 [[TMP11]] to i64 |
| ; IF-EVL-NEXT: [[INDEX_EVL_NEXT]] = add nuw i64 [[TMP18]], [[EVL_BASED_IV]] |
| ; IF-EVL-NEXT: [[AVL_NEXT]] = sub nuw i64 [[TMP10]], [[TMP18]] |
| ; IF-EVL-NEXT: [[TMP14:%.*]] = icmp eq i64 [[AVL_NEXT]], 0 |
| ; IF-EVL-NEXT: br i1 [[TMP14]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP15:![0-9]+]] |
| ; IF-EVL: [[MIDDLE_BLOCK]]: |
| ; IF-EVL-NEXT: br label %[[FINISH_LOOPEXIT:.*]] |
| ; IF-EVL: [[SCALAR_PH]]: |
| ; IF-EVL-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 0, %[[LOOP_PREHEADER]] ], [ 0, %[[VECTOR_MEMCHECK]] ] |
| ; IF-EVL-NEXT: br label %[[LOOP:.*]] |
| ; IF-EVL: [[LOOP]]: |
| ; IF-EVL-NEXT: [[LEN:%.*]] = phi i64 [ [[DEC:%.*]], %[[LOOP]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ] |
| ; IF-EVL-NEXT: [[DEC]] = add nsw i64 [[LEN]], 1 |
| ; IF-EVL-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 [[LEN]] |
| ; IF-EVL-NEXT: [[TMP20:%.*]] = load i8, ptr [[ARRAYIDX]], align 1 |
| ; IF-EVL-NEXT: [[TMP:%.*]] = add i8 [[TMP20]], 1 |
| ; IF-EVL-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 [[LEN]] |
| ; IF-EVL-NEXT: store i8 [[TMP]], ptr [[ARRAYIDX1]], align 1 |
| ; IF-EVL-NEXT: [[DOTNOT:%.*]] = icmp eq i64 [[DEC]], 100 |
| ; IF-EVL-NEXT: br i1 [[DOTNOT]], label %[[FINISH_LOOPEXIT]], label %[[LOOP]], !llvm.loop [[LOOP16:![0-9]+]] |
| ; IF-EVL: [[FINISH_LOOPEXIT]]: |
| ; IF-EVL-NEXT: ret void |
| ; |
| ; NO-VP-LABEL: define void @test_add( |
| ; NO-VP-SAME: ptr captures(none) [[A:%.*]], ptr readonly captures(none) [[B:%.*]]) #[[ATTR0]] { |
| ; NO-VP-NEXT: [[LOOP_PREHEADER:.*]]: |
| ; NO-VP-NEXT: [[A2:%.*]] = ptrtoint ptr [[A]] to i64 |
| ; NO-VP-NEXT: [[B1:%.*]] = ptrtoint ptr [[B]] to i64 |
| ; NO-VP-NEXT: [[TMP7:%.*]] = call i64 @llvm.vscale.i64() |
| ; NO-VP-NEXT: [[TMP1:%.*]] = shl nuw i64 [[TMP7]], 4 |
| ; NO-VP-NEXT: [[TMP14:%.*]] = call i64 @llvm.umax.i64(i64 [[TMP1]], i64 32) |
| ; NO-VP-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 100, [[TMP14]] |
| ; NO-VP-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]] |
| ; NO-VP: [[VECTOR_MEMCHECK]]: |
| ; NO-VP-NEXT: [[TMP2:%.*]] = call i64 @llvm.vscale.i64() |
| ; NO-VP-NEXT: [[TMP3:%.*]] = mul nuw i64 [[TMP2]], 16 |
| ; NO-VP-NEXT: [[TMP4:%.*]] = sub i64 [[B1]], [[A2]] |
| ; NO-VP-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP4]], [[TMP3]] |
| ; NO-VP-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]] |
| ; NO-VP: [[VECTOR_PH]]: |
| ; NO-VP-NEXT: [[TMP5:%.*]] = call i64 @llvm.vscale.i64() |
| ; NO-VP-NEXT: [[TMP6:%.*]] = mul nuw i64 [[TMP5]], 16 |
| ; NO-VP-NEXT: [[N_MOD_VF:%.*]] = urem i64 100, [[TMP6]] |
| ; NO-VP-NEXT: [[N_VEC:%.*]] = sub i64 100, [[N_MOD_VF]] |
| ; NO-VP-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; NO-VP: [[VECTOR_BODY]]: |
| ; NO-VP-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; NO-VP-NEXT: [[TMP9:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 [[INDEX]] |
| ; NO-VP-NEXT: [[WIDE_LOAD:%.*]] = load <vscale x 16 x i8>, ptr [[TMP9]], align 1 |
| ; NO-VP-NEXT: [[TMP10:%.*]] = add <vscale x 16 x i8> [[WIDE_LOAD]], splat (i8 1) |
| ; NO-VP-NEXT: [[TMP11:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 [[INDEX]] |
| ; NO-VP-NEXT: store <vscale x 16 x i8> [[TMP10]], ptr [[TMP11]], align 1 |
| ; NO-VP-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP6]] |
| ; NO-VP-NEXT: [[TMP12:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] |
| ; NO-VP-NEXT: br i1 [[TMP12]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP14:![0-9]+]] |
| ; NO-VP: [[MIDDLE_BLOCK]]: |
| ; NO-VP-NEXT: [[CMP_N:%.*]] = icmp eq i64 100, [[N_VEC]] |
| ; NO-VP-NEXT: br i1 [[CMP_N]], label %[[FINISH_LOOPEXIT:.*]], label %[[SCALAR_PH]] |
| ; NO-VP: [[SCALAR_PH]]: |
| ; NO-VP-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[LOOP_PREHEADER]] ], [ 0, %[[VECTOR_MEMCHECK]] ] |
| ; NO-VP-NEXT: br label %[[LOOP:.*]] |
| ; NO-VP: [[LOOP]]: |
| ; NO-VP-NEXT: [[LEN:%.*]] = phi i64 [ [[DEC:%.*]], %[[LOOP]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ] |
| ; NO-VP-NEXT: [[DEC]] = add nsw i64 [[LEN]], 1 |
| ; NO-VP-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 [[LEN]] |
| ; NO-VP-NEXT: [[TMP0:%.*]] = load i8, ptr [[ARRAYIDX]], align 1 |
| ; NO-VP-NEXT: [[TMP:%.*]] = add i8 [[TMP0]], 1 |
| ; NO-VP-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 [[LEN]] |
| ; NO-VP-NEXT: store i8 [[TMP]], ptr [[ARRAYIDX1]], align 1 |
| ; NO-VP-NEXT: [[DOTNOT:%.*]] = icmp eq i64 [[DEC]], 100 |
| ; NO-VP-NEXT: br i1 [[DOTNOT]], label %[[FINISH_LOOPEXIT]], label %[[LOOP]], !llvm.loop [[LOOP15:![0-9]+]] |
| ; NO-VP: [[FINISH_LOOPEXIT]]: |
| ; NO-VP-NEXT: ret void |
| ; |
| loop.preheader: |
| br label %loop |
| |
| loop: |
| %len = phi i64 [ %dec, %loop ], [ 0, %loop.preheader ] |
| %dec = add nsw i64 %len, 1 |
| %arrayidx = getelementptr inbounds i8, ptr %a, i64 %len |
| %0 = load i8, ptr %arrayidx, align 1 |
| %tmp = add i8 %0, 1 |
| %arrayidx1 = getelementptr inbounds i8, ptr %b, i64 %len |
| store i8 %tmp, ptr %arrayidx1, align 1 |
| %.not = icmp eq i64 %dec, 100 |
| br i1 %.not, label %finish.loopexit, label %loop |
| |
| finish.loopexit: |
| ret void |
| } |
| |
| define void @test_sub(ptr nocapture %a, ptr nocapture readonly %b) { |
| ; IF-EVL-LABEL: define void @test_sub( |
| ; IF-EVL-SAME: ptr captures(none) [[A:%.*]], ptr readonly captures(none) [[B:%.*]]) #[[ATTR0]] { |
| ; IF-EVL-NEXT: [[LOOP_PREHEADER:.*]]: |
| ; IF-EVL-NEXT: [[A2:%.*]] = ptrtoint ptr [[A]] to i64 |
| ; IF-EVL-NEXT: [[B1:%.*]] = ptrtoint ptr [[B]] to i64 |
| ; IF-EVL-NEXT: br i1 false, label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]] |
| ; IF-EVL: [[VECTOR_MEMCHECK]]: |
| ; IF-EVL-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() |
| ; IF-EVL-NEXT: [[TMP1:%.*]] = mul nuw i64 [[TMP0]], 16 |
| ; IF-EVL-NEXT: [[TMP2:%.*]] = sub i64 [[B1]], [[A2]] |
| ; IF-EVL-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP2]], [[TMP1]] |
| ; IF-EVL-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]] |
| ; IF-EVL: [[VECTOR_PH]]: |
| ; IF-EVL-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; IF-EVL: [[VECTOR_BODY]]: |
| ; IF-EVL-NEXT: [[EVL_BASED_IV:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_EVL_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; IF-EVL-NEXT: [[TMP10:%.*]] = phi i64 [ 100, %[[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; IF-EVL-NEXT: [[TMP11:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[TMP10]], i32 16, i1 true) |
| ; IF-EVL-NEXT: [[TMP13:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 [[EVL_BASED_IV]] |
| ; IF-EVL-NEXT: [[VP_OP_LOAD:%.*]] = call <vscale x 16 x i8> @llvm.vp.load.nxv16i8.p0(ptr align 1 [[TMP13]], <vscale x 16 x i1> splat (i1 true), i32 [[TMP11]]) |
| ; IF-EVL-NEXT: [[VP_OP:%.*]] = sub <vscale x 16 x i8> [[VP_OP_LOAD]], splat (i8 1) |
| ; IF-EVL-NEXT: [[TMP16:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 [[EVL_BASED_IV]] |
| ; IF-EVL-NEXT: call void @llvm.vp.store.nxv16i8.p0(<vscale x 16 x i8> [[VP_OP]], ptr align 1 [[TMP16]], <vscale x 16 x i1> splat (i1 true), i32 [[TMP11]]) |
| ; IF-EVL-NEXT: [[TMP18:%.*]] = zext i32 [[TMP11]] to i64 |
| ; IF-EVL-NEXT: [[INDEX_EVL_NEXT]] = add nuw i64 [[TMP18]], [[EVL_BASED_IV]] |
| ; IF-EVL-NEXT: [[AVL_NEXT]] = sub nuw i64 [[TMP10]], [[TMP18]] |
| ; IF-EVL-NEXT: [[TMP14:%.*]] = icmp eq i64 [[AVL_NEXT]], 0 |
| ; IF-EVL-NEXT: br i1 [[TMP14]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP17:![0-9]+]] |
| ; IF-EVL: [[MIDDLE_BLOCK]]: |
| ; IF-EVL-NEXT: br label %[[FINISH_LOOPEXIT:.*]] |
| ; IF-EVL: [[SCALAR_PH]]: |
| ; IF-EVL-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 0, %[[LOOP_PREHEADER]] ], [ 0, %[[VECTOR_MEMCHECK]] ] |
| ; IF-EVL-NEXT: br label %[[LOOP:.*]] |
| ; IF-EVL: [[LOOP]]: |
| ; IF-EVL-NEXT: [[LEN:%.*]] = phi i64 [ [[DEC:%.*]], %[[LOOP]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ] |
| ; IF-EVL-NEXT: [[DEC]] = add nsw i64 [[LEN]], 1 |
| ; IF-EVL-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 [[LEN]] |
| ; IF-EVL-NEXT: [[TMP20:%.*]] = load i8, ptr [[ARRAYIDX]], align 1 |
| ; IF-EVL-NEXT: [[TMP:%.*]] = sub i8 [[TMP20]], 1 |
| ; IF-EVL-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 [[LEN]] |
| ; IF-EVL-NEXT: store i8 [[TMP]], ptr [[ARRAYIDX1]], align 1 |
| ; IF-EVL-NEXT: [[DOTNOT:%.*]] = icmp eq i64 [[DEC]], 100 |
| ; IF-EVL-NEXT: br i1 [[DOTNOT]], label %[[FINISH_LOOPEXIT]], label %[[LOOP]], !llvm.loop [[LOOP18:![0-9]+]] |
| ; IF-EVL: [[FINISH_LOOPEXIT]]: |
| ; IF-EVL-NEXT: ret void |
| ; |
| ; NO-VP-LABEL: define void @test_sub( |
| ; NO-VP-SAME: ptr captures(none) [[A:%.*]], ptr readonly captures(none) [[B:%.*]]) #[[ATTR0]] { |
| ; NO-VP-NEXT: [[LOOP_PREHEADER:.*]]: |
| ; NO-VP-NEXT: [[A2:%.*]] = ptrtoint ptr [[A]] to i64 |
| ; NO-VP-NEXT: [[B1:%.*]] = ptrtoint ptr [[B]] to i64 |
| ; NO-VP-NEXT: [[TMP7:%.*]] = call i64 @llvm.vscale.i64() |
| ; NO-VP-NEXT: [[TMP1:%.*]] = shl nuw i64 [[TMP7]], 4 |
| ; NO-VP-NEXT: [[TMP14:%.*]] = call i64 @llvm.umax.i64(i64 [[TMP1]], i64 32) |
| ; NO-VP-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 100, [[TMP14]] |
| ; NO-VP-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]] |
| ; NO-VP: [[VECTOR_MEMCHECK]]: |
| ; NO-VP-NEXT: [[TMP2:%.*]] = call i64 @llvm.vscale.i64() |
| ; NO-VP-NEXT: [[TMP3:%.*]] = mul nuw i64 [[TMP2]], 16 |
| ; NO-VP-NEXT: [[TMP4:%.*]] = sub i64 [[B1]], [[A2]] |
| ; NO-VP-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP4]], [[TMP3]] |
| ; NO-VP-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]] |
| ; NO-VP: [[VECTOR_PH]]: |
| ; NO-VP-NEXT: [[TMP5:%.*]] = call i64 @llvm.vscale.i64() |
| ; NO-VP-NEXT: [[TMP6:%.*]] = mul nuw i64 [[TMP5]], 16 |
| ; NO-VP-NEXT: [[N_MOD_VF:%.*]] = urem i64 100, [[TMP6]] |
| ; NO-VP-NEXT: [[N_VEC:%.*]] = sub i64 100, [[N_MOD_VF]] |
| ; NO-VP-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; NO-VP: [[VECTOR_BODY]]: |
| ; NO-VP-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; NO-VP-NEXT: [[TMP9:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 [[INDEX]] |
| ; NO-VP-NEXT: [[WIDE_LOAD:%.*]] = load <vscale x 16 x i8>, ptr [[TMP9]], align 1 |
| ; NO-VP-NEXT: [[TMP10:%.*]] = sub <vscale x 16 x i8> [[WIDE_LOAD]], splat (i8 1) |
| ; NO-VP-NEXT: [[TMP11:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 [[INDEX]] |
| ; NO-VP-NEXT: store <vscale x 16 x i8> [[TMP10]], ptr [[TMP11]], align 1 |
| ; NO-VP-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP6]] |
| ; NO-VP-NEXT: [[TMP12:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] |
| ; NO-VP-NEXT: br i1 [[TMP12]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP16:![0-9]+]] |
| ; NO-VP: [[MIDDLE_BLOCK]]: |
| ; NO-VP-NEXT: [[CMP_N:%.*]] = icmp eq i64 100, [[N_VEC]] |
| ; NO-VP-NEXT: br i1 [[CMP_N]], label %[[FINISH_LOOPEXIT:.*]], label %[[SCALAR_PH]] |
| ; NO-VP: [[SCALAR_PH]]: |
| ; NO-VP-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[LOOP_PREHEADER]] ], [ 0, %[[VECTOR_MEMCHECK]] ] |
| ; NO-VP-NEXT: br label %[[LOOP:.*]] |
| ; NO-VP: [[LOOP]]: |
| ; NO-VP-NEXT: [[LEN:%.*]] = phi i64 [ [[DEC:%.*]], %[[LOOP]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ] |
| ; NO-VP-NEXT: [[DEC]] = add nsw i64 [[LEN]], 1 |
| ; NO-VP-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 [[LEN]] |
| ; NO-VP-NEXT: [[TMP0:%.*]] = load i8, ptr [[ARRAYIDX]], align 1 |
| ; NO-VP-NEXT: [[TMP:%.*]] = sub i8 [[TMP0]], 1 |
| ; NO-VP-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 [[LEN]] |
| ; NO-VP-NEXT: store i8 [[TMP]], ptr [[ARRAYIDX1]], align 1 |
| ; NO-VP-NEXT: [[DOTNOT:%.*]] = icmp eq i64 [[DEC]], 100 |
| ; NO-VP-NEXT: br i1 [[DOTNOT]], label %[[FINISH_LOOPEXIT]], label %[[LOOP]], !llvm.loop [[LOOP17:![0-9]+]] |
| ; NO-VP: [[FINISH_LOOPEXIT]]: |
| ; NO-VP-NEXT: ret void |
| ; |
| loop.preheader: |
| br label %loop |
| |
| loop: |
| %len = phi i64 [ %dec, %loop ], [ 0, %loop.preheader ] |
| %dec = add nsw i64 %len, 1 |
| %arrayidx = getelementptr inbounds i8, ptr %a, i64 %len |
| %0 = load i8, ptr %arrayidx, align 1 |
| %tmp = sub i8 %0, 1 |
| %arrayidx1 = getelementptr inbounds i8, ptr %b, i64 %len |
| store i8 %tmp, ptr %arrayidx1, align 1 |
| %.not = icmp eq i64 %dec, 100 |
| br i1 %.not, label %finish.loopexit, label %loop |
| |
| finish.loopexit: |
| ret void |
| } |
| |
| define void @test_mul(ptr nocapture %a, ptr nocapture readonly %b) { |
| ; IF-EVL-LABEL: define void @test_mul( |
| ; IF-EVL-SAME: ptr captures(none) [[A:%.*]], ptr readonly captures(none) [[B:%.*]]) #[[ATTR0]] { |
| ; IF-EVL-NEXT: [[LOOP_PREHEADER:.*]]: |
| ; IF-EVL-NEXT: [[A2:%.*]] = ptrtoint ptr [[A]] to i64 |
| ; IF-EVL-NEXT: [[B1:%.*]] = ptrtoint ptr [[B]] to i64 |
| ; IF-EVL-NEXT: br i1 false, label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]] |
| ; IF-EVL: [[VECTOR_MEMCHECK]]: |
| ; IF-EVL-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() |
| ; IF-EVL-NEXT: [[TMP1:%.*]] = mul nuw i64 [[TMP0]], 16 |
| ; IF-EVL-NEXT: [[TMP2:%.*]] = sub i64 [[B1]], [[A2]] |
| ; IF-EVL-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP2]], [[TMP1]] |
| ; IF-EVL-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]] |
| ; IF-EVL: [[VECTOR_PH]]: |
| ; IF-EVL-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; IF-EVL: [[VECTOR_BODY]]: |
| ; IF-EVL-NEXT: [[EVL_BASED_IV:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_EVL_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; IF-EVL-NEXT: [[TMP10:%.*]] = phi i64 [ 100, %[[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; IF-EVL-NEXT: [[TMP11:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[TMP10]], i32 16, i1 true) |
| ; IF-EVL-NEXT: [[TMP13:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 [[EVL_BASED_IV]] |
| ; IF-EVL-NEXT: [[VP_OP_LOAD:%.*]] = call <vscale x 16 x i8> @llvm.vp.load.nxv16i8.p0(ptr align 1 [[TMP13]], <vscale x 16 x i1> splat (i1 true), i32 [[TMP11]]) |
| ; IF-EVL-NEXT: [[VP_OP:%.*]] = mul <vscale x 16 x i8> [[VP_OP_LOAD]], splat (i8 3) |
| ; IF-EVL-NEXT: [[TMP16:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 [[EVL_BASED_IV]] |
| ; IF-EVL-NEXT: call void @llvm.vp.store.nxv16i8.p0(<vscale x 16 x i8> [[VP_OP]], ptr align 1 [[TMP16]], <vscale x 16 x i1> splat (i1 true), i32 [[TMP11]]) |
| ; IF-EVL-NEXT: [[TMP18:%.*]] = zext i32 [[TMP11]] to i64 |
| ; IF-EVL-NEXT: [[INDEX_EVL_NEXT]] = add nuw i64 [[TMP18]], [[EVL_BASED_IV]] |
| ; IF-EVL-NEXT: [[AVL_NEXT]] = sub nuw i64 [[TMP10]], [[TMP18]] |
| ; IF-EVL-NEXT: [[TMP14:%.*]] = icmp eq i64 [[AVL_NEXT]], 0 |
| ; IF-EVL-NEXT: br i1 [[TMP14]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP19:![0-9]+]] |
| ; IF-EVL: [[MIDDLE_BLOCK]]: |
| ; IF-EVL-NEXT: br label %[[FINISH_LOOPEXIT:.*]] |
| ; IF-EVL: [[SCALAR_PH]]: |
| ; IF-EVL-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 0, %[[LOOP_PREHEADER]] ], [ 0, %[[VECTOR_MEMCHECK]] ] |
| ; IF-EVL-NEXT: br label %[[LOOP:.*]] |
| ; IF-EVL: [[LOOP]]: |
| ; IF-EVL-NEXT: [[LEN:%.*]] = phi i64 [ [[DEC:%.*]], %[[LOOP]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ] |
| ; IF-EVL-NEXT: [[DEC]] = add nsw i64 [[LEN]], 1 |
| ; IF-EVL-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 [[LEN]] |
| ; IF-EVL-NEXT: [[TMP20:%.*]] = load i8, ptr [[ARRAYIDX]], align 1 |
| ; IF-EVL-NEXT: [[TMP:%.*]] = mul i8 [[TMP20]], 3 |
| ; IF-EVL-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 [[LEN]] |
| ; IF-EVL-NEXT: store i8 [[TMP]], ptr [[ARRAYIDX1]], align 1 |
| ; IF-EVL-NEXT: [[DOTNOT:%.*]] = icmp eq i64 [[DEC]], 100 |
| ; IF-EVL-NEXT: br i1 [[DOTNOT]], label %[[FINISH_LOOPEXIT]], label %[[LOOP]], !llvm.loop [[LOOP20:![0-9]+]] |
| ; IF-EVL: [[FINISH_LOOPEXIT]]: |
| ; IF-EVL-NEXT: ret void |
| ; |
| ; NO-VP-LABEL: define void @test_mul( |
| ; NO-VP-SAME: ptr captures(none) [[A:%.*]], ptr readonly captures(none) [[B:%.*]]) #[[ATTR0]] { |
| ; NO-VP-NEXT: [[LOOP_PREHEADER:.*]]: |
| ; NO-VP-NEXT: [[A2:%.*]] = ptrtoint ptr [[A]] to i64 |
| ; NO-VP-NEXT: [[B1:%.*]] = ptrtoint ptr [[B]] to i64 |
| ; NO-VP-NEXT: [[TMP7:%.*]] = call i64 @llvm.vscale.i64() |
| ; NO-VP-NEXT: [[TMP1:%.*]] = shl nuw i64 [[TMP7]], 4 |
| ; NO-VP-NEXT: [[TMP14:%.*]] = call i64 @llvm.umax.i64(i64 [[TMP1]], i64 32) |
| ; NO-VP-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 100, [[TMP14]] |
| ; NO-VP-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]] |
| ; NO-VP: [[VECTOR_MEMCHECK]]: |
| ; NO-VP-NEXT: [[TMP2:%.*]] = call i64 @llvm.vscale.i64() |
| ; NO-VP-NEXT: [[TMP3:%.*]] = mul nuw i64 [[TMP2]], 16 |
| ; NO-VP-NEXT: [[TMP4:%.*]] = sub i64 [[B1]], [[A2]] |
| ; NO-VP-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP4]], [[TMP3]] |
| ; NO-VP-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]] |
| ; NO-VP: [[VECTOR_PH]]: |
| ; NO-VP-NEXT: [[TMP5:%.*]] = call i64 @llvm.vscale.i64() |
| ; NO-VP-NEXT: [[TMP6:%.*]] = mul nuw i64 [[TMP5]], 16 |
| ; NO-VP-NEXT: [[N_MOD_VF:%.*]] = urem i64 100, [[TMP6]] |
| ; NO-VP-NEXT: [[N_VEC:%.*]] = sub i64 100, [[N_MOD_VF]] |
| ; NO-VP-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; NO-VP: [[VECTOR_BODY]]: |
| ; NO-VP-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; NO-VP-NEXT: [[TMP9:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 [[INDEX]] |
| ; NO-VP-NEXT: [[WIDE_LOAD:%.*]] = load <vscale x 16 x i8>, ptr [[TMP9]], align 1 |
| ; NO-VP-NEXT: [[TMP10:%.*]] = mul <vscale x 16 x i8> [[WIDE_LOAD]], splat (i8 3) |
| ; NO-VP-NEXT: [[TMP11:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 [[INDEX]] |
| ; NO-VP-NEXT: store <vscale x 16 x i8> [[TMP10]], ptr [[TMP11]], align 1 |
| ; NO-VP-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP6]] |
| ; NO-VP-NEXT: [[TMP12:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] |
| ; NO-VP-NEXT: br i1 [[TMP12]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP18:![0-9]+]] |
| ; NO-VP: [[MIDDLE_BLOCK]]: |
| ; NO-VP-NEXT: [[CMP_N:%.*]] = icmp eq i64 100, [[N_VEC]] |
| ; NO-VP-NEXT: br i1 [[CMP_N]], label %[[FINISH_LOOPEXIT:.*]], label %[[SCALAR_PH]] |
| ; NO-VP: [[SCALAR_PH]]: |
| ; NO-VP-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[LOOP_PREHEADER]] ], [ 0, %[[VECTOR_MEMCHECK]] ] |
| ; NO-VP-NEXT: br label %[[LOOP:.*]] |
| ; NO-VP: [[LOOP]]: |
| ; NO-VP-NEXT: [[LEN:%.*]] = phi i64 [ [[DEC:%.*]], %[[LOOP]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ] |
| ; NO-VP-NEXT: [[DEC]] = add nsw i64 [[LEN]], 1 |
| ; NO-VP-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 [[LEN]] |
| ; NO-VP-NEXT: [[TMP0:%.*]] = load i8, ptr [[ARRAYIDX]], align 1 |
| ; NO-VP-NEXT: [[TMP:%.*]] = mul i8 [[TMP0]], 3 |
| ; NO-VP-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 [[LEN]] |
| ; NO-VP-NEXT: store i8 [[TMP]], ptr [[ARRAYIDX1]], align 1 |
| ; NO-VP-NEXT: [[DOTNOT:%.*]] = icmp eq i64 [[DEC]], 100 |
| ; NO-VP-NEXT: br i1 [[DOTNOT]], label %[[FINISH_LOOPEXIT]], label %[[LOOP]], !llvm.loop [[LOOP19:![0-9]+]] |
| ; NO-VP: [[FINISH_LOOPEXIT]]: |
| ; NO-VP-NEXT: ret void |
| ; |
| loop.preheader: |
| br label %loop |
| |
| loop: |
| %len = phi i64 [ %dec, %loop ], [ 0, %loop.preheader ] |
| %dec = add nsw i64 %len, 1 |
| %arrayidx = getelementptr inbounds i8, ptr %a, i64 %len |
| %0 = load i8, ptr %arrayidx, align 1 |
| %tmp = mul i8 %0, 3 |
| %arrayidx1 = getelementptr inbounds i8, ptr %b, i64 %len |
| store i8 %tmp, ptr %arrayidx1, align 1 |
| %.not = icmp eq i64 %dec, 100 |
| br i1 %.not, label %finish.loopexit, label %loop |
| |
| finish.loopexit: |
| ret void |
| } |
| |
| define void @test_sdiv(ptr nocapture %a, ptr nocapture readonly %b) { |
| ; IF-EVL-LABEL: define void @test_sdiv( |
| ; IF-EVL-SAME: ptr captures(none) [[A:%.*]], ptr readonly captures(none) [[B:%.*]]) #[[ATTR0]] { |
| ; IF-EVL-NEXT: [[LOOP_PREHEADER:.*]]: |
| ; IF-EVL-NEXT: [[A2:%.*]] = ptrtoint ptr [[A]] to i64 |
| ; IF-EVL-NEXT: [[B1:%.*]] = ptrtoint ptr [[B]] to i64 |
| ; IF-EVL-NEXT: br i1 false, label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]] |
| ; IF-EVL: [[VECTOR_MEMCHECK]]: |
| ; IF-EVL-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() |
| ; IF-EVL-NEXT: [[TMP1:%.*]] = mul nuw i64 [[TMP0]], 16 |
| ; IF-EVL-NEXT: [[TMP2:%.*]] = sub i64 [[B1]], [[A2]] |
| ; IF-EVL-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP2]], [[TMP1]] |
| ; IF-EVL-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]] |
| ; IF-EVL: [[VECTOR_PH]]: |
| ; IF-EVL-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; IF-EVL: [[VECTOR_BODY]]: |
| ; IF-EVL-NEXT: [[EVL_BASED_IV:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_EVL_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; IF-EVL-NEXT: [[TMP10:%.*]] = phi i64 [ 100, %[[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; IF-EVL-NEXT: [[TMP11:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[TMP10]], i32 16, i1 true) |
| ; IF-EVL-NEXT: [[TMP13:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 [[EVL_BASED_IV]] |
| ; IF-EVL-NEXT: [[VP_OP_LOAD:%.*]] = call <vscale x 16 x i8> @llvm.vp.load.nxv16i8.p0(ptr align 1 [[TMP13]], <vscale x 16 x i1> splat (i1 true), i32 [[TMP11]]) |
| ; IF-EVL-NEXT: [[VP_OP:%.*]] = sdiv <vscale x 16 x i8> [[VP_OP_LOAD]], splat (i8 3) |
| ; IF-EVL-NEXT: [[TMP16:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 [[EVL_BASED_IV]] |
| ; IF-EVL-NEXT: call void @llvm.vp.store.nxv16i8.p0(<vscale x 16 x i8> [[VP_OP]], ptr align 1 [[TMP16]], <vscale x 16 x i1> splat (i1 true), i32 [[TMP11]]) |
| ; IF-EVL-NEXT: [[TMP18:%.*]] = zext i32 [[TMP11]] to i64 |
| ; IF-EVL-NEXT: [[INDEX_EVL_NEXT]] = add nuw i64 [[TMP18]], [[EVL_BASED_IV]] |
| ; IF-EVL-NEXT: [[AVL_NEXT]] = sub nuw i64 [[TMP10]], [[TMP18]] |
| ; IF-EVL-NEXT: [[TMP14:%.*]] = icmp eq i64 [[AVL_NEXT]], 0 |
| ; IF-EVL-NEXT: br i1 [[TMP14]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP21:![0-9]+]] |
| ; IF-EVL: [[MIDDLE_BLOCK]]: |
| ; IF-EVL-NEXT: br label %[[FINISH_LOOPEXIT:.*]] |
| ; IF-EVL: [[SCALAR_PH]]: |
| ; IF-EVL-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 0, %[[LOOP_PREHEADER]] ], [ 0, %[[VECTOR_MEMCHECK]] ] |
| ; IF-EVL-NEXT: br label %[[LOOP:.*]] |
| ; IF-EVL: [[LOOP]]: |
| ; IF-EVL-NEXT: [[LEN:%.*]] = phi i64 [ [[DEC:%.*]], %[[LOOP]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ] |
| ; IF-EVL-NEXT: [[DEC]] = add nsw i64 [[LEN]], 1 |
| ; IF-EVL-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 [[LEN]] |
| ; IF-EVL-NEXT: [[TMP20:%.*]] = load i8, ptr [[ARRAYIDX]], align 1 |
| ; IF-EVL-NEXT: [[TMP:%.*]] = sdiv i8 [[TMP20]], 3 |
| ; IF-EVL-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 [[LEN]] |
| ; IF-EVL-NEXT: store i8 [[TMP]], ptr [[ARRAYIDX1]], align 1 |
| ; IF-EVL-NEXT: [[DOTNOT:%.*]] = icmp eq i64 [[DEC]], 100 |
| ; IF-EVL-NEXT: br i1 [[DOTNOT]], label %[[FINISH_LOOPEXIT]], label %[[LOOP]], !llvm.loop [[LOOP22:![0-9]+]] |
| ; IF-EVL: [[FINISH_LOOPEXIT]]: |
| ; IF-EVL-NEXT: ret void |
| ; |
| ; NO-VP-LABEL: define void @test_sdiv( |
| ; NO-VP-SAME: ptr captures(none) [[A:%.*]], ptr readonly captures(none) [[B:%.*]]) #[[ATTR0]] { |
| ; NO-VP-NEXT: [[LOOP_PREHEADER:.*]]: |
| ; NO-VP-NEXT: [[A2:%.*]] = ptrtoint ptr [[A]] to i64 |
| ; NO-VP-NEXT: [[B1:%.*]] = ptrtoint ptr [[B]] to i64 |
| ; NO-VP-NEXT: [[TMP7:%.*]] = call i64 @llvm.vscale.i64() |
| ; NO-VP-NEXT: [[TMP1:%.*]] = shl nuw i64 [[TMP7]], 4 |
| ; NO-VP-NEXT: [[TMP14:%.*]] = call i64 @llvm.umax.i64(i64 [[TMP1]], i64 32) |
| ; NO-VP-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 100, [[TMP14]] |
| ; NO-VP-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]] |
| ; NO-VP: [[VECTOR_MEMCHECK]]: |
| ; NO-VP-NEXT: [[TMP2:%.*]] = call i64 @llvm.vscale.i64() |
| ; NO-VP-NEXT: [[TMP3:%.*]] = mul nuw i64 [[TMP2]], 16 |
| ; NO-VP-NEXT: [[TMP4:%.*]] = sub i64 [[B1]], [[A2]] |
| ; NO-VP-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP4]], [[TMP3]] |
| ; NO-VP-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]] |
| ; NO-VP: [[VECTOR_PH]]: |
| ; NO-VP-NEXT: [[TMP5:%.*]] = call i64 @llvm.vscale.i64() |
| ; NO-VP-NEXT: [[TMP6:%.*]] = mul nuw i64 [[TMP5]], 16 |
| ; NO-VP-NEXT: [[N_MOD_VF:%.*]] = urem i64 100, [[TMP6]] |
| ; NO-VP-NEXT: [[N_VEC:%.*]] = sub i64 100, [[N_MOD_VF]] |
| ; NO-VP-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; NO-VP: [[VECTOR_BODY]]: |
| ; NO-VP-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; NO-VP-NEXT: [[TMP9:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 [[INDEX]] |
| ; NO-VP-NEXT: [[WIDE_LOAD:%.*]] = load <vscale x 16 x i8>, ptr [[TMP9]], align 1 |
| ; NO-VP-NEXT: [[TMP10:%.*]] = sdiv <vscale x 16 x i8> [[WIDE_LOAD]], splat (i8 3) |
| ; NO-VP-NEXT: [[TMP11:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 [[INDEX]] |
| ; NO-VP-NEXT: store <vscale x 16 x i8> [[TMP10]], ptr [[TMP11]], align 1 |
| ; NO-VP-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP6]] |
| ; NO-VP-NEXT: [[TMP12:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] |
| ; NO-VP-NEXT: br i1 [[TMP12]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP20:![0-9]+]] |
| ; NO-VP: [[MIDDLE_BLOCK]]: |
| ; NO-VP-NEXT: [[CMP_N:%.*]] = icmp eq i64 100, [[N_VEC]] |
| ; NO-VP-NEXT: br i1 [[CMP_N]], label %[[FINISH_LOOPEXIT:.*]], label %[[SCALAR_PH]] |
| ; NO-VP: [[SCALAR_PH]]: |
| ; NO-VP-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[LOOP_PREHEADER]] ], [ 0, %[[VECTOR_MEMCHECK]] ] |
| ; NO-VP-NEXT: br label %[[LOOP:.*]] |
| ; NO-VP: [[LOOP]]: |
| ; NO-VP-NEXT: [[LEN:%.*]] = phi i64 [ [[DEC:%.*]], %[[LOOP]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ] |
| ; NO-VP-NEXT: [[DEC]] = add nsw i64 [[LEN]], 1 |
| ; NO-VP-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 [[LEN]] |
| ; NO-VP-NEXT: [[TMP0:%.*]] = load i8, ptr [[ARRAYIDX]], align 1 |
| ; NO-VP-NEXT: [[TMP:%.*]] = sdiv i8 [[TMP0]], 3 |
| ; NO-VP-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 [[LEN]] |
| ; NO-VP-NEXT: store i8 [[TMP]], ptr [[ARRAYIDX1]], align 1 |
| ; NO-VP-NEXT: [[DOTNOT:%.*]] = icmp eq i64 [[DEC]], 100 |
| ; NO-VP-NEXT: br i1 [[DOTNOT]], label %[[FINISH_LOOPEXIT]], label %[[LOOP]], !llvm.loop [[LOOP21:![0-9]+]] |
| ; NO-VP: [[FINISH_LOOPEXIT]]: |
| ; NO-VP-NEXT: ret void |
| ; |
| loop.preheader: |
| br label %loop |
| |
| loop: |
| %len = phi i64 [ %dec, %loop ], [ 0, %loop.preheader ] |
| %dec = add nsw i64 %len, 1 |
| %arrayidx = getelementptr inbounds i8, ptr %a, i64 %len |
| %0 = load i8, ptr %arrayidx, align 1 |
| %tmp = sdiv i8 %0, 3 |
| %arrayidx1 = getelementptr inbounds i8, ptr %b, i64 %len |
| store i8 %tmp, ptr %arrayidx1, align 1 |
| %.not = icmp eq i64 %dec, 100 |
| br i1 %.not, label %finish.loopexit, label %loop |
| |
| finish.loopexit: |
| ret void |
| } |
| |
| define void @test_udiv(ptr nocapture %a, ptr nocapture readonly %b) { |
| ; IF-EVL-LABEL: define void @test_udiv( |
| ; IF-EVL-SAME: ptr captures(none) [[A:%.*]], ptr readonly captures(none) [[B:%.*]]) #[[ATTR0]] { |
| ; IF-EVL-NEXT: [[LOOP_PREHEADER:.*]]: |
| ; IF-EVL-NEXT: [[A2:%.*]] = ptrtoint ptr [[A]] to i64 |
| ; IF-EVL-NEXT: [[B1:%.*]] = ptrtoint ptr [[B]] to i64 |
| ; IF-EVL-NEXT: br i1 false, label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]] |
| ; IF-EVL: [[VECTOR_MEMCHECK]]: |
| ; IF-EVL-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() |
| ; IF-EVL-NEXT: [[TMP1:%.*]] = mul nuw i64 [[TMP0]], 16 |
| ; IF-EVL-NEXT: [[TMP2:%.*]] = sub i64 [[B1]], [[A2]] |
| ; IF-EVL-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP2]], [[TMP1]] |
| ; IF-EVL-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]] |
| ; IF-EVL: [[VECTOR_PH]]: |
| ; IF-EVL-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; IF-EVL: [[VECTOR_BODY]]: |
| ; IF-EVL-NEXT: [[EVL_BASED_IV:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_EVL_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; IF-EVL-NEXT: [[TMP10:%.*]] = phi i64 [ 100, %[[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; IF-EVL-NEXT: [[TMP11:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[TMP10]], i32 16, i1 true) |
| ; IF-EVL-NEXT: [[TMP13:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 [[EVL_BASED_IV]] |
| ; IF-EVL-NEXT: [[VP_OP_LOAD:%.*]] = call <vscale x 16 x i8> @llvm.vp.load.nxv16i8.p0(ptr align 1 [[TMP13]], <vscale x 16 x i1> splat (i1 true), i32 [[TMP11]]) |
| ; IF-EVL-NEXT: [[VP_OP:%.*]] = udiv <vscale x 16 x i8> [[VP_OP_LOAD]], splat (i8 3) |
| ; IF-EVL-NEXT: [[TMP16:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 [[EVL_BASED_IV]] |
| ; IF-EVL-NEXT: call void @llvm.vp.store.nxv16i8.p0(<vscale x 16 x i8> [[VP_OP]], ptr align 1 [[TMP16]], <vscale x 16 x i1> splat (i1 true), i32 [[TMP11]]) |
| ; IF-EVL-NEXT: [[TMP18:%.*]] = zext i32 [[TMP11]] to i64 |
| ; IF-EVL-NEXT: [[INDEX_EVL_NEXT]] = add nuw i64 [[TMP18]], [[EVL_BASED_IV]] |
| ; IF-EVL-NEXT: [[AVL_NEXT]] = sub nuw i64 [[TMP10]], [[TMP18]] |
| ; IF-EVL-NEXT: [[TMP14:%.*]] = icmp eq i64 [[AVL_NEXT]], 0 |
| ; IF-EVL-NEXT: br i1 [[TMP14]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP23:![0-9]+]] |
| ; IF-EVL: [[MIDDLE_BLOCK]]: |
| ; IF-EVL-NEXT: br label %[[FINISH_LOOPEXIT:.*]] |
| ; IF-EVL: [[SCALAR_PH]]: |
| ; IF-EVL-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 0, %[[LOOP_PREHEADER]] ], [ 0, %[[VECTOR_MEMCHECK]] ] |
| ; IF-EVL-NEXT: br label %[[LOOP:.*]] |
| ; IF-EVL: [[LOOP]]: |
| ; IF-EVL-NEXT: [[LEN:%.*]] = phi i64 [ [[DEC:%.*]], %[[LOOP]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ] |
| ; IF-EVL-NEXT: [[DEC]] = add nsw i64 [[LEN]], 1 |
| ; IF-EVL-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 [[LEN]] |
| ; IF-EVL-NEXT: [[TMP20:%.*]] = load i8, ptr [[ARRAYIDX]], align 1 |
| ; IF-EVL-NEXT: [[TMP:%.*]] = udiv i8 [[TMP20]], 3 |
| ; IF-EVL-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 [[LEN]] |
| ; IF-EVL-NEXT: store i8 [[TMP]], ptr [[ARRAYIDX1]], align 1 |
| ; IF-EVL-NEXT: [[DOTNOT:%.*]] = icmp eq i64 [[DEC]], 100 |
| ; IF-EVL-NEXT: br i1 [[DOTNOT]], label %[[FINISH_LOOPEXIT]], label %[[LOOP]], !llvm.loop [[LOOP24:![0-9]+]] |
| ; IF-EVL: [[FINISH_LOOPEXIT]]: |
| ; IF-EVL-NEXT: ret void |
| ; |
| ; NO-VP-LABEL: define void @test_udiv( |
| ; NO-VP-SAME: ptr captures(none) [[A:%.*]], ptr readonly captures(none) [[B:%.*]]) #[[ATTR0]] { |
| ; NO-VP-NEXT: [[LOOP_PREHEADER:.*]]: |
| ; NO-VP-NEXT: [[A2:%.*]] = ptrtoint ptr [[A]] to i64 |
| ; NO-VP-NEXT: [[B1:%.*]] = ptrtoint ptr [[B]] to i64 |
| ; NO-VP-NEXT: [[TMP7:%.*]] = call i64 @llvm.vscale.i64() |
| ; NO-VP-NEXT: [[TMP1:%.*]] = shl nuw i64 [[TMP7]], 4 |
| ; NO-VP-NEXT: [[TMP14:%.*]] = call i64 @llvm.umax.i64(i64 [[TMP1]], i64 32) |
| ; NO-VP-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 100, [[TMP14]] |
| ; NO-VP-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]] |
| ; NO-VP: [[VECTOR_MEMCHECK]]: |
| ; NO-VP-NEXT: [[TMP2:%.*]] = call i64 @llvm.vscale.i64() |
| ; NO-VP-NEXT: [[TMP3:%.*]] = mul nuw i64 [[TMP2]], 16 |
| ; NO-VP-NEXT: [[TMP4:%.*]] = sub i64 [[B1]], [[A2]] |
| ; NO-VP-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP4]], [[TMP3]] |
| ; NO-VP-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]] |
| ; NO-VP: [[VECTOR_PH]]: |
| ; NO-VP-NEXT: [[TMP5:%.*]] = call i64 @llvm.vscale.i64() |
| ; NO-VP-NEXT: [[TMP6:%.*]] = mul nuw i64 [[TMP5]], 16 |
| ; NO-VP-NEXT: [[N_MOD_VF:%.*]] = urem i64 100, [[TMP6]] |
| ; NO-VP-NEXT: [[N_VEC:%.*]] = sub i64 100, [[N_MOD_VF]] |
| ; NO-VP-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; NO-VP: [[VECTOR_BODY]]: |
| ; NO-VP-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; NO-VP-NEXT: [[TMP9:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 [[INDEX]] |
| ; NO-VP-NEXT: [[WIDE_LOAD:%.*]] = load <vscale x 16 x i8>, ptr [[TMP9]], align 1 |
| ; NO-VP-NEXT: [[TMP10:%.*]] = udiv <vscale x 16 x i8> [[WIDE_LOAD]], splat (i8 3) |
| ; NO-VP-NEXT: [[TMP11:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 [[INDEX]] |
| ; NO-VP-NEXT: store <vscale x 16 x i8> [[TMP10]], ptr [[TMP11]], align 1 |
| ; NO-VP-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP6]] |
| ; NO-VP-NEXT: [[TMP12:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] |
| ; NO-VP-NEXT: br i1 [[TMP12]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP22:![0-9]+]] |
| ; NO-VP: [[MIDDLE_BLOCK]]: |
| ; NO-VP-NEXT: [[CMP_N:%.*]] = icmp eq i64 100, [[N_VEC]] |
| ; NO-VP-NEXT: br i1 [[CMP_N]], label %[[FINISH_LOOPEXIT:.*]], label %[[SCALAR_PH]] |
| ; NO-VP: [[SCALAR_PH]]: |
| ; NO-VP-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[LOOP_PREHEADER]] ], [ 0, %[[VECTOR_MEMCHECK]] ] |
| ; NO-VP-NEXT: br label %[[LOOP:.*]] |
| ; NO-VP: [[LOOP]]: |
| ; NO-VP-NEXT: [[LEN:%.*]] = phi i64 [ [[DEC:%.*]], %[[LOOP]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ] |
| ; NO-VP-NEXT: [[DEC]] = add nsw i64 [[LEN]], 1 |
| ; NO-VP-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 [[LEN]] |
| ; NO-VP-NEXT: [[TMP0:%.*]] = load i8, ptr [[ARRAYIDX]], align 1 |
| ; NO-VP-NEXT: [[TMP:%.*]] = udiv i8 [[TMP0]], 3 |
| ; NO-VP-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 [[LEN]] |
| ; NO-VP-NEXT: store i8 [[TMP]], ptr [[ARRAYIDX1]], align 1 |
| ; NO-VP-NEXT: [[DOTNOT:%.*]] = icmp eq i64 [[DEC]], 100 |
| ; NO-VP-NEXT: br i1 [[DOTNOT]], label %[[FINISH_LOOPEXIT]], label %[[LOOP]], !llvm.loop [[LOOP23:![0-9]+]] |
| ; NO-VP: [[FINISH_LOOPEXIT]]: |
| ; NO-VP-NEXT: ret void |
| ; |
| loop.preheader: |
| br label %loop |
| |
| loop: |
| %len = phi i64 [ %dec, %loop ], [ 0, %loop.preheader ] |
| %dec = add nsw i64 %len, 1 |
| %arrayidx = getelementptr inbounds i8, ptr %a, i64 %len |
| %0 = load i8, ptr %arrayidx, align 1 |
| %tmp = udiv i8 %0, 3 |
| %arrayidx1 = getelementptr inbounds i8, ptr %b, i64 %len |
| store i8 %tmp, ptr %arrayidx1, align 1 |
| %.not = icmp eq i64 %dec, 100 |
| br i1 %.not, label %finish.loopexit, label %loop |
| |
| finish.loopexit: |
| ret void |
| } |
| |
| define void @test_srem(ptr nocapture %a, ptr nocapture readonly %b) { |
| ; IF-EVL-LABEL: define void @test_srem( |
| ; IF-EVL-SAME: ptr captures(none) [[A:%.*]], ptr readonly captures(none) [[B:%.*]]) #[[ATTR0]] { |
| ; IF-EVL-NEXT: [[LOOP_PREHEADER:.*]]: |
| ; IF-EVL-NEXT: [[A2:%.*]] = ptrtoint ptr [[A]] to i64 |
| ; IF-EVL-NEXT: [[B1:%.*]] = ptrtoint ptr [[B]] to i64 |
| ; IF-EVL-NEXT: br i1 false, label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]] |
| ; IF-EVL: [[VECTOR_MEMCHECK]]: |
| ; IF-EVL-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() |
| ; IF-EVL-NEXT: [[TMP1:%.*]] = mul nuw i64 [[TMP0]], 16 |
| ; IF-EVL-NEXT: [[TMP2:%.*]] = sub i64 [[B1]], [[A2]] |
| ; IF-EVL-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP2]], [[TMP1]] |
| ; IF-EVL-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]] |
| ; IF-EVL: [[VECTOR_PH]]: |
| ; IF-EVL-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; IF-EVL: [[VECTOR_BODY]]: |
| ; IF-EVL-NEXT: [[EVL_BASED_IV:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_EVL_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; IF-EVL-NEXT: [[TMP10:%.*]] = phi i64 [ 100, %[[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; IF-EVL-NEXT: [[TMP11:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[TMP10]], i32 16, i1 true) |
| ; IF-EVL-NEXT: [[TMP13:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 [[EVL_BASED_IV]] |
| ; IF-EVL-NEXT: [[VP_OP_LOAD:%.*]] = call <vscale x 16 x i8> @llvm.vp.load.nxv16i8.p0(ptr align 1 [[TMP13]], <vscale x 16 x i1> splat (i1 true), i32 [[TMP11]]) |
| ; IF-EVL-NEXT: [[VP_OP:%.*]] = srem <vscale x 16 x i8> [[VP_OP_LOAD]], splat (i8 3) |
| ; IF-EVL-NEXT: [[TMP16:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 [[EVL_BASED_IV]] |
| ; IF-EVL-NEXT: call void @llvm.vp.store.nxv16i8.p0(<vscale x 16 x i8> [[VP_OP]], ptr align 1 [[TMP16]], <vscale x 16 x i1> splat (i1 true), i32 [[TMP11]]) |
| ; IF-EVL-NEXT: [[TMP18:%.*]] = zext i32 [[TMP11]] to i64 |
| ; IF-EVL-NEXT: [[INDEX_EVL_NEXT]] = add nuw i64 [[TMP18]], [[EVL_BASED_IV]] |
| ; IF-EVL-NEXT: [[AVL_NEXT]] = sub nuw i64 [[TMP10]], [[TMP18]] |
| ; IF-EVL-NEXT: [[TMP14:%.*]] = icmp eq i64 [[AVL_NEXT]], 0 |
| ; IF-EVL-NEXT: br i1 [[TMP14]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP25:![0-9]+]] |
| ; IF-EVL: [[MIDDLE_BLOCK]]: |
| ; IF-EVL-NEXT: br label %[[FINISH_LOOPEXIT:.*]] |
| ; IF-EVL: [[SCALAR_PH]]: |
| ; IF-EVL-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 0, %[[LOOP_PREHEADER]] ], [ 0, %[[VECTOR_MEMCHECK]] ] |
| ; IF-EVL-NEXT: br label %[[LOOP:.*]] |
| ; IF-EVL: [[LOOP]]: |
| ; IF-EVL-NEXT: [[LEN:%.*]] = phi i64 [ [[DEC:%.*]], %[[LOOP]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ] |
| ; IF-EVL-NEXT: [[DEC]] = add nsw i64 [[LEN]], 1 |
| ; IF-EVL-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 [[LEN]] |
| ; IF-EVL-NEXT: [[TMP20:%.*]] = load i8, ptr [[ARRAYIDX]], align 1 |
| ; IF-EVL-NEXT: [[TMP:%.*]] = srem i8 [[TMP20]], 3 |
| ; IF-EVL-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 [[LEN]] |
| ; IF-EVL-NEXT: store i8 [[TMP]], ptr [[ARRAYIDX1]], align 1 |
| ; IF-EVL-NEXT: [[DOTNOT:%.*]] = icmp eq i64 [[DEC]], 100 |
| ; IF-EVL-NEXT: br i1 [[DOTNOT]], label %[[FINISH_LOOPEXIT]], label %[[LOOP]], !llvm.loop [[LOOP26:![0-9]+]] |
| ; IF-EVL: [[FINISH_LOOPEXIT]]: |
| ; IF-EVL-NEXT: ret void |
| ; |
| ; NO-VP-LABEL: define void @test_srem( |
| ; NO-VP-SAME: ptr captures(none) [[A:%.*]], ptr readonly captures(none) [[B:%.*]]) #[[ATTR0]] { |
| ; NO-VP-NEXT: [[LOOP_PREHEADER:.*]]: |
| ; NO-VP-NEXT: [[A2:%.*]] = ptrtoint ptr [[A]] to i64 |
| ; NO-VP-NEXT: [[B1:%.*]] = ptrtoint ptr [[B]] to i64 |
| ; NO-VP-NEXT: [[TMP7:%.*]] = call i64 @llvm.vscale.i64() |
| ; NO-VP-NEXT: [[TMP1:%.*]] = shl nuw i64 [[TMP7]], 4 |
| ; NO-VP-NEXT: [[TMP14:%.*]] = call i64 @llvm.umax.i64(i64 [[TMP1]], i64 32) |
| ; NO-VP-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 100, [[TMP14]] |
| ; NO-VP-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]] |
| ; NO-VP: [[VECTOR_MEMCHECK]]: |
| ; NO-VP-NEXT: [[TMP2:%.*]] = call i64 @llvm.vscale.i64() |
| ; NO-VP-NEXT: [[TMP3:%.*]] = mul nuw i64 [[TMP2]], 16 |
| ; NO-VP-NEXT: [[TMP4:%.*]] = sub i64 [[B1]], [[A2]] |
| ; NO-VP-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP4]], [[TMP3]] |
| ; NO-VP-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]] |
| ; NO-VP: [[VECTOR_PH]]: |
| ; NO-VP-NEXT: [[TMP5:%.*]] = call i64 @llvm.vscale.i64() |
| ; NO-VP-NEXT: [[TMP6:%.*]] = mul nuw i64 [[TMP5]], 16 |
| ; NO-VP-NEXT: [[N_MOD_VF:%.*]] = urem i64 100, [[TMP6]] |
| ; NO-VP-NEXT: [[N_VEC:%.*]] = sub i64 100, [[N_MOD_VF]] |
| ; NO-VP-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; NO-VP: [[VECTOR_BODY]]: |
| ; NO-VP-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; NO-VP-NEXT: [[TMP9:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 [[INDEX]] |
| ; NO-VP-NEXT: [[WIDE_LOAD:%.*]] = load <vscale x 16 x i8>, ptr [[TMP9]], align 1 |
| ; NO-VP-NEXT: [[TMP10:%.*]] = srem <vscale x 16 x i8> [[WIDE_LOAD]], splat (i8 3) |
| ; NO-VP-NEXT: [[TMP11:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 [[INDEX]] |
| ; NO-VP-NEXT: store <vscale x 16 x i8> [[TMP10]], ptr [[TMP11]], align 1 |
| ; NO-VP-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP6]] |
| ; NO-VP-NEXT: [[TMP12:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] |
| ; NO-VP-NEXT: br i1 [[TMP12]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP24:![0-9]+]] |
| ; NO-VP: [[MIDDLE_BLOCK]]: |
| ; NO-VP-NEXT: [[CMP_N:%.*]] = icmp eq i64 100, [[N_VEC]] |
| ; NO-VP-NEXT: br i1 [[CMP_N]], label %[[FINISH_LOOPEXIT:.*]], label %[[SCALAR_PH]] |
| ; NO-VP: [[SCALAR_PH]]: |
| ; NO-VP-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[LOOP_PREHEADER]] ], [ 0, %[[VECTOR_MEMCHECK]] ] |
| ; NO-VP-NEXT: br label %[[LOOP:.*]] |
| ; NO-VP: [[LOOP]]: |
| ; NO-VP-NEXT: [[LEN:%.*]] = phi i64 [ [[DEC:%.*]], %[[LOOP]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ] |
| ; NO-VP-NEXT: [[DEC]] = add nsw i64 [[LEN]], 1 |
| ; NO-VP-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 [[LEN]] |
| ; NO-VP-NEXT: [[TMP0:%.*]] = load i8, ptr [[ARRAYIDX]], align 1 |
| ; NO-VP-NEXT: [[TMP:%.*]] = srem i8 [[TMP0]], 3 |
| ; NO-VP-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 [[LEN]] |
| ; NO-VP-NEXT: store i8 [[TMP]], ptr [[ARRAYIDX1]], align 1 |
| ; NO-VP-NEXT: [[DOTNOT:%.*]] = icmp eq i64 [[DEC]], 100 |
| ; NO-VP-NEXT: br i1 [[DOTNOT]], label %[[FINISH_LOOPEXIT]], label %[[LOOP]], !llvm.loop [[LOOP25:![0-9]+]] |
| ; NO-VP: [[FINISH_LOOPEXIT]]: |
| ; NO-VP-NEXT: ret void |
| ; |
| loop.preheader: |
| br label %loop |
| |
| loop: |
| %len = phi i64 [ %dec, %loop ], [ 0, %loop.preheader ] |
| %dec = add nsw i64 %len, 1 |
| %arrayidx = getelementptr inbounds i8, ptr %a, i64 %len |
| %0 = load i8, ptr %arrayidx, align 1 |
| %tmp = srem i8 %0, 3 |
| %arrayidx1 = getelementptr inbounds i8, ptr %b, i64 %len |
| store i8 %tmp, ptr %arrayidx1, align 1 |
| %.not = icmp eq i64 %dec, 100 |
| br i1 %.not, label %finish.loopexit, label %loop |
| |
| finish.loopexit: |
| ret void |
| } |
| |
| define void @test_urem(ptr nocapture %a, ptr nocapture readonly %b) { |
| ; IF-EVL-LABEL: define void @test_urem( |
| ; IF-EVL-SAME: ptr captures(none) [[A:%.*]], ptr readonly captures(none) [[B:%.*]]) #[[ATTR0]] { |
| ; IF-EVL-NEXT: [[LOOP_PREHEADER:.*]]: |
| ; IF-EVL-NEXT: [[A2:%.*]] = ptrtoint ptr [[A]] to i64 |
| ; IF-EVL-NEXT: [[B1:%.*]] = ptrtoint ptr [[B]] to i64 |
| ; IF-EVL-NEXT: br i1 false, label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]] |
| ; IF-EVL: [[VECTOR_MEMCHECK]]: |
| ; IF-EVL-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() |
| ; IF-EVL-NEXT: [[TMP1:%.*]] = mul nuw i64 [[TMP0]], 16 |
| ; IF-EVL-NEXT: [[TMP2:%.*]] = sub i64 [[B1]], [[A2]] |
| ; IF-EVL-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP2]], [[TMP1]] |
| ; IF-EVL-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]] |
| ; IF-EVL: [[VECTOR_PH]]: |
| ; IF-EVL-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; IF-EVL: [[VECTOR_BODY]]: |
| ; IF-EVL-NEXT: [[EVL_BASED_IV:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_EVL_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; IF-EVL-NEXT: [[TMP10:%.*]] = phi i64 [ 100, %[[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; IF-EVL-NEXT: [[TMP11:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[TMP10]], i32 16, i1 true) |
| ; IF-EVL-NEXT: [[TMP13:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 [[EVL_BASED_IV]] |
| ; IF-EVL-NEXT: [[VP_OP_LOAD:%.*]] = call <vscale x 16 x i8> @llvm.vp.load.nxv16i8.p0(ptr align 1 [[TMP13]], <vscale x 16 x i1> splat (i1 true), i32 [[TMP11]]) |
| ; IF-EVL-NEXT: [[VP_OP:%.*]] = urem <vscale x 16 x i8> [[VP_OP_LOAD]], splat (i8 3) |
| ; IF-EVL-NEXT: [[TMP16:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 [[EVL_BASED_IV]] |
| ; IF-EVL-NEXT: call void @llvm.vp.store.nxv16i8.p0(<vscale x 16 x i8> [[VP_OP]], ptr align 1 [[TMP16]], <vscale x 16 x i1> splat (i1 true), i32 [[TMP11]]) |
| ; IF-EVL-NEXT: [[TMP18:%.*]] = zext i32 [[TMP11]] to i64 |
| ; IF-EVL-NEXT: [[INDEX_EVL_NEXT]] = add nuw i64 [[TMP18]], [[EVL_BASED_IV]] |
| ; IF-EVL-NEXT: [[AVL_NEXT]] = sub nuw i64 [[TMP10]], [[TMP18]] |
| ; IF-EVL-NEXT: [[TMP14:%.*]] = icmp eq i64 [[AVL_NEXT]], 0 |
| ; IF-EVL-NEXT: br i1 [[TMP14]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP27:![0-9]+]] |
| ; IF-EVL: [[MIDDLE_BLOCK]]: |
| ; IF-EVL-NEXT: br label %[[FINISH_LOOPEXIT:.*]] |
| ; IF-EVL: [[SCALAR_PH]]: |
| ; IF-EVL-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 0, %[[LOOP_PREHEADER]] ], [ 0, %[[VECTOR_MEMCHECK]] ] |
| ; IF-EVL-NEXT: br label %[[LOOP:.*]] |
| ; IF-EVL: [[LOOP]]: |
| ; IF-EVL-NEXT: [[LEN:%.*]] = phi i64 [ [[DEC:%.*]], %[[LOOP]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ] |
| ; IF-EVL-NEXT: [[DEC]] = add nsw i64 [[LEN]], 1 |
| ; IF-EVL-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 [[LEN]] |
| ; IF-EVL-NEXT: [[TMP20:%.*]] = load i8, ptr [[ARRAYIDX]], align 1 |
| ; IF-EVL-NEXT: [[TMP:%.*]] = urem i8 [[TMP20]], 3 |
| ; IF-EVL-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 [[LEN]] |
| ; IF-EVL-NEXT: store i8 [[TMP]], ptr [[ARRAYIDX1]], align 1 |
| ; IF-EVL-NEXT: [[DOTNOT:%.*]] = icmp eq i64 [[DEC]], 100 |
| ; IF-EVL-NEXT: br i1 [[DOTNOT]], label %[[FINISH_LOOPEXIT]], label %[[LOOP]], !llvm.loop [[LOOP28:![0-9]+]] |
| ; IF-EVL: [[FINISH_LOOPEXIT]]: |
| ; IF-EVL-NEXT: ret void |
| ; |
| ; NO-VP-LABEL: define void @test_urem( |
| ; NO-VP-SAME: ptr captures(none) [[A:%.*]], ptr readonly captures(none) [[B:%.*]]) #[[ATTR0]] { |
| ; NO-VP-NEXT: [[LOOP_PREHEADER:.*]]: |
| ; NO-VP-NEXT: [[A2:%.*]] = ptrtoint ptr [[A]] to i64 |
| ; NO-VP-NEXT: [[B1:%.*]] = ptrtoint ptr [[B]] to i64 |
| ; NO-VP-NEXT: [[TMP7:%.*]] = call i64 @llvm.vscale.i64() |
| ; NO-VP-NEXT: [[TMP1:%.*]] = shl nuw i64 [[TMP7]], 4 |
| ; NO-VP-NEXT: [[TMP14:%.*]] = call i64 @llvm.umax.i64(i64 [[TMP1]], i64 32) |
| ; NO-VP-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 100, [[TMP14]] |
| ; NO-VP-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]] |
| ; NO-VP: [[VECTOR_MEMCHECK]]: |
| ; NO-VP-NEXT: [[TMP2:%.*]] = call i64 @llvm.vscale.i64() |
| ; NO-VP-NEXT: [[TMP3:%.*]] = mul nuw i64 [[TMP2]], 16 |
| ; NO-VP-NEXT: [[TMP4:%.*]] = sub i64 [[B1]], [[A2]] |
| ; NO-VP-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP4]], [[TMP3]] |
| ; NO-VP-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]] |
| ; NO-VP: [[VECTOR_PH]]: |
| ; NO-VP-NEXT: [[TMP5:%.*]] = call i64 @llvm.vscale.i64() |
| ; NO-VP-NEXT: [[TMP6:%.*]] = mul nuw i64 [[TMP5]], 16 |
| ; NO-VP-NEXT: [[N_MOD_VF:%.*]] = urem i64 100, [[TMP6]] |
| ; NO-VP-NEXT: [[N_VEC:%.*]] = sub i64 100, [[N_MOD_VF]] |
| ; NO-VP-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; NO-VP: [[VECTOR_BODY]]: |
| ; NO-VP-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; NO-VP-NEXT: [[TMP9:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 [[INDEX]] |
| ; NO-VP-NEXT: [[WIDE_LOAD:%.*]] = load <vscale x 16 x i8>, ptr [[TMP9]], align 1 |
| ; NO-VP-NEXT: [[TMP10:%.*]] = urem <vscale x 16 x i8> [[WIDE_LOAD]], splat (i8 3) |
| ; NO-VP-NEXT: [[TMP11:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 [[INDEX]] |
| ; NO-VP-NEXT: store <vscale x 16 x i8> [[TMP10]], ptr [[TMP11]], align 1 |
| ; NO-VP-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP6]] |
| ; NO-VP-NEXT: [[TMP12:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] |
| ; NO-VP-NEXT: br i1 [[TMP12]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP26:![0-9]+]] |
| ; NO-VP: [[MIDDLE_BLOCK]]: |
| ; NO-VP-NEXT: [[CMP_N:%.*]] = icmp eq i64 100, [[N_VEC]] |
| ; NO-VP-NEXT: br i1 [[CMP_N]], label %[[FINISH_LOOPEXIT:.*]], label %[[SCALAR_PH]] |
| ; NO-VP: [[SCALAR_PH]]: |
| ; NO-VP-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[LOOP_PREHEADER]] ], [ 0, %[[VECTOR_MEMCHECK]] ] |
| ; NO-VP-NEXT: br label %[[LOOP:.*]] |
| ; NO-VP: [[LOOP]]: |
| ; NO-VP-NEXT: [[LEN:%.*]] = phi i64 [ [[DEC:%.*]], %[[LOOP]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ] |
| ; NO-VP-NEXT: [[DEC]] = add nsw i64 [[LEN]], 1 |
| ; NO-VP-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 [[LEN]] |
| ; NO-VP-NEXT: [[TMP0:%.*]] = load i8, ptr [[ARRAYIDX]], align 1 |
| ; NO-VP-NEXT: [[TMP:%.*]] = urem i8 [[TMP0]], 3 |
| ; NO-VP-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 [[LEN]] |
| ; NO-VP-NEXT: store i8 [[TMP]], ptr [[ARRAYIDX1]], align 1 |
| ; NO-VP-NEXT: [[DOTNOT:%.*]] = icmp eq i64 [[DEC]], 100 |
| ; NO-VP-NEXT: br i1 [[DOTNOT]], label %[[FINISH_LOOPEXIT]], label %[[LOOP]], !llvm.loop [[LOOP27:![0-9]+]] |
| ; NO-VP: [[FINISH_LOOPEXIT]]: |
| ; NO-VP-NEXT: ret void |
| ; |
| loop.preheader: |
| br label %loop |
| |
| loop: |
| %len = phi i64 [ %dec, %loop ], [ 0, %loop.preheader ] |
| %dec = add nsw i64 %len, 1 |
| %arrayidx = getelementptr inbounds i8, ptr %a, i64 %len |
| %0 = load i8, ptr %arrayidx, align 1 |
| %tmp = urem i8 %0, 3 |
| %arrayidx1 = getelementptr inbounds i8, ptr %b, i64 %len |
| store i8 %tmp, ptr %arrayidx1, align 1 |
| %.not = icmp eq i64 %dec, 100 |
| br i1 %.not, label %finish.loopexit, label %loop |
| |
| finish.loopexit: |
| ret void |
| } |
| |
| ; Floating point tests |
| |
| define void @test_fadd(ptr nocapture %a, ptr nocapture readonly %b) { |
| ; IF-EVL-LABEL: define void @test_fadd( |
| ; IF-EVL-SAME: ptr captures(none) [[A:%.*]], ptr readonly captures(none) [[B:%.*]]) #[[ATTR0]] { |
| ; IF-EVL-NEXT: [[LOOP_PREHEADER:.*]]: |
| ; IF-EVL-NEXT: [[A2:%.*]] = ptrtoint ptr [[A]] to i64 |
| ; IF-EVL-NEXT: [[B1:%.*]] = ptrtoint ptr [[B]] to i64 |
| ; IF-EVL-NEXT: br i1 false, label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]] |
| ; IF-EVL: [[VECTOR_MEMCHECK]]: |
| ; IF-EVL-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() |
| ; IF-EVL-NEXT: [[TMP1:%.*]] = mul nuw i64 [[TMP0]], 4 |
| ; IF-EVL-NEXT: [[TMP2:%.*]] = mul i64 [[TMP1]], 4 |
| ; IF-EVL-NEXT: [[TMP3:%.*]] = sub i64 [[B1]], [[A2]] |
| ; IF-EVL-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP3]], [[TMP2]] |
| ; IF-EVL-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]] |
| ; IF-EVL: [[VECTOR_PH]]: |
| ; IF-EVL-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; IF-EVL: [[VECTOR_BODY]]: |
| ; IF-EVL-NEXT: [[EVL_BASED_IV:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_EVL_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; IF-EVL-NEXT: [[TMP11:%.*]] = phi i64 [ 100, %[[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; IF-EVL-NEXT: [[TMP12:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[TMP11]], i32 4, i1 true) |
| ; IF-EVL-NEXT: [[TMP14:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[EVL_BASED_IV]] |
| ; IF-EVL-NEXT: [[VP_OP_LOAD:%.*]] = call <vscale x 4 x float> @llvm.vp.load.nxv4f32.p0(ptr align 4 [[TMP14]], <vscale x 4 x i1> splat (i1 true), i32 [[TMP12]]) |
| ; IF-EVL-NEXT: [[VP_OP:%.*]] = fadd fast <vscale x 4 x float> [[VP_OP_LOAD]], splat (float 3.000000e+00) |
| ; IF-EVL-NEXT: [[TMP17:%.*]] = getelementptr inbounds float, ptr [[B]], i64 [[EVL_BASED_IV]] |
| ; IF-EVL-NEXT: call void @llvm.vp.store.nxv4f32.p0(<vscale x 4 x float> [[VP_OP]], ptr align 4 [[TMP17]], <vscale x 4 x i1> splat (i1 true), i32 [[TMP12]]) |
| ; IF-EVL-NEXT: [[TMP19:%.*]] = zext i32 [[TMP12]] to i64 |
| ; IF-EVL-NEXT: [[INDEX_EVL_NEXT]] = add nuw i64 [[TMP19]], [[EVL_BASED_IV]] |
| ; IF-EVL-NEXT: [[AVL_NEXT]] = sub nuw i64 [[TMP11]], [[TMP19]] |
| ; IF-EVL-NEXT: [[TMP15:%.*]] = icmp eq i64 [[AVL_NEXT]], 0 |
| ; IF-EVL-NEXT: br i1 [[TMP15]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP29:![0-9]+]] |
| ; IF-EVL: [[MIDDLE_BLOCK]]: |
| ; IF-EVL-NEXT: br label %[[FINISH_LOOPEXIT:.*]] |
| ; IF-EVL: [[SCALAR_PH]]: |
| ; IF-EVL-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 0, %[[LOOP_PREHEADER]] ], [ 0, %[[VECTOR_MEMCHECK]] ] |
| ; IF-EVL-NEXT: br label %[[LOOP:.*]] |
| ; IF-EVL: [[LOOP]]: |
| ; IF-EVL-NEXT: [[LEN:%.*]] = phi i64 [ [[DEC:%.*]], %[[LOOP]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ] |
| ; IF-EVL-NEXT: [[DEC]] = add nsw i64 [[LEN]], 1 |
| ; IF-EVL-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[LEN]] |
| ; IF-EVL-NEXT: [[TMP21:%.*]] = load float, ptr [[ARRAYIDX]], align 4 |
| ; IF-EVL-NEXT: [[TMP:%.*]] = fadd fast float [[TMP21]], 3.000000e+00 |
| ; IF-EVL-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds float, ptr [[B]], i64 [[LEN]] |
| ; IF-EVL-NEXT: store float [[TMP]], ptr [[ARRAYIDX1]], align 4 |
| ; IF-EVL-NEXT: [[DOTNOT:%.*]] = icmp eq i64 [[DEC]], 100 |
| ; IF-EVL-NEXT: br i1 [[DOTNOT]], label %[[FINISH_LOOPEXIT]], label %[[LOOP]], !llvm.loop [[LOOP30:![0-9]+]] |
| ; IF-EVL: [[FINISH_LOOPEXIT]]: |
| ; IF-EVL-NEXT: ret void |
| ; |
| ; NO-VP-LABEL: define void @test_fadd( |
| ; NO-VP-SAME: ptr captures(none) [[A:%.*]], ptr readonly captures(none) [[B:%.*]]) #[[ATTR0]] { |
| ; NO-VP-NEXT: [[LOOP_PREHEADER:.*]]: |
| ; NO-VP-NEXT: [[A2:%.*]] = ptrtoint ptr [[A]] to i64 |
| ; NO-VP-NEXT: [[B1:%.*]] = ptrtoint ptr [[B]] to i64 |
| ; NO-VP-NEXT: [[TMP9:%.*]] = call i64 @llvm.vscale.i64() |
| ; NO-VP-NEXT: [[TMP1:%.*]] = shl nuw i64 [[TMP9]], 2 |
| ; NO-VP-NEXT: [[TMP2:%.*]] = call i64 @llvm.umax.i64(i64 [[TMP1]], i64 16) |
| ; NO-VP-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 100, [[TMP2]] |
| ; NO-VP-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]] |
| ; NO-VP: [[VECTOR_MEMCHECK]]: |
| ; NO-VP-NEXT: [[TMP3:%.*]] = call i64 @llvm.vscale.i64() |
| ; NO-VP-NEXT: [[TMP4:%.*]] = mul nuw i64 [[TMP3]], 4 |
| ; NO-VP-NEXT: [[TMP5:%.*]] = mul i64 [[TMP4]], 4 |
| ; NO-VP-NEXT: [[TMP6:%.*]] = sub i64 [[B1]], [[A2]] |
| ; NO-VP-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP6]], [[TMP5]] |
| ; NO-VP-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]] |
| ; NO-VP: [[VECTOR_PH]]: |
| ; NO-VP-NEXT: [[TMP7:%.*]] = call i64 @llvm.vscale.i64() |
| ; NO-VP-NEXT: [[TMP8:%.*]] = mul nuw i64 [[TMP7]], 4 |
| ; NO-VP-NEXT: [[N_MOD_VF:%.*]] = urem i64 100, [[TMP8]] |
| ; NO-VP-NEXT: [[N_VEC:%.*]] = sub i64 100, [[N_MOD_VF]] |
| ; NO-VP-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; NO-VP: [[VECTOR_BODY]]: |
| ; NO-VP-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; NO-VP-NEXT: [[TMP11:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[INDEX]] |
| ; NO-VP-NEXT: [[WIDE_LOAD:%.*]] = load <vscale x 4 x float>, ptr [[TMP11]], align 4 |
| ; NO-VP-NEXT: [[TMP12:%.*]] = fadd fast <vscale x 4 x float> [[WIDE_LOAD]], splat (float 3.000000e+00) |
| ; NO-VP-NEXT: [[TMP13:%.*]] = getelementptr inbounds float, ptr [[B]], i64 [[INDEX]] |
| ; NO-VP-NEXT: store <vscale x 4 x float> [[TMP12]], ptr [[TMP13]], align 4 |
| ; NO-VP-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP8]] |
| ; NO-VP-NEXT: [[TMP14:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] |
| ; NO-VP-NEXT: br i1 [[TMP14]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP28:![0-9]+]] |
| ; NO-VP: [[MIDDLE_BLOCK]]: |
| ; NO-VP-NEXT: [[CMP_N:%.*]] = icmp eq i64 100, [[N_VEC]] |
| ; NO-VP-NEXT: br i1 [[CMP_N]], label %[[FINISH_LOOPEXIT:.*]], label %[[SCALAR_PH]] |
| ; NO-VP: [[SCALAR_PH]]: |
| ; NO-VP-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[LOOP_PREHEADER]] ], [ 0, %[[VECTOR_MEMCHECK]] ] |
| ; NO-VP-NEXT: br label %[[LOOP:.*]] |
| ; NO-VP: [[LOOP]]: |
| ; NO-VP-NEXT: [[LEN:%.*]] = phi i64 [ [[DEC:%.*]], %[[LOOP]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ] |
| ; NO-VP-NEXT: [[DEC]] = add nsw i64 [[LEN]], 1 |
| ; NO-VP-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[LEN]] |
| ; NO-VP-NEXT: [[TMP0:%.*]] = load float, ptr [[ARRAYIDX]], align 4 |
| ; NO-VP-NEXT: [[TMP:%.*]] = fadd fast float [[TMP0]], 3.000000e+00 |
| ; NO-VP-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds float, ptr [[B]], i64 [[LEN]] |
| ; NO-VP-NEXT: store float [[TMP]], ptr [[ARRAYIDX1]], align 4 |
| ; NO-VP-NEXT: [[DOTNOT:%.*]] = icmp eq i64 [[DEC]], 100 |
| ; NO-VP-NEXT: br i1 [[DOTNOT]], label %[[FINISH_LOOPEXIT]], label %[[LOOP]], !llvm.loop [[LOOP29:![0-9]+]] |
| ; NO-VP: [[FINISH_LOOPEXIT]]: |
| ; NO-VP-NEXT: ret void |
| ; |
| loop.preheader: |
| br label %loop |
| |
| loop: |
| %len = phi i64 [ %dec, %loop ], [ 0, %loop.preheader ] |
| %dec = add nsw i64 %len, 1 |
| %arrayidx = getelementptr inbounds float, ptr %a, i64 %len |
| %0 = load float, ptr %arrayidx, align 4 |
| %tmp = fadd fast float %0, 3.000000e+00 |
| %arrayidx1 = getelementptr inbounds float, ptr %b, i64 %len |
| store float %tmp, ptr %arrayidx1, align 4 |
| %.not = icmp eq i64 %dec, 100 |
| br i1 %.not, label %finish.loopexit, label %loop |
| |
| finish.loopexit: |
| ret void |
| } |
| |
| define void @test_fsub(ptr nocapture %a, ptr nocapture readonly %b) { |
| ; IF-EVL-LABEL: define void @test_fsub( |
| ; IF-EVL-SAME: ptr captures(none) [[A:%.*]], ptr readonly captures(none) [[B:%.*]]) #[[ATTR0]] { |
| ; IF-EVL-NEXT: [[LOOP_PREHEADER:.*]]: |
| ; IF-EVL-NEXT: [[A2:%.*]] = ptrtoint ptr [[A]] to i64 |
| ; IF-EVL-NEXT: [[B1:%.*]] = ptrtoint ptr [[B]] to i64 |
| ; IF-EVL-NEXT: br i1 false, label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]] |
| ; IF-EVL: [[VECTOR_MEMCHECK]]: |
| ; IF-EVL-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() |
| ; IF-EVL-NEXT: [[TMP1:%.*]] = mul nuw i64 [[TMP0]], 4 |
| ; IF-EVL-NEXT: [[TMP2:%.*]] = mul i64 [[TMP1]], 4 |
| ; IF-EVL-NEXT: [[TMP3:%.*]] = sub i64 [[B1]], [[A2]] |
| ; IF-EVL-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP3]], [[TMP2]] |
| ; IF-EVL-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]] |
| ; IF-EVL: [[VECTOR_PH]]: |
| ; IF-EVL-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; IF-EVL: [[VECTOR_BODY]]: |
| ; IF-EVL-NEXT: [[EVL_BASED_IV:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_EVL_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; IF-EVL-NEXT: [[TMP11:%.*]] = phi i64 [ 100, %[[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; IF-EVL-NEXT: [[TMP12:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[TMP11]], i32 4, i1 true) |
| ; IF-EVL-NEXT: [[TMP14:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[EVL_BASED_IV]] |
| ; IF-EVL-NEXT: [[VP_OP_LOAD:%.*]] = call <vscale x 4 x float> @llvm.vp.load.nxv4f32.p0(ptr align 4 [[TMP14]], <vscale x 4 x i1> splat (i1 true), i32 [[TMP12]]) |
| ; IF-EVL-NEXT: [[VP_OP:%.*]] = fsub fast <vscale x 4 x float> [[VP_OP_LOAD]], splat (float 3.000000e+00) |
| ; IF-EVL-NEXT: [[TMP17:%.*]] = getelementptr inbounds float, ptr [[B]], i64 [[EVL_BASED_IV]] |
| ; IF-EVL-NEXT: call void @llvm.vp.store.nxv4f32.p0(<vscale x 4 x float> [[VP_OP]], ptr align 4 [[TMP17]], <vscale x 4 x i1> splat (i1 true), i32 [[TMP12]]) |
| ; IF-EVL-NEXT: [[TMP19:%.*]] = zext i32 [[TMP12]] to i64 |
| ; IF-EVL-NEXT: [[INDEX_EVL_NEXT]] = add nuw i64 [[TMP19]], [[EVL_BASED_IV]] |
| ; IF-EVL-NEXT: [[AVL_NEXT]] = sub nuw i64 [[TMP11]], [[TMP19]] |
| ; IF-EVL-NEXT: [[TMP15:%.*]] = icmp eq i64 [[AVL_NEXT]], 0 |
| ; IF-EVL-NEXT: br i1 [[TMP15]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP31:![0-9]+]] |
| ; IF-EVL: [[MIDDLE_BLOCK]]: |
| ; IF-EVL-NEXT: br label %[[FINISH_LOOPEXIT:.*]] |
| ; IF-EVL: [[SCALAR_PH]]: |
| ; IF-EVL-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 0, %[[LOOP_PREHEADER]] ], [ 0, %[[VECTOR_MEMCHECK]] ] |
| ; IF-EVL-NEXT: br label %[[LOOP:.*]] |
| ; IF-EVL: [[LOOP]]: |
| ; IF-EVL-NEXT: [[LEN:%.*]] = phi i64 [ [[DEC:%.*]], %[[LOOP]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ] |
| ; IF-EVL-NEXT: [[DEC]] = add nsw i64 [[LEN]], 1 |
| ; IF-EVL-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[LEN]] |
| ; IF-EVL-NEXT: [[TMP21:%.*]] = load float, ptr [[ARRAYIDX]], align 4 |
| ; IF-EVL-NEXT: [[TMP:%.*]] = fsub fast float [[TMP21]], 3.000000e+00 |
| ; IF-EVL-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds float, ptr [[B]], i64 [[LEN]] |
| ; IF-EVL-NEXT: store float [[TMP]], ptr [[ARRAYIDX1]], align 4 |
| ; IF-EVL-NEXT: [[DOTNOT:%.*]] = icmp eq i64 [[DEC]], 100 |
| ; IF-EVL-NEXT: br i1 [[DOTNOT]], label %[[FINISH_LOOPEXIT]], label %[[LOOP]], !llvm.loop [[LOOP32:![0-9]+]] |
| ; IF-EVL: [[FINISH_LOOPEXIT]]: |
| ; IF-EVL-NEXT: ret void |
| ; |
| ; NO-VP-LABEL: define void @test_fsub( |
| ; NO-VP-SAME: ptr captures(none) [[A:%.*]], ptr readonly captures(none) [[B:%.*]]) #[[ATTR0]] { |
| ; NO-VP-NEXT: [[LOOP_PREHEADER:.*]]: |
| ; NO-VP-NEXT: [[A2:%.*]] = ptrtoint ptr [[A]] to i64 |
| ; NO-VP-NEXT: [[B1:%.*]] = ptrtoint ptr [[B]] to i64 |
| ; NO-VP-NEXT: [[TMP9:%.*]] = call i64 @llvm.vscale.i64() |
| ; NO-VP-NEXT: [[TMP1:%.*]] = shl nuw i64 [[TMP9]], 2 |
| ; NO-VP-NEXT: [[TMP2:%.*]] = call i64 @llvm.umax.i64(i64 [[TMP1]], i64 16) |
| ; NO-VP-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 100, [[TMP2]] |
| ; NO-VP-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]] |
| ; NO-VP: [[VECTOR_MEMCHECK]]: |
| ; NO-VP-NEXT: [[TMP3:%.*]] = call i64 @llvm.vscale.i64() |
| ; NO-VP-NEXT: [[TMP4:%.*]] = mul nuw i64 [[TMP3]], 4 |
| ; NO-VP-NEXT: [[TMP5:%.*]] = mul i64 [[TMP4]], 4 |
| ; NO-VP-NEXT: [[TMP6:%.*]] = sub i64 [[B1]], [[A2]] |
| ; NO-VP-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP6]], [[TMP5]] |
| ; NO-VP-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]] |
| ; NO-VP: [[VECTOR_PH]]: |
| ; NO-VP-NEXT: [[TMP7:%.*]] = call i64 @llvm.vscale.i64() |
| ; NO-VP-NEXT: [[TMP8:%.*]] = mul nuw i64 [[TMP7]], 4 |
| ; NO-VP-NEXT: [[N_MOD_VF:%.*]] = urem i64 100, [[TMP8]] |
| ; NO-VP-NEXT: [[N_VEC:%.*]] = sub i64 100, [[N_MOD_VF]] |
| ; NO-VP-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; NO-VP: [[VECTOR_BODY]]: |
| ; NO-VP-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; NO-VP-NEXT: [[TMP11:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[INDEX]] |
| ; NO-VP-NEXT: [[WIDE_LOAD:%.*]] = load <vscale x 4 x float>, ptr [[TMP11]], align 4 |
| ; NO-VP-NEXT: [[TMP12:%.*]] = fsub fast <vscale x 4 x float> [[WIDE_LOAD]], splat (float 3.000000e+00) |
| ; NO-VP-NEXT: [[TMP13:%.*]] = getelementptr inbounds float, ptr [[B]], i64 [[INDEX]] |
| ; NO-VP-NEXT: store <vscale x 4 x float> [[TMP12]], ptr [[TMP13]], align 4 |
| ; NO-VP-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP8]] |
| ; NO-VP-NEXT: [[TMP14:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] |
| ; NO-VP-NEXT: br i1 [[TMP14]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP30:![0-9]+]] |
| ; NO-VP: [[MIDDLE_BLOCK]]: |
| ; NO-VP-NEXT: [[CMP_N:%.*]] = icmp eq i64 100, [[N_VEC]] |
| ; NO-VP-NEXT: br i1 [[CMP_N]], label %[[FINISH_LOOPEXIT:.*]], label %[[SCALAR_PH]] |
| ; NO-VP: [[SCALAR_PH]]: |
| ; NO-VP-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[LOOP_PREHEADER]] ], [ 0, %[[VECTOR_MEMCHECK]] ] |
| ; NO-VP-NEXT: br label %[[LOOP:.*]] |
| ; NO-VP: [[LOOP]]: |
| ; NO-VP-NEXT: [[LEN:%.*]] = phi i64 [ [[DEC:%.*]], %[[LOOP]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ] |
| ; NO-VP-NEXT: [[DEC]] = add nsw i64 [[LEN]], 1 |
| ; NO-VP-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[LEN]] |
| ; NO-VP-NEXT: [[TMP0:%.*]] = load float, ptr [[ARRAYIDX]], align 4 |
| ; NO-VP-NEXT: [[TMP:%.*]] = fsub fast float [[TMP0]], 3.000000e+00 |
| ; NO-VP-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds float, ptr [[B]], i64 [[LEN]] |
| ; NO-VP-NEXT: store float [[TMP]], ptr [[ARRAYIDX1]], align 4 |
| ; NO-VP-NEXT: [[DOTNOT:%.*]] = icmp eq i64 [[DEC]], 100 |
| ; NO-VP-NEXT: br i1 [[DOTNOT]], label %[[FINISH_LOOPEXIT]], label %[[LOOP]], !llvm.loop [[LOOP31:![0-9]+]] |
| ; NO-VP: [[FINISH_LOOPEXIT]]: |
| ; NO-VP-NEXT: ret void |
| ; |
| loop.preheader: |
| br label %loop |
| |
| loop: |
| %len = phi i64 [ %dec, %loop ], [ 0, %loop.preheader ] |
| %dec = add nsw i64 %len, 1 |
| %arrayidx = getelementptr inbounds float, ptr %a, i64 %len |
| %0 = load float, ptr %arrayidx, align 4 |
| %tmp = fsub fast float %0, 3.000000e+00 |
| %arrayidx1 = getelementptr inbounds float, ptr %b, i64 %len |
| store float %tmp, ptr %arrayidx1, align 4 |
| %.not = icmp eq i64 %dec, 100 |
| br i1 %.not, label %finish.loopexit, label %loop |
| |
| finish.loopexit: |
| ret void |
| } |
| |
| define void @test_fmul(ptr nocapture %a, ptr nocapture readonly %b) { |
| ; IF-EVL-LABEL: define void @test_fmul( |
| ; IF-EVL-SAME: ptr captures(none) [[A:%.*]], ptr readonly captures(none) [[B:%.*]]) #[[ATTR0]] { |
| ; IF-EVL-NEXT: [[LOOP_PREHEADER:.*]]: |
| ; IF-EVL-NEXT: [[A2:%.*]] = ptrtoint ptr [[A]] to i64 |
| ; IF-EVL-NEXT: [[B1:%.*]] = ptrtoint ptr [[B]] to i64 |
| ; IF-EVL-NEXT: br i1 false, label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]] |
| ; IF-EVL: [[VECTOR_MEMCHECK]]: |
| ; IF-EVL-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() |
| ; IF-EVL-NEXT: [[TMP1:%.*]] = mul nuw i64 [[TMP0]], 4 |
| ; IF-EVL-NEXT: [[TMP2:%.*]] = mul i64 [[TMP1]], 4 |
| ; IF-EVL-NEXT: [[TMP3:%.*]] = sub i64 [[B1]], [[A2]] |
| ; IF-EVL-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP3]], [[TMP2]] |
| ; IF-EVL-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]] |
| ; IF-EVL: [[VECTOR_PH]]: |
| ; IF-EVL-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; IF-EVL: [[VECTOR_BODY]]: |
| ; IF-EVL-NEXT: [[EVL_BASED_IV:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_EVL_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; IF-EVL-NEXT: [[TMP11:%.*]] = phi i64 [ 100, %[[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; IF-EVL-NEXT: [[TMP12:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[TMP11]], i32 4, i1 true) |
| ; IF-EVL-NEXT: [[TMP14:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[EVL_BASED_IV]] |
| ; IF-EVL-NEXT: [[VP_OP_LOAD:%.*]] = call <vscale x 4 x float> @llvm.vp.load.nxv4f32.p0(ptr align 4 [[TMP14]], <vscale x 4 x i1> splat (i1 true), i32 [[TMP12]]) |
| ; IF-EVL-NEXT: [[VP_OP:%.*]] = fmul fast <vscale x 4 x float> [[VP_OP_LOAD]], splat (float 3.000000e+00) |
| ; IF-EVL-NEXT: [[TMP17:%.*]] = getelementptr inbounds float, ptr [[B]], i64 [[EVL_BASED_IV]] |
| ; IF-EVL-NEXT: call void @llvm.vp.store.nxv4f32.p0(<vscale x 4 x float> [[VP_OP]], ptr align 4 [[TMP17]], <vscale x 4 x i1> splat (i1 true), i32 [[TMP12]]) |
| ; IF-EVL-NEXT: [[TMP19:%.*]] = zext i32 [[TMP12]] to i64 |
| ; IF-EVL-NEXT: [[INDEX_EVL_NEXT]] = add nuw i64 [[TMP19]], [[EVL_BASED_IV]] |
| ; IF-EVL-NEXT: [[AVL_NEXT]] = sub nuw i64 [[TMP11]], [[TMP19]] |
| ; IF-EVL-NEXT: [[TMP15:%.*]] = icmp eq i64 [[AVL_NEXT]], 0 |
| ; IF-EVL-NEXT: br i1 [[TMP15]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP33:![0-9]+]] |
| ; IF-EVL: [[MIDDLE_BLOCK]]: |
| ; IF-EVL-NEXT: br label %[[FINISH_LOOPEXIT:.*]] |
| ; IF-EVL: [[SCALAR_PH]]: |
| ; IF-EVL-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 0, %[[LOOP_PREHEADER]] ], [ 0, %[[VECTOR_MEMCHECK]] ] |
| ; IF-EVL-NEXT: br label %[[LOOP:.*]] |
| ; IF-EVL: [[LOOP]]: |
| ; IF-EVL-NEXT: [[LEN:%.*]] = phi i64 [ [[DEC:%.*]], %[[LOOP]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ] |
| ; IF-EVL-NEXT: [[DEC]] = add nsw i64 [[LEN]], 1 |
| ; IF-EVL-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[LEN]] |
| ; IF-EVL-NEXT: [[TMP21:%.*]] = load float, ptr [[ARRAYIDX]], align 4 |
| ; IF-EVL-NEXT: [[TMP:%.*]] = fmul fast float [[TMP21]], 3.000000e+00 |
| ; IF-EVL-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds float, ptr [[B]], i64 [[LEN]] |
| ; IF-EVL-NEXT: store float [[TMP]], ptr [[ARRAYIDX1]], align 4 |
| ; IF-EVL-NEXT: [[DOTNOT:%.*]] = icmp eq i64 [[DEC]], 100 |
| ; IF-EVL-NEXT: br i1 [[DOTNOT]], label %[[FINISH_LOOPEXIT]], label %[[LOOP]], !llvm.loop [[LOOP34:![0-9]+]] |
| ; IF-EVL: [[FINISH_LOOPEXIT]]: |
| ; IF-EVL-NEXT: ret void |
| ; |
| ; NO-VP-LABEL: define void @test_fmul( |
| ; NO-VP-SAME: ptr captures(none) [[A:%.*]], ptr readonly captures(none) [[B:%.*]]) #[[ATTR0]] { |
| ; NO-VP-NEXT: [[LOOP_PREHEADER:.*]]: |
| ; NO-VP-NEXT: [[A2:%.*]] = ptrtoint ptr [[A]] to i64 |
| ; NO-VP-NEXT: [[B1:%.*]] = ptrtoint ptr [[B]] to i64 |
| ; NO-VP-NEXT: [[TMP9:%.*]] = call i64 @llvm.vscale.i64() |
| ; NO-VP-NEXT: [[TMP1:%.*]] = shl nuw i64 [[TMP9]], 2 |
| ; NO-VP-NEXT: [[TMP2:%.*]] = call i64 @llvm.umax.i64(i64 [[TMP1]], i64 16) |
| ; NO-VP-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 100, [[TMP2]] |
| ; NO-VP-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]] |
| ; NO-VP: [[VECTOR_MEMCHECK]]: |
| ; NO-VP-NEXT: [[TMP3:%.*]] = call i64 @llvm.vscale.i64() |
| ; NO-VP-NEXT: [[TMP4:%.*]] = mul nuw i64 [[TMP3]], 4 |
| ; NO-VP-NEXT: [[TMP5:%.*]] = mul i64 [[TMP4]], 4 |
| ; NO-VP-NEXT: [[TMP6:%.*]] = sub i64 [[B1]], [[A2]] |
| ; NO-VP-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP6]], [[TMP5]] |
| ; NO-VP-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]] |
| ; NO-VP: [[VECTOR_PH]]: |
| ; NO-VP-NEXT: [[TMP7:%.*]] = call i64 @llvm.vscale.i64() |
| ; NO-VP-NEXT: [[TMP8:%.*]] = mul nuw i64 [[TMP7]], 4 |
| ; NO-VP-NEXT: [[N_MOD_VF:%.*]] = urem i64 100, [[TMP8]] |
| ; NO-VP-NEXT: [[N_VEC:%.*]] = sub i64 100, [[N_MOD_VF]] |
| ; NO-VP-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; NO-VP: [[VECTOR_BODY]]: |
| ; NO-VP-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; NO-VP-NEXT: [[TMP11:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[INDEX]] |
| ; NO-VP-NEXT: [[WIDE_LOAD:%.*]] = load <vscale x 4 x float>, ptr [[TMP11]], align 4 |
| ; NO-VP-NEXT: [[TMP12:%.*]] = fmul fast <vscale x 4 x float> [[WIDE_LOAD]], splat (float 3.000000e+00) |
| ; NO-VP-NEXT: [[TMP13:%.*]] = getelementptr inbounds float, ptr [[B]], i64 [[INDEX]] |
| ; NO-VP-NEXT: store <vscale x 4 x float> [[TMP12]], ptr [[TMP13]], align 4 |
| ; NO-VP-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP8]] |
| ; NO-VP-NEXT: [[TMP14:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] |
| ; NO-VP-NEXT: br i1 [[TMP14]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP32:![0-9]+]] |
| ; NO-VP: [[MIDDLE_BLOCK]]: |
| ; NO-VP-NEXT: [[CMP_N:%.*]] = icmp eq i64 100, [[N_VEC]] |
| ; NO-VP-NEXT: br i1 [[CMP_N]], label %[[FINISH_LOOPEXIT:.*]], label %[[SCALAR_PH]] |
| ; NO-VP: [[SCALAR_PH]]: |
| ; NO-VP-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[LOOP_PREHEADER]] ], [ 0, %[[VECTOR_MEMCHECK]] ] |
| ; NO-VP-NEXT: br label %[[LOOP:.*]] |
| ; NO-VP: [[LOOP]]: |
| ; NO-VP-NEXT: [[LEN:%.*]] = phi i64 [ [[DEC:%.*]], %[[LOOP]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ] |
| ; NO-VP-NEXT: [[DEC]] = add nsw i64 [[LEN]], 1 |
| ; NO-VP-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[LEN]] |
| ; NO-VP-NEXT: [[TMP0:%.*]] = load float, ptr [[ARRAYIDX]], align 4 |
| ; NO-VP-NEXT: [[TMP:%.*]] = fmul fast float [[TMP0]], 3.000000e+00 |
| ; NO-VP-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds float, ptr [[B]], i64 [[LEN]] |
| ; NO-VP-NEXT: store float [[TMP]], ptr [[ARRAYIDX1]], align 4 |
| ; NO-VP-NEXT: [[DOTNOT:%.*]] = icmp eq i64 [[DEC]], 100 |
| ; NO-VP-NEXT: br i1 [[DOTNOT]], label %[[FINISH_LOOPEXIT]], label %[[LOOP]], !llvm.loop [[LOOP33:![0-9]+]] |
| ; NO-VP: [[FINISH_LOOPEXIT]]: |
| ; NO-VP-NEXT: ret void |
| ; |
| loop.preheader: |
| br label %loop |
| |
| loop: |
| %len = phi i64 [ %dec, %loop ], [ 0, %loop.preheader ] |
| %dec = add nsw i64 %len, 1 |
| %arrayidx = getelementptr inbounds float, ptr %a, i64 %len |
| %0 = load float, ptr %arrayidx, align 4 |
| %tmp = fmul fast float %0, 3.000000e+00 |
| %arrayidx1 = getelementptr inbounds float, ptr %b, i64 %len |
| store float %tmp, ptr %arrayidx1, align 4 |
| %.not = icmp eq i64 %dec, 100 |
| br i1 %.not, label %finish.loopexit, label %loop |
| |
| finish.loopexit: |
| ret void |
| } |
| |
| define void @test_fdiv(ptr nocapture %a, ptr nocapture readonly %b) { |
| ; IF-EVL-LABEL: define void @test_fdiv( |
| ; IF-EVL-SAME: ptr captures(none) [[A:%.*]], ptr readonly captures(none) [[B:%.*]]) #[[ATTR0]] { |
| ; IF-EVL-NEXT: [[LOOP_PREHEADER:.*]]: |
| ; IF-EVL-NEXT: [[A2:%.*]] = ptrtoint ptr [[A]] to i64 |
| ; IF-EVL-NEXT: [[B1:%.*]] = ptrtoint ptr [[B]] to i64 |
| ; IF-EVL-NEXT: br i1 false, label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]] |
| ; IF-EVL: [[VECTOR_MEMCHECK]]: |
| ; IF-EVL-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() |
| ; IF-EVL-NEXT: [[TMP1:%.*]] = mul nuw i64 [[TMP0]], 4 |
| ; IF-EVL-NEXT: [[TMP2:%.*]] = mul i64 [[TMP1]], 4 |
| ; IF-EVL-NEXT: [[TMP3:%.*]] = sub i64 [[B1]], [[A2]] |
| ; IF-EVL-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP3]], [[TMP2]] |
| ; IF-EVL-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]] |
| ; IF-EVL: [[VECTOR_PH]]: |
| ; IF-EVL-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; IF-EVL: [[VECTOR_BODY]]: |
| ; IF-EVL-NEXT: [[EVL_BASED_IV:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_EVL_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; IF-EVL-NEXT: [[TMP11:%.*]] = phi i64 [ 100, %[[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; IF-EVL-NEXT: [[TMP12:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[TMP11]], i32 4, i1 true) |
| ; IF-EVL-NEXT: [[TMP14:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[EVL_BASED_IV]] |
| ; IF-EVL-NEXT: [[VP_OP_LOAD:%.*]] = call <vscale x 4 x float> @llvm.vp.load.nxv4f32.p0(ptr align 4 [[TMP14]], <vscale x 4 x i1> splat (i1 true), i32 [[TMP12]]) |
| ; IF-EVL-NEXT: [[VP_OP:%.*]] = fdiv fast <vscale x 4 x float> [[VP_OP_LOAD]], splat (float 3.000000e+00) |
| ; IF-EVL-NEXT: [[TMP17:%.*]] = getelementptr inbounds float, ptr [[B]], i64 [[EVL_BASED_IV]] |
| ; IF-EVL-NEXT: call void @llvm.vp.store.nxv4f32.p0(<vscale x 4 x float> [[VP_OP]], ptr align 4 [[TMP17]], <vscale x 4 x i1> splat (i1 true), i32 [[TMP12]]) |
| ; IF-EVL-NEXT: [[TMP19:%.*]] = zext i32 [[TMP12]] to i64 |
| ; IF-EVL-NEXT: [[INDEX_EVL_NEXT]] = add nuw i64 [[TMP19]], [[EVL_BASED_IV]] |
| ; IF-EVL-NEXT: [[AVL_NEXT]] = sub nuw i64 [[TMP11]], [[TMP19]] |
| ; IF-EVL-NEXT: [[TMP15:%.*]] = icmp eq i64 [[AVL_NEXT]], 0 |
| ; IF-EVL-NEXT: br i1 [[TMP15]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP35:![0-9]+]] |
| ; IF-EVL: [[MIDDLE_BLOCK]]: |
| ; IF-EVL-NEXT: br label %[[FINISH_LOOPEXIT:.*]] |
| ; IF-EVL: [[SCALAR_PH]]: |
| ; IF-EVL-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 0, %[[LOOP_PREHEADER]] ], [ 0, %[[VECTOR_MEMCHECK]] ] |
| ; IF-EVL-NEXT: br label %[[LOOP:.*]] |
| ; IF-EVL: [[LOOP]]: |
| ; IF-EVL-NEXT: [[LEN:%.*]] = phi i64 [ [[DEC:%.*]], %[[LOOP]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ] |
| ; IF-EVL-NEXT: [[DEC]] = add nsw i64 [[LEN]], 1 |
| ; IF-EVL-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[LEN]] |
| ; IF-EVL-NEXT: [[TMP21:%.*]] = load float, ptr [[ARRAYIDX]], align 4 |
| ; IF-EVL-NEXT: [[TMP:%.*]] = fdiv fast float [[TMP21]], 3.000000e+00 |
| ; IF-EVL-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds float, ptr [[B]], i64 [[LEN]] |
| ; IF-EVL-NEXT: store float [[TMP]], ptr [[ARRAYIDX1]], align 4 |
| ; IF-EVL-NEXT: [[DOTNOT:%.*]] = icmp eq i64 [[DEC]], 100 |
| ; IF-EVL-NEXT: br i1 [[DOTNOT]], label %[[FINISH_LOOPEXIT]], label %[[LOOP]], !llvm.loop [[LOOP36:![0-9]+]] |
| ; IF-EVL: [[FINISH_LOOPEXIT]]: |
| ; IF-EVL-NEXT: ret void |
| ; |
| ; NO-VP-LABEL: define void @test_fdiv( |
| ; NO-VP-SAME: ptr captures(none) [[A:%.*]], ptr readonly captures(none) [[B:%.*]]) #[[ATTR0]] { |
| ; NO-VP-NEXT: [[LOOP_PREHEADER:.*]]: |
| ; NO-VP-NEXT: [[A2:%.*]] = ptrtoint ptr [[A]] to i64 |
| ; NO-VP-NEXT: [[B1:%.*]] = ptrtoint ptr [[B]] to i64 |
| ; NO-VP-NEXT: [[TMP9:%.*]] = call i64 @llvm.vscale.i64() |
| ; NO-VP-NEXT: [[TMP1:%.*]] = shl nuw i64 [[TMP9]], 2 |
| ; NO-VP-NEXT: [[TMP2:%.*]] = call i64 @llvm.umax.i64(i64 [[TMP1]], i64 16) |
| ; NO-VP-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 100, [[TMP2]] |
| ; NO-VP-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]] |
| ; NO-VP: [[VECTOR_MEMCHECK]]: |
| ; NO-VP-NEXT: [[TMP3:%.*]] = call i64 @llvm.vscale.i64() |
| ; NO-VP-NEXT: [[TMP4:%.*]] = mul nuw i64 [[TMP3]], 4 |
| ; NO-VP-NEXT: [[TMP5:%.*]] = mul i64 [[TMP4]], 4 |
| ; NO-VP-NEXT: [[TMP6:%.*]] = sub i64 [[B1]], [[A2]] |
| ; NO-VP-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP6]], [[TMP5]] |
| ; NO-VP-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]] |
| ; NO-VP: [[VECTOR_PH]]: |
| ; NO-VP-NEXT: [[TMP7:%.*]] = call i64 @llvm.vscale.i64() |
| ; NO-VP-NEXT: [[TMP8:%.*]] = mul nuw i64 [[TMP7]], 4 |
| ; NO-VP-NEXT: [[N_MOD_VF:%.*]] = urem i64 100, [[TMP8]] |
| ; NO-VP-NEXT: [[N_VEC:%.*]] = sub i64 100, [[N_MOD_VF]] |
| ; NO-VP-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; NO-VP: [[VECTOR_BODY]]: |
| ; NO-VP-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; NO-VP-NEXT: [[TMP11:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[INDEX]] |
| ; NO-VP-NEXT: [[WIDE_LOAD:%.*]] = load <vscale x 4 x float>, ptr [[TMP11]], align 4 |
| ; NO-VP-NEXT: [[TMP12:%.*]] = fdiv fast <vscale x 4 x float> [[WIDE_LOAD]], splat (float 3.000000e+00) |
| ; NO-VP-NEXT: [[TMP13:%.*]] = getelementptr inbounds float, ptr [[B]], i64 [[INDEX]] |
| ; NO-VP-NEXT: store <vscale x 4 x float> [[TMP12]], ptr [[TMP13]], align 4 |
| ; NO-VP-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP8]] |
| ; NO-VP-NEXT: [[TMP14:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] |
| ; NO-VP-NEXT: br i1 [[TMP14]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP34:![0-9]+]] |
| ; NO-VP: [[MIDDLE_BLOCK]]: |
| ; NO-VP-NEXT: [[CMP_N:%.*]] = icmp eq i64 100, [[N_VEC]] |
| ; NO-VP-NEXT: br i1 [[CMP_N]], label %[[FINISH_LOOPEXIT:.*]], label %[[SCALAR_PH]] |
| ; NO-VP: [[SCALAR_PH]]: |
| ; NO-VP-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[LOOP_PREHEADER]] ], [ 0, %[[VECTOR_MEMCHECK]] ] |
| ; NO-VP-NEXT: br label %[[LOOP:.*]] |
| ; NO-VP: [[LOOP]]: |
| ; NO-VP-NEXT: [[LEN:%.*]] = phi i64 [ [[DEC:%.*]], %[[LOOP]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ] |
| ; NO-VP-NEXT: [[DEC]] = add nsw i64 [[LEN]], 1 |
| ; NO-VP-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[LEN]] |
| ; NO-VP-NEXT: [[TMP0:%.*]] = load float, ptr [[ARRAYIDX]], align 4 |
| ; NO-VP-NEXT: [[TMP:%.*]] = fdiv fast float [[TMP0]], 3.000000e+00 |
| ; NO-VP-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds float, ptr [[B]], i64 [[LEN]] |
| ; NO-VP-NEXT: store float [[TMP]], ptr [[ARRAYIDX1]], align 4 |
| ; NO-VP-NEXT: [[DOTNOT:%.*]] = icmp eq i64 [[DEC]], 100 |
| ; NO-VP-NEXT: br i1 [[DOTNOT]], label %[[FINISH_LOOPEXIT]], label %[[LOOP]], !llvm.loop [[LOOP35:![0-9]+]] |
| ; NO-VP: [[FINISH_LOOPEXIT]]: |
| ; NO-VP-NEXT: ret void |
| ; |
| loop.preheader: |
| br label %loop |
| |
| loop: |
| %len = phi i64 [ %dec, %loop ], [ 0, %loop.preheader ] |
| %dec = add nsw i64 %len, 1 |
| %arrayidx = getelementptr inbounds float, ptr %a, i64 %len |
| %0 = load float, ptr %arrayidx, align 4 |
| %tmp = fdiv fast float %0, 3.000000e+00 |
| %arrayidx1 = getelementptr inbounds float, ptr %b, i64 %len |
| store float %tmp, ptr %arrayidx1, align 4 |
| %.not = icmp eq i64 %dec, 100 |
| br i1 %.not, label %finish.loopexit, label %loop |
| |
| finish.loopexit: |
| ret void |
| } |
| |
| define void @test_frem(ptr nocapture %a, ptr nocapture readonly %b) { |
| ; IF-EVL-LABEL: define void @test_frem( |
| ; IF-EVL-SAME: ptr captures(none) [[A:%.*]], ptr readonly captures(none) [[B:%.*]]) #[[ATTR0]] { |
| ; IF-EVL-NEXT: [[LOOP_PREHEADER:.*]]: |
| ; IF-EVL-NEXT: br label %[[LOOP:.*]] |
| ; IF-EVL: [[LOOP]]: |
| ; IF-EVL-NEXT: [[LEN:%.*]] = phi i64 [ [[DEC:%.*]], %[[LOOP]] ], [ 0, %[[LOOP_PREHEADER]] ] |
| ; IF-EVL-NEXT: [[DEC]] = add nsw i64 [[LEN]], 1 |
| ; IF-EVL-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[LEN]] |
| ; IF-EVL-NEXT: [[TMP0:%.*]] = load float, ptr [[ARRAYIDX]], align 4 |
| ; IF-EVL-NEXT: [[TMP:%.*]] = frem fast float [[TMP0]], 3.000000e+00 |
| ; IF-EVL-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds float, ptr [[B]], i64 [[LEN]] |
| ; IF-EVL-NEXT: store float [[TMP]], ptr [[ARRAYIDX1]], align 4 |
| ; IF-EVL-NEXT: [[DOTNOT:%.*]] = icmp eq i64 [[DEC]], 100 |
| ; IF-EVL-NEXT: br i1 [[DOTNOT]], label %[[FINISH_LOOPEXIT:.*]], label %[[LOOP]] |
| ; IF-EVL: [[FINISH_LOOPEXIT]]: |
| ; IF-EVL-NEXT: ret void |
| ; |
| ; NO-VP-LABEL: define void @test_frem( |
| ; NO-VP-SAME: ptr captures(none) [[A:%.*]], ptr readonly captures(none) [[B:%.*]]) #[[ATTR0]] { |
| ; NO-VP-NEXT: [[LOOP_PREHEADER:.*]]: |
| ; NO-VP-NEXT: br label %[[LOOP:.*]] |
| ; NO-VP: [[LOOP]]: |
| ; NO-VP-NEXT: [[LEN:%.*]] = phi i64 [ [[DEC:%.*]], %[[LOOP]] ], [ 0, %[[LOOP_PREHEADER]] ] |
| ; NO-VP-NEXT: [[DEC]] = add nsw i64 [[LEN]], 1 |
| ; NO-VP-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[LEN]] |
| ; NO-VP-NEXT: [[TMP0:%.*]] = load float, ptr [[ARRAYIDX]], align 4 |
| ; NO-VP-NEXT: [[TMP:%.*]] = frem fast float [[TMP0]], 3.000000e+00 |
| ; NO-VP-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds float, ptr [[B]], i64 [[LEN]] |
| ; NO-VP-NEXT: store float [[TMP]], ptr [[ARRAYIDX1]], align 4 |
| ; NO-VP-NEXT: [[DOTNOT:%.*]] = icmp eq i64 [[DEC]], 100 |
| ; NO-VP-NEXT: br i1 [[DOTNOT]], label %[[FINISH_LOOPEXIT:.*]], label %[[LOOP]] |
| ; NO-VP: [[FINISH_LOOPEXIT]]: |
| ; NO-VP-NEXT: ret void |
| ; |
| loop.preheader: |
| br label %loop |
| |
| loop: |
| %len = phi i64 [ %dec, %loop ], [ 0, %loop.preheader ] |
| %dec = add nsw i64 %len, 1 |
| %arrayidx = getelementptr inbounds float, ptr %a, i64 %len |
| %0 = load float, ptr %arrayidx, align 4 |
| %tmp = frem fast float %0, 3.000000e+00 |
| %arrayidx1 = getelementptr inbounds float, ptr %b, i64 %len |
| store float %tmp, ptr %arrayidx1, align 4 |
| %.not = icmp eq i64 %dec, 100 |
| br i1 %.not, label %finish.loopexit, label %loop |
| |
| finish.loopexit: |
| ret void |
| } |
| |
| define void @test_fneg(ptr nocapture %a, ptr nocapture readonly %b) { |
| ; IF-EVL-LABEL: define void @test_fneg( |
| ; IF-EVL-SAME: ptr captures(none) [[A:%.*]], ptr readonly captures(none) [[B:%.*]]) #[[ATTR0]] { |
| ; IF-EVL-NEXT: [[LOOP_PREHEADER:.*]]: |
| ; IF-EVL-NEXT: [[A2:%.*]] = ptrtoint ptr [[A]] to i64 |
| ; IF-EVL-NEXT: [[B1:%.*]] = ptrtoint ptr [[B]] to i64 |
| ; IF-EVL-NEXT: br i1 false, label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]] |
| ; IF-EVL: [[VECTOR_MEMCHECK]]: |
| ; IF-EVL-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() |
| ; IF-EVL-NEXT: [[TMP1:%.*]] = mul nuw i64 [[TMP0]], 4 |
| ; IF-EVL-NEXT: [[TMP2:%.*]] = mul i64 [[TMP1]], 4 |
| ; IF-EVL-NEXT: [[TMP3:%.*]] = sub i64 [[B1]], [[A2]] |
| ; IF-EVL-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP3]], [[TMP2]] |
| ; IF-EVL-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]] |
| ; IF-EVL: [[VECTOR_PH]]: |
| ; IF-EVL-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; IF-EVL: [[VECTOR_BODY]]: |
| ; IF-EVL-NEXT: [[EVL_BASED_IV:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_EVL_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; IF-EVL-NEXT: [[TMP11:%.*]] = phi i64 [ 100, %[[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; IF-EVL-NEXT: [[TMP12:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[TMP11]], i32 4, i1 true) |
| ; IF-EVL-NEXT: [[TMP14:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[EVL_BASED_IV]] |
| ; IF-EVL-NEXT: [[VP_OP_LOAD:%.*]] = call <vscale x 4 x float> @llvm.vp.load.nxv4f32.p0(ptr align 4 [[TMP14]], <vscale x 4 x i1> splat (i1 true), i32 [[TMP12]]) |
| ; IF-EVL-NEXT: [[VP_OP:%.*]] = fneg fast <vscale x 4 x float> [[VP_OP_LOAD]] |
| ; IF-EVL-NEXT: [[TMP17:%.*]] = getelementptr inbounds float, ptr [[B]], i64 [[EVL_BASED_IV]] |
| ; IF-EVL-NEXT: call void @llvm.vp.store.nxv4f32.p0(<vscale x 4 x float> [[VP_OP]], ptr align 4 [[TMP17]], <vscale x 4 x i1> splat (i1 true), i32 [[TMP12]]) |
| ; IF-EVL-NEXT: [[TMP19:%.*]] = zext i32 [[TMP12]] to i64 |
| ; IF-EVL-NEXT: [[INDEX_EVL_NEXT]] = add nuw i64 [[TMP19]], [[EVL_BASED_IV]] |
| ; IF-EVL-NEXT: [[AVL_NEXT]] = sub nuw i64 [[TMP11]], [[TMP19]] |
| ; IF-EVL-NEXT: [[TMP15:%.*]] = icmp eq i64 [[AVL_NEXT]], 0 |
| ; IF-EVL-NEXT: br i1 [[TMP15]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP37:![0-9]+]] |
| ; IF-EVL: [[MIDDLE_BLOCK]]: |
| ; IF-EVL-NEXT: br label %[[FINISH_LOOPEXIT:.*]] |
| ; IF-EVL: [[SCALAR_PH]]: |
| ; IF-EVL-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 0, %[[LOOP_PREHEADER]] ], [ 0, %[[VECTOR_MEMCHECK]] ] |
| ; IF-EVL-NEXT: br label %[[LOOP:.*]] |
| ; IF-EVL: [[LOOP]]: |
| ; IF-EVL-NEXT: [[LEN:%.*]] = phi i64 [ [[DEC:%.*]], %[[LOOP]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ] |
| ; IF-EVL-NEXT: [[DEC]] = add nsw i64 [[LEN]], 1 |
| ; IF-EVL-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[LEN]] |
| ; IF-EVL-NEXT: [[TMP21:%.*]] = load float, ptr [[ARRAYIDX]], align 4 |
| ; IF-EVL-NEXT: [[TMP:%.*]] = fneg fast float [[TMP21]] |
| ; IF-EVL-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds float, ptr [[B]], i64 [[LEN]] |
| ; IF-EVL-NEXT: store float [[TMP]], ptr [[ARRAYIDX1]], align 4 |
| ; IF-EVL-NEXT: [[DOTNOT:%.*]] = icmp eq i64 [[DEC]], 100 |
| ; IF-EVL-NEXT: br i1 [[DOTNOT]], label %[[FINISH_LOOPEXIT]], label %[[LOOP]], !llvm.loop [[LOOP38:![0-9]+]] |
| ; IF-EVL: [[FINISH_LOOPEXIT]]: |
| ; IF-EVL-NEXT: ret void |
| ; |
| ; NO-VP-LABEL: define void @test_fneg( |
| ; NO-VP-SAME: ptr captures(none) [[A:%.*]], ptr readonly captures(none) [[B:%.*]]) #[[ATTR0]] { |
| ; NO-VP-NEXT: [[LOOP_PREHEADER:.*]]: |
| ; NO-VP-NEXT: [[A2:%.*]] = ptrtoint ptr [[A]] to i64 |
| ; NO-VP-NEXT: [[B1:%.*]] = ptrtoint ptr [[B]] to i64 |
| ; NO-VP-NEXT: [[TMP9:%.*]] = call i64 @llvm.vscale.i64() |
| ; NO-VP-NEXT: [[TMP1:%.*]] = shl nuw i64 [[TMP9]], 2 |
| ; NO-VP-NEXT: [[TMP2:%.*]] = call i64 @llvm.umax.i64(i64 [[TMP1]], i64 16) |
| ; NO-VP-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 100, [[TMP2]] |
| ; NO-VP-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]] |
| ; NO-VP: [[VECTOR_MEMCHECK]]: |
| ; NO-VP-NEXT: [[TMP3:%.*]] = call i64 @llvm.vscale.i64() |
| ; NO-VP-NEXT: [[TMP4:%.*]] = mul nuw i64 [[TMP3]], 4 |
| ; NO-VP-NEXT: [[TMP5:%.*]] = mul i64 [[TMP4]], 4 |
| ; NO-VP-NEXT: [[TMP6:%.*]] = sub i64 [[B1]], [[A2]] |
| ; NO-VP-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP6]], [[TMP5]] |
| ; NO-VP-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]] |
| ; NO-VP: [[VECTOR_PH]]: |
| ; NO-VP-NEXT: [[TMP7:%.*]] = call i64 @llvm.vscale.i64() |
| ; NO-VP-NEXT: [[TMP8:%.*]] = mul nuw i64 [[TMP7]], 4 |
| ; NO-VP-NEXT: [[N_MOD_VF:%.*]] = urem i64 100, [[TMP8]] |
| ; NO-VP-NEXT: [[N_VEC:%.*]] = sub i64 100, [[N_MOD_VF]] |
| ; NO-VP-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; NO-VP: [[VECTOR_BODY]]: |
| ; NO-VP-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; NO-VP-NEXT: [[TMP11:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[INDEX]] |
| ; NO-VP-NEXT: [[WIDE_LOAD:%.*]] = load <vscale x 4 x float>, ptr [[TMP11]], align 4 |
| ; NO-VP-NEXT: [[TMP12:%.*]] = fneg fast <vscale x 4 x float> [[WIDE_LOAD]] |
| ; NO-VP-NEXT: [[TMP13:%.*]] = getelementptr inbounds float, ptr [[B]], i64 [[INDEX]] |
| ; NO-VP-NEXT: store <vscale x 4 x float> [[TMP12]], ptr [[TMP13]], align 4 |
| ; NO-VP-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP8]] |
| ; NO-VP-NEXT: [[TMP14:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] |
| ; NO-VP-NEXT: br i1 [[TMP14]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP36:![0-9]+]] |
| ; NO-VP: [[MIDDLE_BLOCK]]: |
| ; NO-VP-NEXT: [[CMP_N:%.*]] = icmp eq i64 100, [[N_VEC]] |
| ; NO-VP-NEXT: br i1 [[CMP_N]], label %[[FINISH_LOOPEXIT:.*]], label %[[SCALAR_PH]] |
| ; NO-VP: [[SCALAR_PH]]: |
| ; NO-VP-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[LOOP_PREHEADER]] ], [ 0, %[[VECTOR_MEMCHECK]] ] |
| ; NO-VP-NEXT: br label %[[LOOP:.*]] |
| ; NO-VP: [[LOOP]]: |
| ; NO-VP-NEXT: [[LEN:%.*]] = phi i64 [ [[DEC:%.*]], %[[LOOP]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ] |
| ; NO-VP-NEXT: [[DEC]] = add nsw i64 [[LEN]], 1 |
| ; NO-VP-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[LEN]] |
| ; NO-VP-NEXT: [[TMP0:%.*]] = load float, ptr [[ARRAYIDX]], align 4 |
| ; NO-VP-NEXT: [[TMP:%.*]] = fneg fast float [[TMP0]] |
| ; NO-VP-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds float, ptr [[B]], i64 [[LEN]] |
| ; NO-VP-NEXT: store float [[TMP]], ptr [[ARRAYIDX1]], align 4 |
| ; NO-VP-NEXT: [[DOTNOT:%.*]] = icmp eq i64 [[DEC]], 100 |
| ; NO-VP-NEXT: br i1 [[DOTNOT]], label %[[FINISH_LOOPEXIT]], label %[[LOOP]], !llvm.loop [[LOOP37:![0-9]+]] |
| ; NO-VP: [[FINISH_LOOPEXIT]]: |
| ; NO-VP-NEXT: ret void |
| ; |
| loop.preheader: |
| br label %loop |
| |
| loop: |
| %len = phi i64 [ %dec, %loop ], [ 0, %loop.preheader ] |
| %dec = add nsw i64 %len, 1 |
| %arrayidx = getelementptr inbounds float, ptr %a, i64 %len |
| %0 = load float, ptr %arrayidx, align 4 |
| %tmp = fneg fast float %0 |
| %arrayidx1 = getelementptr inbounds float, ptr %b, i64 %len |
| store float %tmp, ptr %arrayidx1, align 4 |
| %.not = icmp eq i64 %dec, 100 |
| br i1 %.not, label %finish.loopexit, label %loop |
| |
| finish.loopexit: |
| ret void |
| } |
| ;. |
| ; IF-EVL: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]], [[META3:![0-9]+]]} |
| ; IF-EVL: [[META1]] = !{!"llvm.loop.isvectorized", i32 1} |
| ; IF-EVL: [[META2]] = !{!"llvm.loop.isvectorized.tailfoldingstyle", !"evl"} |
| ; IF-EVL: [[META3]] = !{!"llvm.loop.unroll.runtime.disable"} |
| ; IF-EVL: [[LOOP4]] = distinct !{[[LOOP4]], [[META1]]} |
| ; IF-EVL: [[LOOP5]] = distinct !{[[LOOP5]], [[META1]], [[META2]], [[META3]]} |
| ; IF-EVL: [[LOOP6]] = distinct !{[[LOOP6]], [[META1]]} |
| ; IF-EVL: [[LOOP7]] = distinct !{[[LOOP7]], [[META1]], [[META2]], [[META3]]} |
| ; IF-EVL: [[LOOP8]] = distinct !{[[LOOP8]], [[META1]]} |
| ; IF-EVL: [[LOOP9]] = distinct !{[[LOOP9]], [[META1]], [[META2]], [[META3]]} |
| ; IF-EVL: [[LOOP10]] = distinct !{[[LOOP10]], [[META1]]} |
| ; IF-EVL: [[LOOP11]] = distinct !{[[LOOP11]], [[META1]], [[META2]], [[META3]]} |
| ; IF-EVL: [[LOOP12]] = distinct !{[[LOOP12]], [[META1]]} |
| ; IF-EVL: [[LOOP13]] = distinct !{[[LOOP13]], [[META1]], [[META2]], [[META3]]} |
| ; IF-EVL: [[LOOP14]] = distinct !{[[LOOP14]], [[META1]]} |
| ; IF-EVL: [[LOOP15]] = distinct !{[[LOOP15]], [[META1]], [[META2]], [[META3]]} |
| ; IF-EVL: [[LOOP16]] = distinct !{[[LOOP16]], [[META1]]} |
| ; IF-EVL: [[LOOP17]] = distinct !{[[LOOP17]], [[META1]], [[META2]], [[META3]]} |
| ; IF-EVL: [[LOOP18]] = distinct !{[[LOOP18]], [[META1]]} |
| ; IF-EVL: [[LOOP19]] = distinct !{[[LOOP19]], [[META1]], [[META2]], [[META3]]} |
| ; IF-EVL: [[LOOP20]] = distinct !{[[LOOP20]], [[META1]]} |
| ; IF-EVL: [[LOOP21]] = distinct !{[[LOOP21]], [[META1]], [[META2]], [[META3]]} |
| ; IF-EVL: [[LOOP22]] = distinct !{[[LOOP22]], [[META1]]} |
| ; IF-EVL: [[LOOP23]] = distinct !{[[LOOP23]], [[META1]], [[META2]], [[META3]]} |
| ; IF-EVL: [[LOOP24]] = distinct !{[[LOOP24]], [[META1]]} |
| ; IF-EVL: [[LOOP25]] = distinct !{[[LOOP25]], [[META1]], [[META2]], [[META3]]} |
| ; IF-EVL: [[LOOP26]] = distinct !{[[LOOP26]], [[META1]]} |
| ; IF-EVL: [[LOOP27]] = distinct !{[[LOOP27]], [[META1]], [[META2]], [[META3]]} |
| ; IF-EVL: [[LOOP28]] = distinct !{[[LOOP28]], [[META1]]} |
| ; IF-EVL: [[LOOP29]] = distinct !{[[LOOP29]], [[META1]], [[META2]], [[META3]]} |
| ; IF-EVL: [[LOOP30]] = distinct !{[[LOOP30]], [[META1]]} |
| ; IF-EVL: [[LOOP31]] = distinct !{[[LOOP31]], [[META1]], [[META2]], [[META3]]} |
| ; IF-EVL: [[LOOP32]] = distinct !{[[LOOP32]], [[META1]]} |
| ; IF-EVL: [[LOOP33]] = distinct !{[[LOOP33]], [[META1]], [[META2]], [[META3]]} |
| ; IF-EVL: [[LOOP34]] = distinct !{[[LOOP34]], [[META1]]} |
| ; IF-EVL: [[LOOP35]] = distinct !{[[LOOP35]], [[META1]], [[META2]], [[META3]]} |
| ; IF-EVL: [[LOOP36]] = distinct !{[[LOOP36]], [[META1]]} |
| ; IF-EVL: [[LOOP37]] = distinct !{[[LOOP37]], [[META1]], [[META2]], [[META3]]} |
| ; IF-EVL: [[LOOP38]] = distinct !{[[LOOP38]], [[META1]]} |
| ;. |
| ; NO-VP: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]} |
| ; NO-VP: [[META1]] = !{!"llvm.loop.isvectorized", i32 1} |
| ; NO-VP: [[META2]] = !{!"llvm.loop.unroll.runtime.disable"} |
| ; NO-VP: [[LOOP3]] = distinct !{[[LOOP3]], [[META1]]} |
| ; NO-VP: [[LOOP4]] = distinct !{[[LOOP4]], [[META1]], [[META2]]} |
| ; NO-VP: [[LOOP5]] = distinct !{[[LOOP5]], [[META1]]} |
| ; NO-VP: [[LOOP6]] = distinct !{[[LOOP6]], [[META1]], [[META2]]} |
| ; NO-VP: [[LOOP7]] = distinct !{[[LOOP7]], [[META1]]} |
| ; NO-VP: [[LOOP8]] = distinct !{[[LOOP8]], [[META1]], [[META2]]} |
| ; NO-VP: [[LOOP9]] = distinct !{[[LOOP9]], [[META1]]} |
| ; NO-VP: [[LOOP10]] = distinct !{[[LOOP10]], [[META1]], [[META2]]} |
| ; NO-VP: [[LOOP11]] = distinct !{[[LOOP11]], [[META1]]} |
| ; NO-VP: [[LOOP12]] = distinct !{[[LOOP12]], [[META1]], [[META2]]} |
| ; NO-VP: [[LOOP13]] = distinct !{[[LOOP13]], [[META1]]} |
| ; NO-VP: [[LOOP14]] = distinct !{[[LOOP14]], [[META1]], [[META2]]} |
| ; NO-VP: [[LOOP15]] = distinct !{[[LOOP15]], [[META1]]} |
| ; NO-VP: [[LOOP16]] = distinct !{[[LOOP16]], [[META1]], [[META2]]} |
| ; NO-VP: [[LOOP17]] = distinct !{[[LOOP17]], [[META1]]} |
| ; NO-VP: [[LOOP18]] = distinct !{[[LOOP18]], [[META1]], [[META2]]} |
| ; NO-VP: [[LOOP19]] = distinct !{[[LOOP19]], [[META1]]} |
| ; NO-VP: [[LOOP20]] = distinct !{[[LOOP20]], [[META1]], [[META2]]} |
| ; NO-VP: [[LOOP21]] = distinct !{[[LOOP21]], [[META1]]} |
| ; NO-VP: [[LOOP22]] = distinct !{[[LOOP22]], [[META1]], [[META2]]} |
| ; NO-VP: [[LOOP23]] = distinct !{[[LOOP23]], [[META1]]} |
| ; NO-VP: [[LOOP24]] = distinct !{[[LOOP24]], [[META1]], [[META2]]} |
| ; NO-VP: [[LOOP25]] = distinct !{[[LOOP25]], [[META1]]} |
| ; NO-VP: [[LOOP26]] = distinct !{[[LOOP26]], [[META1]], [[META2]]} |
| ; NO-VP: [[LOOP27]] = distinct !{[[LOOP27]], [[META1]]} |
| ; NO-VP: [[LOOP28]] = distinct !{[[LOOP28]], [[META1]], [[META2]]} |
| ; NO-VP: [[LOOP29]] = distinct !{[[LOOP29]], [[META1]]} |
| ; NO-VP: [[LOOP30]] = distinct !{[[LOOP30]], [[META1]], [[META2]]} |
| ; NO-VP: [[LOOP31]] = distinct !{[[LOOP31]], [[META1]]} |
| ; NO-VP: [[LOOP32]] = distinct !{[[LOOP32]], [[META1]], [[META2]]} |
| ; NO-VP: [[LOOP33]] = distinct !{[[LOOP33]], [[META1]]} |
| ; NO-VP: [[LOOP34]] = distinct !{[[LOOP34]], [[META1]], [[META2]]} |
| ; NO-VP: [[LOOP35]] = distinct !{[[LOOP35]], [[META1]]} |
| ; NO-VP: [[LOOP36]] = distinct !{[[LOOP36]], [[META1]], [[META2]]} |
| ; NO-VP: [[LOOP37]] = distinct !{[[LOOP37]], [[META1]]} |
| ;. |
