llvm/test/Transforms/SLPVectorizer/X86/phi-multi-same-nodes.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
; RUN: opt -passes=slp-vectorizer -S -slp-threshold=-99999 -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s

define void @test() {
; CHECK-LABEL: define void @test() {
; CHECK-NEXT:  [[BB:.*]]:
; CHECK-NEXT:    switch i32 0, label %[[BB1:.*]] [
; CHECK-NEXT:      i32 -4, label %[[BB4:.*]]
; CHECK-NEXT:      i32 -1, label %[[BB4]]
; CHECK-NEXT:      i32 1, label %[[BB4]]
; CHECK-NEXT:      i32 2, label %[[BB4]]
; CHECK-NEXT:      i32 5, label %[[BB4]]
; CHECK-NEXT:      i32 7, label %[[BB4]]
; CHECK-NEXT:      i32 8, label %[[BB4]]
; CHECK-NEXT:      i32 11, label %[[BB4]]
; CHECK-NEXT:      i32 13, label %[[BB4]]
; CHECK-NEXT:      i32 21, label %[[BB4]]
; CHECK-NEXT:      i32 17, label %[[BB4]]
; CHECK-NEXT:      i32 19, label %[[BB4]]
; CHECK-NEXT:    ]
; CHECK:       [[BB1]]:
; CHECK-NEXT:    switch i32 0, label %[[BB4]] [
; CHECK-NEXT:      i32 -4, label %[[BB4]]
; CHECK-NEXT:      i32 -1, label %[[BB4]]
; CHECK-NEXT:      i32 1, label %[[BB4]]
; CHECK-NEXT:      i32 2, label %[[BB4]]
; CHECK-NEXT:      i32 5, label %[[BB4]]
; CHECK-NEXT:      i32 7, label %[[BB4]]
; CHECK-NEXT:      i32 8, label %[[BB4]]
; CHECK-NEXT:      i32 11, label %[[BB4]]
; CHECK-NEXT:      i32 13, label %[[BB4]]
; CHECK-NEXT:      i32 21, label %[[BB4]]
; CHECK-NEXT:      i32 17, label %[[BB4]]
; CHECK-NEXT:      i32 19, label %[[BB4]]
; CHECK-NEXT:    ]
; CHECK:       [[BB4]]:
; CHECK-NEXT:    [[TMP0:%.*]] = phi <2 x i32> [ zeroinitializer, %[[BB1]] ], [ zeroinitializer, %[[BB1]] ], [ zeroinitializer, %[[BB1]] ], [ zeroinitializer, %[[BB1]] ], [ zeroinitializer, %[[BB1]] ], [ zeroinitializer, %[[BB1]] ], [ zeroinitializer, %[[BB1]] ], [ zeroinitializer, %[[BB1]] ], [ zeroinitializer, %[[BB1]] ], [ zeroinitializer, %[[BB1]] ], [ zeroinitializer, %[[BB1]] ], [ zeroinitializer, %[[BB]] ], [ zeroinitializer, %[[BB]] ], [ zeroinitializer, %[[BB]] ], [ zeroinitializer, %[[BB]] ], [ zeroinitializer, %[[BB]] ], [ zeroinitializer, %[[BB]] ], [ zeroinitializer, %[[BB]] ], [ zeroinitializer, %[[BB]] ], [ zeroinitializer, %[[BB]] ], [ zeroinitializer, %[[BB]] ], [ zeroinitializer, %[[BB]] ], [ zeroinitializer, %[[BB]] ], [ zeroinitializer, %[[BB1]] ], [ zeroinitializer, %[[BB1]] ]
; CHECK-NEXT:    ret void
;
bb:
  %ashr = ashr i32 0, 0
  %add = add i32 0, 0
  switch i32 0, label %bb1 [
  i32 -4, label %bb4
  i32 -1, label %bb4
  i32 1, label %bb4
  i32 2, label %bb4
  i32 5, label %bb4
  i32 7, label %bb4
  i32 8, label %bb4
  i32 11, label %bb4
  i32 13, label %bb4
  i32 21, label %bb4
  i32 17, label %bb4
  i32 19, label %bb4
  ]

bb1:
  %add2 = add i32 0, 0
  %ashr3 = ashr i32 %add2, 1
  %xor = xor i32 0, 0
  %or = or i32 %xor, %ashr
  switch i32 0, label %bb4 [
  i32 -4, label %bb4
  i32 -1, label %bb4
  i32 1, label %bb4
  i32 2, label %bb4
  i32 5, label %bb4
  i32 7, label %bb4
  i32 8, label %bb4
  i32 11, label %bb4
  i32 13, label %bb4
  i32 21, label %bb4
  i32 17, label %bb4
  i32 19, label %bb4
  ]

bb4:
  %phi = phi i32 [ %ashr3, %bb1 ], [ %ashr3, %bb1 ], [ %ashr3, %bb1 ], [ %ashr3, %bb1 ], [ %ashr3, %bb1 ], [ %ashr3, %bb1 ], [ %ashr3, %bb1 ], [ %ashr3, %bb1 ], [ %ashr3, %bb1 ], [ %ashr3, %bb1 ], [ %ashr3, %bb1 ], [ %ashr, %bb ], [ %ashr, %bb ], [ %ashr, %bb ], [ %ashr, %bb ], [ %ashr, %bb ], [ %ashr, %bb ], [ %ashr, %bb ], [ %ashr, %bb ], [ %ashr, %bb ], [ %ashr, %bb ], [ %ashr, %bb ], [ %ashr, %bb ], [ %ashr3, %bb1 ], [ %ashr3, %bb1 ]
  %phi5 = phi i32 [ %or, %bb1 ], [ %or, %bb1 ], [ %or, %bb1 ], [ %or, %bb1 ], [ %or, %bb1 ], [ %or, %bb1 ], [ %or, %bb1 ], [ %or, %bb1 ], [ %or, %bb1 ], [ %or, %bb1 ], [ %or, %bb1 ], [ %add, %bb ], [ %add, %bb ], [ %add, %bb ], [ %add, %bb ], [ %add, %bb ], [ %add, %bb ], [ %add, %bb ], [ %add, %bb ], [ %add, %bb ], [ %add, %bb ], [ %add, %bb ], [ %add, %bb ], [ %or, %bb1 ], [ %or, %bb1 ]
  ret void
}