llvm/test/Transforms/LoopVectorize/WebAssembly/iq1_range.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
; RUN: opt -mtriple=wasm32 -mattr=+simd128 -passes=loop-vectorize %s -S -o - | FileCheck %s
; RUN: opt -mtriple=wasm32 -mattr=+simd128 -passes=loop-vectorize --vectorizer-maximize-bandwidth %s -S -o - | FileCheck %s --check-prefix=MAXIMIZE

define void @iq1_range(ptr noalias readonly captures(none) %records,
; CHECK-LABEL: define void @iq1_range(
; CHECK-SAME: ptr noalias readonly captures(none) [[RECORDS:%.*]], ptr noalias writeonly captures(none) [[CLASSES:%.*]], i32 [[BEGIN:%.*]], i32 [[END:%.*]], i8 [[VALUE:%.*]]) #[[ATTR0:[0-9]+]] {
; CHECK-NEXT:  [[ENTRY:.*:]]
; CHECK-NEXT:    [[NONEMPTY:%.*]] = icmp samesign ult i32 [[BEGIN]], [[END]]
; CHECK-NEXT:    br i1 [[NONEMPTY]], label %[[LOOP_PREHEADER:.*]], label %[[EXIT:.*]]
; CHECK:       [[LOOP_PREHEADER]]:
; CHECK-NEXT:    [[TMP0:%.*]] = sub i32 [[END]], [[BEGIN]]
; CHECK-NEXT:    [[MIN_ITERS_CHECK:%.*]] = icmp ule i32 [[TMP0]], 4
; CHECK-NEXT:    br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
; CHECK:       [[VECTOR_PH]]:
; CHECK-NEXT:    [[TMP1:%.*]] = and i32 [[TMP0]], 3
; CHECK-NEXT:    [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 0
; CHECK-NEXT:    [[TMP3:%.*]] = select i1 [[TMP2]], i32 4, i32 [[TMP1]]
; CHECK-NEXT:    [[N_VEC:%.*]] = sub i32 [[TMP0]], [[TMP3]]
; CHECK-NEXT:    [[TMP4:%.*]] = add i32 [[BEGIN]], [[N_VEC]]
; CHECK-NEXT:    br label %[[VECTOR_BODY:.*]]
; CHECK:       [[VECTOR_BODY]]:
; CHECK-NEXT:    [[INDEX1:%.*]] = phi i32 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
; CHECK-NEXT:    [[TMP5:%.*]] = add nuw i32 [[BEGIN]], [[INDEX1]]
; CHECK-NEXT:    [[TMP12:%.*]] = shl nsw i32 [[TMP5]], 3
; CHECK-NEXT:    [[TMP13:%.*]] = getelementptr inbounds nuw i8, ptr [[RECORDS]], i32 [[TMP12]]
; CHECK-NEXT:    [[WIDE_VEC:%.*]] = load <8 x i32>, ptr [[TMP13]], align 4
; CHECK-NEXT:    [[STRIDED_VEC:%.*]] = shufflevector <8 x i32> [[WIDE_VEC]], <8 x i32> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
; CHECK-NEXT:    [[TMP14:%.*]] = extractelement <4 x i32> [[STRIDED_VEC]], i64 0
; CHECK-NEXT:    [[TMP18:%.*]] = getelementptr inbounds i8, ptr [[CLASSES]], i32 [[TMP14]]
; CHECK-NEXT:    [[TMP15:%.*]] = extractelement <4 x i32> [[STRIDED_VEC]], i64 1
; CHECK-NEXT:    [[TMP19:%.*]] = getelementptr inbounds i8, ptr [[CLASSES]], i32 [[TMP15]]
; CHECK-NEXT:    [[TMP16:%.*]] = extractelement <4 x i32> [[STRIDED_VEC]], i64 2
; CHECK-NEXT:    [[TMP20:%.*]] = getelementptr inbounds i8, ptr [[CLASSES]], i32 [[TMP16]]
; CHECK-NEXT:    [[TMP17:%.*]] = extractelement <4 x i32> [[STRIDED_VEC]], i64 3
; CHECK-NEXT:    [[TMP21:%.*]] = getelementptr inbounds i8, ptr [[CLASSES]], i32 [[TMP17]]
; CHECK-NEXT:    store i8 [[VALUE]], ptr [[TMP18]], align 1
; CHECK-NEXT:    store i8 [[VALUE]], ptr [[TMP19]], align 1
; CHECK-NEXT:    store i8 [[VALUE]], ptr [[TMP20]], align 1
; CHECK-NEXT:    store i8 [[VALUE]], ptr [[TMP21]], align 1
; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i32 [[INDEX1]], 4
; CHECK-NEXT:    [[TMP22:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]]
; CHECK-NEXT:    br i1 [[TMP22]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
; CHECK:       [[MIDDLE_BLOCK]]:
; CHECK-NEXT:    br label %[[SCALAR_PH]]
; CHECK:       [[SCALAR_PH]]:
; CHECK-NEXT:    [[BC_RESUME_VAL:%.*]] = phi i32 [ [[TMP4]], %[[MIDDLE_BLOCK]] ], [ [[BEGIN]], %[[LOOP_PREHEADER]] ]
; CHECK-NEXT:    br label %[[LOOP:.*]]
; CHECK:       [[LOOP]]:
; CHECK-NEXT:    [[IV:%.*]] = phi i32 [ [[IV_NEXT:%.*]], %[[LOOP]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ]
; CHECK-NEXT:    [[BYTE_OFFSET:%.*]] = shl nsw i32 [[IV]], 3
; CHECK-NEXT:    [[RECORD:%.*]] = getelementptr inbounds nuw i8, ptr [[RECORDS]], i32 [[BYTE_OFFSET]]
; CHECK-NEXT:    [[INDEX:%.*]] = load i32, ptr [[RECORD]], align 4
; CHECK-NEXT:    [[DESTINATION:%.*]] = getelementptr inbounds i8, ptr [[CLASSES]], i32 [[INDEX]]
; CHECK-NEXT:    store i8 [[VALUE]], ptr [[DESTINATION]], align 1
; CHECK-NEXT:    [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
; CHECK-NEXT:    [[DONE:%.*]] = icmp eq i32 [[IV_NEXT]], [[END]]
; CHECK-NEXT:    br i1 [[DONE]], label %[[EXIT_LOOPEXIT:.*]], label %[[LOOP]], !llvm.loop [[LOOP3:![0-9]+]]
; CHECK:       [[EXIT_LOOPEXIT]]:
; CHECK-NEXT:    br label %[[EXIT]]
; CHECK:       [[EXIT]]:
; CHECK-NEXT:    ret void
;
; MAXIMIZE-LABEL: define void @iq1_range(
; MAXIMIZE-SAME: ptr noalias readonly captures(none) [[RECORDS:%.*]], ptr noalias writeonly captures(none) [[CLASSES:%.*]], i32 [[BEGIN:%.*]], i32 [[END:%.*]], i8 [[VALUE:%.*]]) #[[ATTR0:[0-9]+]] {
; MAXIMIZE-NEXT:  [[ENTRY:.*:]]
; MAXIMIZE-NEXT:    [[NONEMPTY:%.*]] = icmp samesign ult i32 [[BEGIN]], [[END]]
; MAXIMIZE-NEXT:    br i1 [[NONEMPTY]], label %[[LOOP_PREHEADER:.*]], label %[[EXIT:.*]]
; MAXIMIZE:       [[LOOP_PREHEADER]]:
; MAXIMIZE-NEXT:    [[TMP0:%.*]] = sub i32 [[END]], [[BEGIN]]
; MAXIMIZE-NEXT:    [[MIN_ITERS_CHECK:%.*]] = icmp ule i32 [[TMP0]], 4
; MAXIMIZE-NEXT:    br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
; MAXIMIZE:       [[VECTOR_PH]]:
; MAXIMIZE-NEXT:    [[TMP1:%.*]] = and i32 [[TMP0]], 3
; MAXIMIZE-NEXT:    [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 0
; MAXIMIZE-NEXT:    [[TMP3:%.*]] = select i1 [[TMP2]], i32 4, i32 [[TMP1]]
; MAXIMIZE-NEXT:    [[N_VEC:%.*]] = sub i32 [[TMP0]], [[TMP3]]
; MAXIMIZE-NEXT:    [[TMP4:%.*]] = add i32 [[BEGIN]], [[N_VEC]]
; MAXIMIZE-NEXT:    br label %[[VECTOR_BODY:.*]]
; MAXIMIZE:       [[VECTOR_BODY]]:
; MAXIMIZE-NEXT:    [[INDEX1:%.*]] = phi i32 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
; MAXIMIZE-NEXT:    [[TMP5:%.*]] = add nuw i32 [[BEGIN]], [[INDEX1]]
; MAXIMIZE-NEXT:    [[TMP6:%.*]] = shl nsw i32 [[TMP5]], 3
; MAXIMIZE-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw i8, ptr [[RECORDS]], i32 [[TMP6]]
; MAXIMIZE-NEXT:    [[WIDE_VEC:%.*]] = load <8 x i32>, ptr [[TMP7]], align 4
; MAXIMIZE-NEXT:    [[STRIDED_VEC:%.*]] = shufflevector <8 x i32> [[WIDE_VEC]], <8 x i32> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
; MAXIMIZE-NEXT:    [[TMP32:%.*]] = extractelement <4 x i32> [[STRIDED_VEC]], i64 0
; MAXIMIZE-NEXT:    [[TMP33:%.*]] = getelementptr inbounds i8, ptr [[CLASSES]], i32 [[TMP32]]
; MAXIMIZE-NEXT:    [[TMP34:%.*]] = extractelement <4 x i32> [[STRIDED_VEC]], i64 1
; MAXIMIZE-NEXT:    [[TMP35:%.*]] = getelementptr inbounds i8, ptr [[CLASSES]], i32 [[TMP34]]
; MAXIMIZE-NEXT:    [[TMP36:%.*]] = extractelement <4 x i32> [[STRIDED_VEC]], i64 2
; MAXIMIZE-NEXT:    [[TMP37:%.*]] = getelementptr inbounds i8, ptr [[CLASSES]], i32 [[TMP36]]
; MAXIMIZE-NEXT:    [[TMP38:%.*]] = extractelement <4 x i32> [[STRIDED_VEC]], i64 3
; MAXIMIZE-NEXT:    [[TMP39:%.*]] = getelementptr inbounds i8, ptr [[CLASSES]], i32 [[TMP38]]
; MAXIMIZE-NEXT:    store i8 [[VALUE]], ptr [[TMP33]], align 1
; MAXIMIZE-NEXT:    store i8 [[VALUE]], ptr [[TMP35]], align 1
; MAXIMIZE-NEXT:    store i8 [[VALUE]], ptr [[TMP37]], align 1
; MAXIMIZE-NEXT:    store i8 [[VALUE]], ptr [[TMP39]], align 1
; MAXIMIZE-NEXT:    [[INDEX_NEXT]] = add nuw i32 [[INDEX1]], 4
; MAXIMIZE-NEXT:    [[TMP40:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]]
; MAXIMIZE-NEXT:    br i1 [[TMP40]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
; MAXIMIZE:       [[MIDDLE_BLOCK]]:
; MAXIMIZE-NEXT:    br label %[[SCALAR_PH]]
; MAXIMIZE:       [[SCALAR_PH]]:
; MAXIMIZE-NEXT:    [[BC_RESUME_VAL:%.*]] = phi i32 [ [[TMP4]], %[[MIDDLE_BLOCK]] ], [ [[BEGIN]], %[[LOOP_PREHEADER]] ]
; MAXIMIZE-NEXT:    br label %[[LOOP:.*]]
; MAXIMIZE:       [[LOOP]]:
; MAXIMIZE-NEXT:    [[IV:%.*]] = phi i32 [ [[IV_NEXT:%.*]], %[[LOOP]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ]
; MAXIMIZE-NEXT:    [[BYTE_OFFSET:%.*]] = shl nsw i32 [[IV]], 3
; MAXIMIZE-NEXT:    [[RECORD:%.*]] = getelementptr inbounds nuw i8, ptr [[RECORDS]], i32 [[BYTE_OFFSET]]
; MAXIMIZE-NEXT:    [[INDEX:%.*]] = load i32, ptr [[RECORD]], align 4
; MAXIMIZE-NEXT:    [[DESTINATION:%.*]] = getelementptr inbounds i8, ptr [[CLASSES]], i32 [[INDEX]]
; MAXIMIZE-NEXT:    store i8 [[VALUE]], ptr [[DESTINATION]], align 1
; MAXIMIZE-NEXT:    [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
; MAXIMIZE-NEXT:    [[DONE:%.*]] = icmp eq i32 [[IV_NEXT]], [[END]]
; MAXIMIZE-NEXT:    br i1 [[DONE]], label %[[EXIT_LOOPEXIT:.*]], label %[[LOOP]], !llvm.loop [[LOOP3:![0-9]+]]
; MAXIMIZE:       [[EXIT_LOOPEXIT]]:
; MAXIMIZE-NEXT:    br label %[[EXIT]]
; MAXIMIZE:       [[EXIT]]:
; MAXIMIZE-NEXT:    ret void
;
  ptr noalias writeonly captures(none) %classes,
  i32 %begin, i32 %end, i8 %value) {
entry:
  %nonempty = icmp samesign ult i32 %begin, %end
  br i1 %nonempty, label %loop, label %exit

loop:
  %iv = phi i32 [ %begin, %entry ], [ %iv.next, %loop ]
  %byte.offset = shl nsw i32 %iv, 3
  %record = getelementptr inbounds nuw i8, ptr %records, i32 %byte.offset
  %index = load i32, ptr %record, align 4
  %destination = getelementptr inbounds i8, ptr %classes, i32 %index
  store i8 %value, ptr %destination, align 1
  %iv.next = add nuw nsw i32 %iv, 1
  %done = icmp eq i32 %iv.next, %end
  br i1 %done, label %exit, label %loop

exit:
  ret void
}
;.
; CHECK: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]}
; CHECK: [[META1]] = !{!"llvm.loop.isvectorized", i32 1}
; CHECK: [[META2]] = !{!"llvm.loop.unroll.runtime.disable"}
; CHECK: [[LOOP3]] = distinct !{[[LOOP3]], [[META2]], [[META1]]}
;.
; MAXIMIZE: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]}
; MAXIMIZE: [[META1]] = !{!"llvm.loop.isvectorized", i32 1}
; MAXIMIZE: [[META2]] = !{!"llvm.loop.unroll.runtime.disable"}
; MAXIMIZE: [[LOOP3]] = distinct !{[[LOOP3]], [[META2]], [[META1]]}
;.