| ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5 | |
| ; RUN: opt -p loop-vectorize -mcpu=z16 -force-target-instruction-cost=1 -S %s | FileCheck %s | |
| target triple = "systemz-unknown-linux-unknown" | |
| define void @test_scalar_steps_target_instruction_cost(ptr %dst) { | |
| ; CHECK-LABEL: define void @test_scalar_steps_target_instruction_cost( | |
| ; CHECK-SAME: ptr [[DST:%.*]]) #[[ATTR0:[0-9]+]] { | |
| ; CHECK-NEXT: [[ENTRY:.*:]] | |
| ; CHECK-NEXT: br label %[[VECTOR_PH:.*]] | |
| ; CHECK: [[VECTOR_PH]]: | |
| ; CHECK-NEXT: br label %[[VECTOR_BODY:.*]] | |
| ; CHECK: [[VECTOR_BODY]]: | |
| ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[PRED_STORE_CONTINUE2:.*]] ] | |
| ; CHECK-NEXT: [[VEC_IND:%.*]] = phi <2 x i8> [ <i8 0, i8 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[PRED_STORE_CONTINUE2]] ] | |
| ; CHECK-NEXT: [[TMP0:%.*]] = icmp ule <2 x i8> [[VEC_IND]], splat (i8 8) | |
| ; CHECK-NEXT: [[OFFSET_IDX:%.*]] = mul nuw i64 [[INDEX]], 3 | |
| ; CHECK-NEXT: [[TMP1:%.*]] = extractelement <2 x i1> [[TMP0]], i64 0 | |
| ; CHECK-NEXT: br i1 [[TMP1]], label %[[PRED_STORE_IF:.*]], label %[[PRED_STORE_CONTINUE:.*]] | |
| ; CHECK: [[PRED_STORE_IF]]: | |
| ; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i64, ptr [[DST]], i64 [[OFFSET_IDX]] | |
| ; CHECK-NEXT: store i64 [[OFFSET_IDX]], ptr [[TMP2]], align 8 | |
| ; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE]] | |
| ; CHECK: [[PRED_STORE_CONTINUE]]: | |
| ; CHECK-NEXT: [[TMP4:%.*]] = extractelement <2 x i1> [[TMP0]], i64 1 | |
| ; CHECK-NEXT: br i1 [[TMP4]], label %[[PRED_STORE_IF1:.*]], label %[[PRED_STORE_CONTINUE2]] | |
| ; CHECK: [[PRED_STORE_IF1]]: | |
| ; CHECK-NEXT: [[TMP5:%.*]] = add i64 [[OFFSET_IDX]], 3 | |
| ; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds i64, ptr [[DST]], i64 [[TMP5]] | |
| ; CHECK-NEXT: store i64 [[TMP5]], ptr [[TMP6]], align 8 | |
| ; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE2]] | |
| ; CHECK: [[PRED_STORE_CONTINUE2]]: | |
| ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2 | |
| ; CHECK-NEXT: [[VEC_IND_NEXT]] = add nuw <2 x i8> [[VEC_IND]], splat (i8 2) | |
| ; CHECK-NEXT: [[TMP7:%.*]] = icmp eq i64 [[INDEX_NEXT]], 10 | |
| ; CHECK-NEXT: br i1 [[TMP7]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]] | |
| ; CHECK: [[MIDDLE_BLOCK]]: | |
| ; CHECK-NEXT: br label %[[EXIT:.*]] | |
| ; CHECK: [[EXIT]]: | |
| ; CHECK-NEXT: ret void | |
| ; | |
| entry: | |
| br label %loop | |
| loop: | |
| %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] | |
| %gep = getelementptr inbounds i64, ptr %dst, i64 %iv | |
| store i64 %iv, ptr %gep, align 8 | |
| %iv.next = add nuw nsw i64 %iv, 3 | |
| %cmp = icmp ult i64 %iv, 22 | |
| br i1 %cmp, label %loop, label %exit | |
| exit: | |
| ret void | |
| } | |
| ;. | |
| ; CHECK: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]} | |
| ; CHECK: [[META1]] = !{!"llvm.loop.isvectorized", i32 1} | |
| ; CHECK: [[META2]] = !{!"llvm.loop.unroll.runtime.disable"} | |
| ;. |