llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-replicate-extends.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals none --version 6
; RUN: opt -passes=loop-vectorize -S < %s | FileCheck %s

target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "aarch64"

define double @test(i32 %0) {
; CHECK-LABEL: define double @test(
; CHECK-SAME: i32 [[TMP0:%.*]]) {
; CHECK-NEXT:  [[ENTRY:.*:]]
; CHECK-NEXT:    br label %[[VECTOR_PH:.*]]
; CHECK:       [[VECTOR_PH]]:
; CHECK-NEXT:    [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
; CHECK-NEXT:    [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x i64> poison, i64 [[TMP1]], i64 0
; CHECK-NEXT:    [[BROADCAST_SPLAT:%.*]] = shufflevector <2 x i64> [[BROADCAST_SPLATINSERT]], <2 x i64> poison, <2 x i32> zeroinitializer
; CHECK-NEXT:    br label %[[VECTOR_BODY:.*]]
; CHECK:       [[VECTOR_BODY]]:
; CHECK-NEXT:    [[TMP2:%.*]] = or <2 x i64> zeroinitializer, [[BROADCAST_SPLAT]]
; CHECK-NEXT:    br label %[[MIDDLE_BLOCK:.*]]
; CHECK:       [[MIDDLE_BLOCK]]:
; CHECK-NEXT:    [[TMP3:%.*]] = call i64 @llvm.vector.reduce.or.v2i64(<2 x i64> [[TMP2]])
; CHECK-NEXT:    br label %[[EXIT:.*]]
; CHECK:       [[EXIT]]:
; CHECK-NEXT:    [[RET:%.*]] = uitofp i64 [[TMP3]] to double
; CHECK-NEXT:    ret double [[RET]]
;
entry:
  br label %for.body

for.body:
  %redux = phi i64 [ 0, %entry ], [ %binop, %for.body ]
  %iv = phi i64 [ 0, %entry ], [ %next.iv, %for.body ]
  %ext = zext i32 %0 to i64
  %binop = or i64 %redux, %ext
  %gep = getelementptr [8 x i8], ptr null, i64 %ext
  %load = load double, ptr %gep, align 8
  %next.iv = add i64 %iv, 1
  %exitcond.not = icmp eq i64 %iv, 1
  br i1 %exitcond.not, label %exit, label %for.body

exit:
  %ret = uitofp i64 %binop to double
  ret double %ret
}