llvm/test/Transforms/LoopVectorize/AArch64/diff-checks-force-interleave-count.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals none --filter-out-after "^vector.ph:" --version 6
; RUN: opt -passes loop-vectorize -mattr=+sve2 -force-vector-width="vscale x 2" -force-vector-interleave=1 -S < %s | FileCheck %s

target triple = "aarch64-unknown-linux-gnu"

; Tests that diff checks honor `-force-vector-interleave` for the check width, not the cost model.

define void @diff_check_d(ptr %src, ptr %dst, i64 %n) {
; CHECK-LABEL: define void @diff_check_d(
; CHECK-SAME: ptr [[SRC:%.*]], ptr [[DST:%.*]], i64 [[N:%.*]]) #[[ATTR0:[0-9]+]] {
; CHECK-NEXT:  [[ENTRY:.*:]]
; CHECK-NEXT:    [[SRC2:%.*]] = ptrtoaddr ptr [[SRC]] to i64
; CHECK-NEXT:    [[DST1:%.*]] = ptrtoaddr ptr [[DST]] to i64
; CHECK-NEXT:    [[TMP0:%.*]] = call i64 @llvm.vscale.i64()
; CHECK-NEXT:    [[TMP1:%.*]] = shl nuw i64 [[TMP0]], 1
; CHECK-NEXT:    [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[N]], [[TMP1]]
; CHECK-NEXT:    br i1 [[MIN_ITERS_CHECK]], [[SCALAR_PH:label %.*]], label %[[VECTOR_MEMCHECK:.*]]
; CHECK:       [[VECTOR_MEMCHECK]]:
; CHECK-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 4
; CHECK-NEXT:    [[TMP4:%.*]] = add i64 [[TMP3]], -1
; CHECK-NEXT:    [[TMP5:%.*]] = sub i64 [[DST1]], [[SRC2]]
; CHECK-NEXT:    [[TMP6:%.*]] = sub i64 [[TMP5]], 1
; CHECK-NEXT:    [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP6]], [[TMP4]]
; CHECK-NEXT:    br i1 [[DIFF_CHECK]], [[SCALAR_PH]], label %[[VECTOR_PH:.*]]
; CHECK:       [[VECTOR_PH]]:
;
entry:
  br label %loop

loop:
  %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
  %src.gep = getelementptr inbounds i64, ptr %src, i64 %iv
  %value = load i64, ptr %src.gep, align 8
  %dst.gep = getelementptr inbounds i64, ptr %dst, i64 %iv
  store i64 %value, ptr %dst.gep, align 8
  %iv.next = add nuw nsw i64 %iv, 1
  %done = icmp eq i64 %iv.next, %n
  br i1 %done, label %exit, label %loop

exit:
  ret void
}