llvm/test/CodeGen/VE/Vector/mask_binary.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=ve -mattr=+vpu | FileCheck %s

; Function Attrs: nounwind
define fastcc <256 x i1> @and_mm_v256i1(<256 x i1> %x, <256 x i1> %y) {
; CHECK-LABEL: and_mm_v256i1:
; CHECK:       # %bb.0:
; CHECK-NEXT:    andm %vm1, %vm1, %vm2
; CHECK-NEXT:    b.l.t (, %s10)
  %z = and <256 x i1> %x, %y
  ret <256 x i1> %z
}

; Function Attrs: nounwind
define fastcc <256 x i1> @or_mm_v256i1(<256 x i1> %x, <256 x i1> %y) {
; CHECK-LABEL: or_mm_v256i1:
; CHECK:       # %bb.0:
; CHECK-NEXT:    orm %vm1, %vm1, %vm2
; CHECK-NEXT:    b.l.t (, %s10)
  %z = or <256 x i1> %x, %y
  ret <256 x i1> %z
}

; Function Attrs: nounwind
define fastcc <256 x i1> @xor_mm_v256i1(<256 x i1> %x, <256 x i1> %y) {
; CHECK-LABEL: xor_mm_v256i1:
; CHECK:       # %bb.0:
; CHECK-NEXT:    xorm %vm1, %vm1, %vm2
; CHECK-NEXT:    b.l.t (, %s10)
  %z = xor <256 x i1> %x, %y
  ret <256 x i1> %z
}