llvm/test/CodeGen/AMDGPU/loop_header_nopred.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=amdgpu10.10 -o - -run-pass=block-placement -mattr=-inst-fwd-prefetch-bug -verify-machineinstrs %s | FileCheck -check-prefixes=GFX10 %s
# RUN: llc -mtriple=amdgpu11.00 -o - -run-pass=block-placement -mattr=-inst-fwd-prefetch-bug -verify-machineinstrs %s | FileCheck -check-prefixes=GFX11 %s

# RUN: llc -mtriple=amdgpu11.00 -o - -passes='require<profile-summary>,function(machine-function(block-placement<tail-merge>))' -mattr=-inst-fwd-prefetch-bug -verify-machineinstrs %s | FileCheck -check-prefixes=GFX11 %s

# Used to fail with
# Assertion `Out && "Header of loop has no predecessors from outside loop?"

---
name:            loop_header_nopred
body:             |
  ; GFX10-LABEL: name: loop_header_nopred
  ; GFX10: bb.0:
  ; GFX10-NEXT:   successors: %bb.2(0x80000000)
  ; GFX10-NEXT: {{  $}}
  ; GFX10-NEXT:   S_BRANCH %bb.2
  ; GFX10-NEXT: {{  $}}
  ; GFX10-NEXT: bb.1 (align 64):
  ; GFX10-NEXT:   successors: %bb.7(0x04000000), %bb.2(0x7c000000)
  ; GFX10-NEXT: {{  $}}
  ; GFX10-NEXT:   S_CBRANCH_VCCNZ %bb.7, implicit $vcc_lo
  ; GFX10-NEXT: {{  $}}
  ; GFX10-NEXT: bb.2:
  ; GFX10-NEXT:   successors: %bb.5(0x40000000), %bb.1(0x40000000)
  ; GFX10-NEXT: {{  $}}
  ; GFX10-NEXT:   S_CBRANCH_EXECZ %bb.1, implicit $exec
  ; GFX10-NEXT: {{  $}}
  ; GFX10-NEXT: bb.5:
  ; GFX10-NEXT:   successors: %bb.1(0x04000000), %bb.5(0x7c000000)
  ; GFX10-NEXT: {{  $}}
  ; GFX10-NEXT:   S_NOP 0
  ; GFX10-NEXT:   S_NOP 0
  ; GFX10-NEXT:   S_NOP 0
  ; GFX10-NEXT:   S_NOP 0
  ; GFX10-NEXT:   S_NOP 0
  ; GFX10-NEXT:   S_NOP 0
  ; GFX10-NEXT:   S_NOP 0
  ; GFX10-NEXT:   S_NOP 0
  ; GFX10-NEXT:   S_NOP 0
  ; GFX10-NEXT:   S_NOP 0
  ; GFX10-NEXT:   S_NOP 0
  ; GFX10-NEXT:   S_CBRANCH_EXECZ %bb.5, implicit $exec
  ; GFX10-NEXT:   S_BRANCH %bb.1
  ; GFX10-NEXT: {{  $}}
  ; GFX10-NEXT: bb.7:
  ; GFX10-NEXT:   S_ENDPGM 0
  ;
  ; GFX11-LABEL: name: loop_header_nopred
  ; GFX11: bb.0:
  ; GFX11-NEXT:   successors: %bb.2(0x80000000)
  ; GFX11-NEXT: {{  $}}
  ; GFX11-NEXT:   S_BRANCH %bb.2
  ; GFX11-NEXT: {{  $}}
  ; GFX11-NEXT: bb.1:
  ; GFX11-NEXT:   successors: %bb.7(0x04000000), %bb.2(0x7c000000)
  ; GFX11-NEXT: {{  $}}
  ; GFX11-NEXT:   S_CBRANCH_VCCNZ %bb.7, implicit $vcc_lo
  ; GFX11-NEXT: {{  $}}
  ; GFX11-NEXT: bb.2:
  ; GFX11-NEXT:   successors: %bb.5(0x40000000), %bb.1(0x40000000)
  ; GFX11-NEXT: {{  $}}
  ; GFX11-NEXT:   S_CBRANCH_EXECZ %bb.1, implicit $exec
  ; GFX11-NEXT: {{  $}}
  ; GFX11-NEXT: bb.5:
  ; GFX11-NEXT:   successors: %bb.1(0x04000000), %bb.5(0x7c000000)
  ; GFX11-NEXT: {{  $}}
  ; GFX11-NEXT:   S_NOP 0
  ; GFX11-NEXT:   S_NOP 0
  ; GFX11-NEXT:   S_NOP 0
  ; GFX11-NEXT:   S_NOP 0
  ; GFX11-NEXT:   S_NOP 0
  ; GFX11-NEXT:   S_NOP 0
  ; GFX11-NEXT:   S_NOP 0
  ; GFX11-NEXT:   S_NOP 0
  ; GFX11-NEXT:   S_NOP 0
  ; GFX11-NEXT:   S_NOP 0
  ; GFX11-NEXT:   S_NOP 0
  ; GFX11-NEXT:   S_CBRANCH_EXECZ %bb.5, implicit $exec
  ; GFX11-NEXT:   S_BRANCH %bb.1
  ; GFX11-NEXT: {{  $}}
  ; GFX11-NEXT: bb.7:
  ; GFX11-NEXT:   S_ENDPGM 0
  bb.0:
    successors: %bb.1(0x80000000)

  bb.1:
    successors: %bb.2(0x40000000), %bb.3(0x40000000)

    S_CBRANCH_VCCZ %bb.3, implicit $vcc
    S_BRANCH %bb.2

  bb.2:
    successors: %bb.3(0x80000000)

  bb.3:
    successors: %bb.4(0x40000000), %bb.6(0x40000000)

    S_CBRANCH_EXECZ %bb.6, implicit $exec
    S_BRANCH %bb.4

  bb.4:
    successors: %bb.5(0x04000000), %bb.4(0x7c000000)

    S_NOP 0
    S_NOP 0
    S_NOP 0
    S_NOP 0
    S_NOP 0
    S_NOP 0
    S_NOP 0
    S_NOP 0
    S_NOP 0
    S_NOP 0
    S_NOP 0
    S_CBRANCH_EXECZ %bb.4, implicit $exec

  bb.5:
    successors: %bb.6(0x80000000)

  bb.6:
    successors: %bb.7(0x04000000), %bb.1(0x7c000000)

    S_CBRANCH_VCCZ %bb.1, implicit $vcc

  bb.7:
    S_ENDPGM 0
...