llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.store.format.d16.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc -mtriple=amdgpu8.02-amd-amdhsa < %s | FileCheck -enable-var-scope -check-prefixes=GCN,UNPACKED %s
; RUN: llc -mtriple=amdgpu8.10-amd-amdhsa < %s | FileCheck -enable-var-scope -check-prefixes=GCN,PACKED %s
; RUN: llc -mtriple=amdgpu9.00-amd-amdhsa < %s | FileCheck -enable-var-scope -check-prefixes=GCN,PACKED %s
; RUN: llc -mtriple=amdgpu11.00-amd-amdhsa -mattr=+real-true16 < %s | FileCheck -enable-var-scope -check-prefixes=GFX11,GFX11-TRUE16 %s
; RUN: llc -mtriple=amdgpu11.00-amd-amdhsa -mattr=-real-true16 < %s | FileCheck -enable-var-scope -check-prefixes=GFX11,GFX11-FAKE16 %s
; RUN: llc -mtriple=amdgpu12.00-amd-amdhsa -mattr=+real-true16 < %s | FileCheck -enable-var-scope -check-prefixes=GFX12,GFX12-TRUE16 %s
; RUN: llc -mtriple=amdgpu12.00-amd-amdhsa -mattr=-real-true16 < %s | FileCheck -enable-var-scope -check-prefixes=GFX12,GFX12-FAKE16 %s

define amdgpu_kernel void @buffer_store_format_d16_x(ptr addrspace(8) %rsrc, [8 x i32], half %data, [8 x i32], i32 %index) {
; GCN-LABEL: buffer_store_format_d16_x:
; GCN:       ; %bb.0: ; %main_body
; GCN-NEXT:    s_load_dword s4, s[8:9], 0x30
; GCN-NEXT:    s_load_dword s5, s[8:9], 0x54
; GCN-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NEXT:    v_mov_b32_e32 v0, s4
; GCN-NEXT:    v_mov_b32_e32 v1, s5
; GCN-NEXT:    buffer_store_format_d16_x v0, v1, s[0:3], 0 idxen
; GCN-NEXT:    s_endpgm
;
; GFX11-TRUE16-LABEL: buffer_store_format_d16_x:
; GFX11-TRUE16:       ; %bb.0: ; %main_body
; GFX11-TRUE16-NEXT:    s_clause 0x2
; GFX11-TRUE16-NEXT:    s_load_b32 s6, s[4:5], 0x30
; GFX11-TRUE16-NEXT:    s_load_b32 s7, s[4:5], 0x54
; GFX11-TRUE16-NEXT:    s_load_b128 s[0:3], s[4:5], 0x0
; GFX11-TRUE16-NEXT:    s_waitcnt lgkmcnt(0)
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v0.l, s6
; GFX11-TRUE16-NEXT:    v_mov_b32_e32 v1, s7
; GFX11-TRUE16-NEXT:    buffer_store_d16_format_x v0, v1, s[0:3], 0 idxen
; GFX11-TRUE16-NEXT:    s_endpgm
;
; GFX11-FAKE16-LABEL: buffer_store_format_d16_x:
; GFX11-FAKE16:       ; %bb.0: ; %main_body
; GFX11-FAKE16-NEXT:    s_clause 0x2
; GFX11-FAKE16-NEXT:    s_load_b32 s6, s[4:5], 0x30
; GFX11-FAKE16-NEXT:    s_load_b32 s7, s[4:5], 0x54
; GFX11-FAKE16-NEXT:    s_load_b128 s[0:3], s[4:5], 0x0
; GFX11-FAKE16-NEXT:    s_waitcnt lgkmcnt(0)
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v0, s6 :: v_dual_mov_b32 v1, s7
; GFX11-FAKE16-NEXT:    buffer_store_d16_format_x v0, v1, s[0:3], 0 idxen
; GFX11-FAKE16-NEXT:    s_endpgm
;
; GFX12-TRUE16-LABEL: buffer_store_format_d16_x:
; GFX12-TRUE16:       ; %bb.0: ; %main_body
; GFX12-TRUE16-NEXT:    s_clause 0x2
; GFX12-TRUE16-NEXT:    s_load_b32 s6, s[4:5], 0x30
; GFX12-TRUE16-NEXT:    s_load_b32 s7, s[4:5], 0x54
; GFX12-TRUE16-NEXT:    s_load_b128 s[0:3], s[4:5], 0x0
; GFX12-TRUE16-NEXT:    s_wait_kmcnt 0x0
; GFX12-TRUE16-NEXT:    v_mov_b16_e32 v0.l, s6
; GFX12-TRUE16-NEXT:    v_mov_b32_e32 v1, s7
; GFX12-TRUE16-NEXT:    buffer_store_d16_format_x v0, v1, s[0:3], null idxen
; GFX12-TRUE16-NEXT:    s_endpgm
;
; GFX12-FAKE16-LABEL: buffer_store_format_d16_x:
; GFX12-FAKE16:       ; %bb.0: ; %main_body
; GFX12-FAKE16-NEXT:    s_clause 0x2
; GFX12-FAKE16-NEXT:    s_load_b32 s6, s[4:5], 0x30
; GFX12-FAKE16-NEXT:    s_load_b32 s7, s[4:5], 0x54
; GFX12-FAKE16-NEXT:    s_load_b128 s[0:3], s[4:5], 0x0
; GFX12-FAKE16-NEXT:    s_wait_kmcnt 0x0
; GFX12-FAKE16-NEXT:    v_dual_mov_b32 v0, s6 :: v_dual_mov_b32 v1, s7
; GFX12-FAKE16-NEXT:    buffer_store_d16_format_x v0, v1, s[0:3], null idxen
; GFX12-FAKE16-NEXT:    s_endpgm
main_body:
  call void @llvm.amdgcn.struct.ptr.buffer.store.format.f16(half %data, ptr addrspace(8) %rsrc, i32 %index, i32 0, i32 0, i32 0)
  ret void
}

define amdgpu_kernel void @buffer_store_format_d16_xy(ptr addrspace(8) %rsrc, <2 x half> %data, i32 %index) {
; UNPACKED-LABEL: buffer_store_format_d16_xy:
; UNPACKED:       ; %bb.0: ; %main_body
; UNPACKED-NEXT:    s_load_dwordx2 s[4:5], s[8:9], 0x10
; UNPACKED-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; UNPACKED-NEXT:    s_waitcnt lgkmcnt(0)
; UNPACKED-NEXT:    s_lshr_b32 s6, s4, 16
; UNPACKED-NEXT:    s_and_b32 s4, s4, 0xffff
; UNPACKED-NEXT:    v_mov_b32_e32 v0, s4
; UNPACKED-NEXT:    v_mov_b32_e32 v1, s6
; UNPACKED-NEXT:    v_mov_b32_e32 v2, s5
; UNPACKED-NEXT:    buffer_store_format_d16_xy v[0:1], v2, s[0:3], 0 idxen
; UNPACKED-NEXT:    s_endpgm
;
; PACKED-LABEL: buffer_store_format_d16_xy:
; PACKED:       ; %bb.0: ; %main_body
; PACKED-NEXT:    s_load_dwordx2 s[4:5], s[8:9], 0x10
; PACKED-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; PACKED-NEXT:    s_waitcnt lgkmcnt(0)
; PACKED-NEXT:    v_mov_b32_e32 v0, s4
; PACKED-NEXT:    v_mov_b32_e32 v1, s5
; PACKED-NEXT:    buffer_store_format_d16_xy v0, v1, s[0:3], 0 idxen
; PACKED-NEXT:    s_endpgm
;
; GFX11-LABEL: buffer_store_format_d16_xy:
; GFX11:       ; %bb.0: ; %main_body
; GFX11-NEXT:    s_clause 0x1
; GFX11-NEXT:    s_load_b64 s[6:7], s[4:5], 0x10
; GFX11-NEXT:    s_load_b128 s[0:3], s[4:5], 0x0
; GFX11-NEXT:    s_waitcnt lgkmcnt(0)
; GFX11-NEXT:    v_dual_mov_b32 v0, s6 :: v_dual_mov_b32 v1, s7
; GFX11-NEXT:    buffer_store_d16_format_xy v0, v1, s[0:3], 0 idxen
; GFX11-NEXT:    s_endpgm
;
; GFX12-LABEL: buffer_store_format_d16_xy:
; GFX12:       ; %bb.0: ; %main_body
; GFX12-NEXT:    s_clause 0x1
; GFX12-NEXT:    s_load_b64 s[6:7], s[4:5], 0x10
; GFX12-NEXT:    s_load_b128 s[0:3], s[4:5], 0x0
; GFX12-NEXT:    s_wait_kmcnt 0x0
; GFX12-NEXT:    v_dual_mov_b32 v0, s6 :: v_dual_mov_b32 v1, s7
; GFX12-NEXT:    buffer_store_d16_format_xy v0, v1, s[0:3], null idxen
; GFX12-NEXT:    s_endpgm
main_body:
  call void @llvm.amdgcn.struct.ptr.buffer.store.format.v2f16(<2 x half> %data, ptr addrspace(8) %rsrc, i32 %index, i32 0, i32 0, i32 0)
  ret void
}

define amdgpu_kernel void @buffer_store_format_d16_xyz(ptr addrspace(8) %rsrc, <4 x half> %data, i32 %index) {
; UNPACKED-LABEL: buffer_store_format_d16_xyz:
; UNPACKED:       ; %bb.0: ; %main_body
; UNPACKED-NEXT:    s_load_dwordx2 s[4:5], s[8:9], 0x10
; UNPACKED-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; UNPACKED-NEXT:    s_load_dword s6, s[8:9], 0x18
; UNPACKED-NEXT:    s_waitcnt lgkmcnt(0)
; UNPACKED-NEXT:    s_and_b32 s5, s5, 0xffff
; UNPACKED-NEXT:    s_lshr_b32 s7, s4, 16
; UNPACKED-NEXT:    s_and_b32 s4, s4, 0xffff
; UNPACKED-NEXT:    v_mov_b32_e32 v0, s4
; UNPACKED-NEXT:    v_mov_b32_e32 v1, s7
; UNPACKED-NEXT:    v_mov_b32_e32 v2, s5
; UNPACKED-NEXT:    v_mov_b32_e32 v3, s6
; UNPACKED-NEXT:    buffer_store_format_d16_xyz v[0:2], v3, s[0:3], 0 idxen
; UNPACKED-NEXT:    s_endpgm
;
; PACKED-LABEL: buffer_store_format_d16_xyz:
; PACKED:       ; %bb.0: ; %main_body
; PACKED-NEXT:    s_load_dwordx2 s[4:5], s[8:9], 0x10
; PACKED-NEXT:    s_load_dword s6, s[8:9], 0x18
; PACKED-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; PACKED-NEXT:    s_waitcnt lgkmcnt(0)
; PACKED-NEXT:    s_and_b32 s5, s5, 0xffff
; PACKED-NEXT:    v_mov_b32_e32 v0, s4
; PACKED-NEXT:    v_mov_b32_e32 v1, s5
; PACKED-NEXT:    v_mov_b32_e32 v2, s6
; PACKED-NEXT:    buffer_store_format_d16_xyz v[0:1], v2, s[0:3], 0 idxen
; PACKED-NEXT:    s_endpgm
;
; GFX11-LABEL: buffer_store_format_d16_xyz:
; GFX11:       ; %bb.0: ; %main_body
; GFX11-NEXT:    s_clause 0x2
; GFX11-NEXT:    s_load_b64 s[6:7], s[4:5], 0x10
; GFX11-NEXT:    s_load_b32 s8, s[4:5], 0x18
; GFX11-NEXT:    s_load_b128 s[0:3], s[4:5], 0x0
; GFX11-NEXT:    s_waitcnt lgkmcnt(0)
; GFX11-NEXT:    s_and_b32 s4, s7, 0xffff
; GFX11-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-NEXT:    v_dual_mov_b32 v0, s6 :: v_dual_mov_b32 v1, s4
; GFX11-NEXT:    v_mov_b32_e32 v2, s8
; GFX11-NEXT:    buffer_store_d16_format_xyz v[0:1], v2, s[0:3], 0 idxen
; GFX11-NEXT:    s_endpgm
;
; GFX12-LABEL: buffer_store_format_d16_xyz:
; GFX12:       ; %bb.0: ; %main_body
; GFX12-NEXT:    s_clause 0x1
; GFX12-NEXT:    s_load_b96 s[8:10], s[4:5], 0x10
; GFX12-NEXT:    s_load_b128 s[0:3], s[4:5], 0x0
; GFX12-NEXT:    s_wait_kmcnt 0x0
; GFX12-NEXT:    s_and_b32 s4, s9, 0xffff
; GFX12-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)
; GFX12-NEXT:    v_dual_mov_b32 v0, s8 :: v_dual_mov_b32 v1, s4
; GFX12-NEXT:    v_mov_b32_e32 v2, s10
; GFX12-NEXT:    buffer_store_d16_format_xyz v[0:1], v2, s[0:3], null idxen
; GFX12-NEXT:    s_endpgm
main_body:
  %data_subvec = shufflevector <4 x half> %data, <4 x half> poison, <3 x i32> <i32 0, i32 1, i32 2>
  call void @llvm.amdgcn.struct.ptr.buffer.store.format.v3f16(<3 x half> %data_subvec, ptr addrspace(8) %rsrc, i32 %index, i32 0, i32 0, i32 0)
  ret void
}

define amdgpu_kernel void @buffer_store_format_d16_xyzw(ptr addrspace(8) %rsrc, <4 x half> %data, i32 %index) {
; UNPACKED-LABEL: buffer_store_format_d16_xyzw:
; UNPACKED:       ; %bb.0: ; %main_body
; UNPACKED-NEXT:    s_load_dwordx2 s[4:5], s[8:9], 0x10
; UNPACKED-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; UNPACKED-NEXT:    s_load_dword s6, s[8:9], 0x18
; UNPACKED-NEXT:    s_waitcnt lgkmcnt(0)
; UNPACKED-NEXT:    s_lshr_b32 s7, s5, 16
; UNPACKED-NEXT:    s_and_b32 s5, s5, 0xffff
; UNPACKED-NEXT:    s_lshr_b32 s8, s4, 16
; UNPACKED-NEXT:    s_and_b32 s4, s4, 0xffff
; UNPACKED-NEXT:    v_mov_b32_e32 v0, s4
; UNPACKED-NEXT:    v_mov_b32_e32 v1, s8
; UNPACKED-NEXT:    v_mov_b32_e32 v2, s5
; UNPACKED-NEXT:    v_mov_b32_e32 v3, s7
; UNPACKED-NEXT:    v_mov_b32_e32 v4, s6
; UNPACKED-NEXT:    buffer_store_format_d16_xyzw v[0:3], v4, s[0:3], 0 idxen
; UNPACKED-NEXT:    s_endpgm
;
; PACKED-LABEL: buffer_store_format_d16_xyzw:
; PACKED:       ; %bb.0: ; %main_body
; PACKED-NEXT:    s_load_dwordx2 s[4:5], s[8:9], 0x10
; PACKED-NEXT:    s_load_dword s6, s[8:9], 0x18
; PACKED-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; PACKED-NEXT:    s_waitcnt lgkmcnt(0)
; PACKED-NEXT:    v_mov_b32_e32 v0, s4
; PACKED-NEXT:    v_mov_b32_e32 v1, s5
; PACKED-NEXT:    v_mov_b32_e32 v2, s6
; PACKED-NEXT:    buffer_store_format_d16_xyzw v[0:1], v2, s[0:3], 0 idxen
; PACKED-NEXT:    s_endpgm
;
; GFX11-LABEL: buffer_store_format_d16_xyzw:
; GFX11:       ; %bb.0: ; %main_body
; GFX11-NEXT:    s_clause 0x2
; GFX11-NEXT:    s_load_b64 s[6:7], s[4:5], 0x10
; GFX11-NEXT:    s_load_b32 s8, s[4:5], 0x18
; GFX11-NEXT:    s_load_b128 s[0:3], s[4:5], 0x0
; GFX11-NEXT:    s_waitcnt lgkmcnt(0)
; GFX11-NEXT:    v_dual_mov_b32 v0, s6 :: v_dual_mov_b32 v1, s7
; GFX11-NEXT:    v_mov_b32_e32 v2, s8
; GFX11-NEXT:    buffer_store_d16_format_xyzw v[0:1], v2, s[0:3], 0 idxen
; GFX11-NEXT:    s_endpgm
;
; GFX12-LABEL: buffer_store_format_d16_xyzw:
; GFX12:       ; %bb.0: ; %main_body
; GFX12-NEXT:    s_clause 0x1
; GFX12-NEXT:    s_load_b96 s[8:10], s[4:5], 0x10
; GFX12-NEXT:    s_load_b128 s[0:3], s[4:5], 0x0
; GFX12-NEXT:    s_wait_kmcnt 0x0
; GFX12-NEXT:    v_dual_mov_b32 v0, s8 :: v_dual_mov_b32 v1, s9
; GFX12-NEXT:    v_mov_b32_e32 v2, s10
; GFX12-NEXT:    buffer_store_d16_format_xyzw v[0:1], v2, s[0:3], null idxen
; GFX12-NEXT:    s_endpgm
main_body:
  call void @llvm.amdgcn.struct.ptr.buffer.store.format.v4f16(<4 x half> %data, ptr addrspace(8) %rsrc, i32 %index, i32 0, i32 0, i32 0)
  ret void
}

define amdgpu_kernel void @buffer_store_format_i16_x(ptr addrspace(8) %rsrc, [8 x i32], i16 %data, [8 x i32], i32 %index) {
; GCN-LABEL: buffer_store_format_i16_x:
; GCN:       ; %bb.0: ; %main_body
; GCN-NEXT:    s_load_dword s4, s[8:9], 0x30
; GCN-NEXT:    s_load_dword s5, s[8:9], 0x54
; GCN-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NEXT:    v_mov_b32_e32 v0, s4
; GCN-NEXT:    v_mov_b32_e32 v1, s5
; GCN-NEXT:    buffer_store_format_d16_x v0, v1, s[0:3], 0 idxen
; GCN-NEXT:    s_endpgm
;
; GFX11-TRUE16-LABEL: buffer_store_format_i16_x:
; GFX11-TRUE16:       ; %bb.0: ; %main_body
; GFX11-TRUE16-NEXT:    s_clause 0x2
; GFX11-TRUE16-NEXT:    s_load_b32 s6, s[4:5], 0x30
; GFX11-TRUE16-NEXT:    s_load_b32 s7, s[4:5], 0x54
; GFX11-TRUE16-NEXT:    s_load_b128 s[0:3], s[4:5], 0x0
; GFX11-TRUE16-NEXT:    s_waitcnt lgkmcnt(0)
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v0.l, s6
; GFX11-TRUE16-NEXT:    v_mov_b32_e32 v1, s7
; GFX11-TRUE16-NEXT:    buffer_store_d16_format_x v0, v1, s[0:3], 0 idxen
; GFX11-TRUE16-NEXT:    s_endpgm
;
; GFX11-FAKE16-LABEL: buffer_store_format_i16_x:
; GFX11-FAKE16:       ; %bb.0: ; %main_body
; GFX11-FAKE16-NEXT:    s_clause 0x2
; GFX11-FAKE16-NEXT:    s_load_b32 s6, s[4:5], 0x30
; GFX11-FAKE16-NEXT:    s_load_b32 s7, s[4:5], 0x54
; GFX11-FAKE16-NEXT:    s_load_b128 s[0:3], s[4:5], 0x0
; GFX11-FAKE16-NEXT:    s_waitcnt lgkmcnt(0)
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v0, s6 :: v_dual_mov_b32 v1, s7
; GFX11-FAKE16-NEXT:    buffer_store_d16_format_x v0, v1, s[0:3], 0 idxen
; GFX11-FAKE16-NEXT:    s_endpgm
;
; GFX12-TRUE16-LABEL: buffer_store_format_i16_x:
; GFX12-TRUE16:       ; %bb.0: ; %main_body
; GFX12-TRUE16-NEXT:    s_clause 0x2
; GFX12-TRUE16-NEXT:    s_load_b32 s6, s[4:5], 0x30
; GFX12-TRUE16-NEXT:    s_load_b32 s7, s[4:5], 0x54
; GFX12-TRUE16-NEXT:    s_load_b128 s[0:3], s[4:5], 0x0
; GFX12-TRUE16-NEXT:    s_wait_kmcnt 0x0
; GFX12-TRUE16-NEXT:    v_mov_b16_e32 v0.l, s6
; GFX12-TRUE16-NEXT:    v_mov_b32_e32 v1, s7
; GFX12-TRUE16-NEXT:    buffer_store_d16_format_x v0, v1, s[0:3], null idxen
; GFX12-TRUE16-NEXT:    s_endpgm
;
; GFX12-FAKE16-LABEL: buffer_store_format_i16_x:
; GFX12-FAKE16:       ; %bb.0: ; %main_body
; GFX12-FAKE16-NEXT:    s_clause 0x2
; GFX12-FAKE16-NEXT:    s_load_b32 s6, s[4:5], 0x30
; GFX12-FAKE16-NEXT:    s_load_b32 s7, s[4:5], 0x54
; GFX12-FAKE16-NEXT:    s_load_b128 s[0:3], s[4:5], 0x0
; GFX12-FAKE16-NEXT:    s_wait_kmcnt 0x0
; GFX12-FAKE16-NEXT:    v_dual_mov_b32 v0, s6 :: v_dual_mov_b32 v1, s7
; GFX12-FAKE16-NEXT:    buffer_store_d16_format_x v0, v1, s[0:3], null idxen
; GFX12-FAKE16-NEXT:    s_endpgm
main_body:
  call void @llvm.amdgcn.struct.ptr.buffer.store.format.i16(i16 %data, ptr addrspace(8) %rsrc, i32 %index, i32 0, i32 0, i32 0)
  ret void
}

declare void @llvm.amdgcn.struct.ptr.buffer.store.format.f16(half, ptr addrspace(8), i32, i32, i32, i32)
declare void @llvm.amdgcn.struct.ptr.buffer.store.format.v2f16(<2 x half>, ptr addrspace(8), i32, i32, i32, i32)
declare void @llvm.amdgcn.struct.ptr.buffer.store.format.v3f16(<3 x half>, ptr addrspace(8), i32, i32, i32, i32)
declare void @llvm.amdgcn.struct.ptr.buffer.store.format.v4f16(<4 x half>, ptr addrspace(8), i32, i32, i32, i32)
declare void @llvm.amdgcn.struct.ptr.buffer.store.format.i16(i16, ptr addrspace(8), i32, i32, i32, i32)