| # RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr9 -run-pass=prologepilog -ppc-enable-pe-vector-spills %s -o - | FileCheck %s |
| |
| --- |
| name: test1BB |
| alignment: 16 |
| tracksRegLiveness: true |
| liveins: |
| body: | |
| bb.0.entry: |
| $r14 = IMPLICIT_DEF |
| $r15 = IMPLICIT_DEF |
| $r16 = IMPLICIT_DEF |
| $f0 = IMPLICIT_DEF |
| $v20 = IMPLICIT_DEF |
| BLR8 implicit undef $lr8, implicit undef $rm |
| |
| # Use mtvsrdd to save two GPRs in a single instruction |
| # CHECK-LABEL: name: test1BB |
| # CHECK: body: | |
| # CHECK: liveins: $x14, $x15, $x16, $v20 |
| # CHECK: $v0 = MTVSRDD killed $x14, killed $x15 |
| # CHECK-NEXT: $vf1 = MTVSRD killed $x16 |
| # CHECK: $x16 = MFVSRD killed $vf1 |
| # CHECK-NEXT: $x15 = MFVSRLD $v0 |
| # CHECK-NEXT: $x14 = MFVSRD killed $vf0 |
| ... |
| |
| --- |
| name: test2BBs |
| alignment: 16 |
| tracksRegLiveness: true |
| liveins: |
| body: | |
| bb.0.entry: |
| successors: %bb.1, %bb.2 |
| |
| $cr0 = IMPLICIT_DEF |
| BCC 4, killed renamable $cr0, %bb.2 |
| B %bb.1 |
| |
| bb.1: |
| $r14 = IMPLICIT_DEF |
| $r15 = IMPLICIT_DEF |
| $r16 = IMPLICIT_DEF |
| $r3 = IMPLICIT_DEF |
| B %bb.3 |
| |
| bb.2: |
| $r3 = IMPLICIT_DEF |
| |
| bb.3: |
| BLR8 implicit undef $lr8, implicit undef $rm |
| |
| ## The spilled-to registers have to be marked as live-in so that they will not be |
| ## clobbered before restored in the epilogue. |
| # CHECK-LABEL: name: test2BB |
| # CHECK: body: | |
| # CHECK: $v0 = MTVSRDD killed $x14, killed $x15 |
| # CHECK-NEXT: $vf1 = MTVSRD killed $x16 |
| # CHECK: bb.2: |
| # CHECK-NEXT: successors: %bb.3 |
| # CHECK-NEXT: liveins: $v0, $v1 |
| # CHECK: bb.3: |
| # CHECK-NEXT: liveins: $v0, $v1 |
| # CHECK: $x16 = MFVSRD killed $vf1 |
| # CHECK-NEXT: $x15 = MFVSRLD $v0 |
| # CHECK-NEXT: $x14 = MFVSRD killed $vf0 |
| ... |