| ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py |
| ; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck %s --check-prefix=GFX9 |
| ; RUN: llc -march=amdgcn -mcpu=gfx1010 -verify-machineinstrs < %s | FileCheck %s --check-prefix=GFX10 |
| |
| define amdgpu_kernel void @test0() { |
| ; GFX9-LABEL: test0: |
| ; GFX9: ; %bb.0: |
| ; GFX9-NEXT: s_endpgm |
| ; |
| ; GFX10-LABEL: test0: |
| ; GFX10: ; %bb.0: |
| ; GFX10-NEXT: s_endpgm |
| tail call void @llvm.amdgcn.endpgm() |
| unreachable |
| } |
| |
| define void @test1() { |
| ; GFX9-LABEL: test1: |
| ; GFX9: ; %bb.0: |
| ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GFX9-NEXT: s_endpgm |
| ; |
| ; GFX10-LABEL: test1: |
| ; GFX10: ; %bb.0: |
| ; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GFX10-NEXT: s_waitcnt_vscnt null, 0x0 |
| ; GFX10-NEXT: s_endpgm |
| tail call void @llvm.amdgcn.endpgm() |
| unreachable |
| } |
| |
| define amdgpu_kernel void @test2(i32* %p, i32 %x) { |
| ; GFX9-LABEL: test2: |
| ; GFX9: ; %bb.0: |
| ; GFX9-NEXT: s_load_dword s2, s[0:1], 0x2c |
| ; GFX9-NEXT: s_waitcnt lgkmcnt(0) |
| ; GFX9-NEXT: s_cmp_lt_i32 s2, 1 |
| ; GFX9-NEXT: s_cbranch_scc0 .LBB2_2 |
| ; GFX9-NEXT: ; %bb.1: ; %else |
| ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24 |
| ; GFX9-NEXT: v_mov_b32_e32 v2, s2 |
| ; GFX9-NEXT: s_waitcnt lgkmcnt(0) |
| ; GFX9-NEXT: v_mov_b32_e32 v0, s0 |
| ; GFX9-NEXT: v_mov_b32_e32 v1, s1 |
| ; GFX9-NEXT: flat_store_dword v[0:1], v2 |
| ; GFX9-NEXT: s_endpgm |
| ; GFX9-NEXT: .LBB2_2: ; %then |
| ; GFX9-NEXT: s_endpgm |
| ; |
| ; GFX10-LABEL: test2: |
| ; GFX10: ; %bb.0: |
| ; GFX10-NEXT: s_load_dword s2, s[0:1], 0x2c |
| ; GFX10-NEXT: s_waitcnt lgkmcnt(0) |
| ; GFX10-NEXT: s_cmp_lt_i32 s2, 1 |
| ; GFX10-NEXT: s_cbranch_scc0 .LBB2_2 |
| ; GFX10-NEXT: ; %bb.1: ; %else |
| ; GFX10-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24 |
| ; GFX10-NEXT: v_mov_b32_e32 v2, s2 |
| ; GFX10-NEXT: s_waitcnt lgkmcnt(0) |
| ; GFX10-NEXT: v_mov_b32_e32 v0, s0 |
| ; GFX10-NEXT: v_mov_b32_e32 v1, s1 |
| ; GFX10-NEXT: flat_store_dword v[0:1], v2 |
| ; GFX10-NEXT: s_endpgm |
| ; GFX10-NEXT: .LBB2_2: ; %then |
| ; GFX10-NEXT: s_endpgm |
| %cond = icmp sgt i32 %x, 0 |
| br i1 %cond, label %then, label %else |
| |
| then: |
| tail call void @llvm.amdgcn.endpgm() |
| unreachable |
| |
| else: |
| store i32 %x, i32* %p |
| ret void |
| } |
| |
| declare void @llvm.amdgcn.endpgm() |