llvm/test/CodeGen/AMDGPU/fold-fi-operand-shrink.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=amdgcn-amd-amdhsa -verify-machineinstrs -run-pass si-fold-operands,dead-mi-elimination  %s -o - | FileCheck -check-prefix=GCN %s

---

# First operand is FI is in a VGPR, other operand is a VGPR
name: shrink_vgpr_fi_vgpr_v_add_i32_e64_no_carry_out_use
tracksRegLiveness: true
stack:
  - { id: 0, type: default, offset: 0, size: 64, alignment: 16 }
body:             |
  bb.0:
    liveins: $vgpr0

    ; GCN-LABEL: name: shrink_vgpr_fi_vgpr_v_add_i32_e64_no_carry_out_use
    ; GCN: liveins: $vgpr0
    ; GCN-NEXT: {{  $}}
    ; GCN-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
    ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
    ; GCN-NEXT: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 [[V_MOV_B32_e32_]], [[COPY]], implicit-def $vcc, implicit $exec
    ; GCN-NEXT: S_ENDPGM 0, implicit [[V_ADD_CO_U32_e32_]]
    %0:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
    %1:vgpr_32 = COPY $vgpr0
    %2:vgpr_32, %3:sreg_64 = V_ADD_CO_U32_e64 %0, %1, 0, implicit $exec
    S_ENDPGM 0, implicit %2

...

---

# First operand is a VGPR, other operand FI is in a VGPR
name: shrink_vgpr_vgpr_fi_v_add_i32_e64_no_carry_out_use
tracksRegLiveness: true
stack:
  - { id: 0, type: default, offset: 0, size: 64, alignment: 16 }
body:             |
  bb.0:
    liveins: $vgpr0

    ; GCN-LABEL: name: shrink_vgpr_vgpr_fi_v_add_i32_e64_no_carry_out_use
    ; GCN: liveins: $vgpr0
    ; GCN-NEXT: {{  $}}
    ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
    ; GCN-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
    ; GCN-NEXT: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 [[COPY]], [[V_MOV_B32_e32_]], implicit-def $vcc, implicit $exec
    ; GCN-NEXT: S_ENDPGM 0, implicit [[V_ADD_CO_U32_e32_]]
    %0:vgpr_32 = COPY $vgpr0
    %1:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
    %2:vgpr_32, %3:sreg_64 = V_ADD_CO_U32_e64 %0, %1, 0, implicit $exec
    S_ENDPGM 0, implicit %2

...

---

# First operand is FI is in an SGPR, other operand is a VGPR
name: shrink_vgpr_fi_sgpr_v_add_i32_e64_no_carry_out_use
tracksRegLiveness: true
stack:
  - { id: 0, type: default, offset: 0, size: 64, alignment: 16 }
body:             |
  bb.0:
    liveins: $sgpr0

    ; GCN-LABEL: name: shrink_vgpr_fi_sgpr_v_add_i32_e64_no_carry_out_use
    ; GCN: liveins: $sgpr0
    ; GCN-NEXT: {{  $}}
    ; GCN-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
    ; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr0
    ; GCN-NEXT: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64 = V_ADD_CO_U32_e64 [[COPY]], [[V_MOV_B32_e32_]], 0, implicit $exec
    ; GCN-NEXT: S_ENDPGM 0, implicit [[V_ADD_CO_U32_e64_]]
    %0:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
    %1:sreg_32_xm0 = COPY $sgpr0
    %2:vgpr_32, %3:sreg_64 = V_ADD_CO_U32_e64 %0, %1, 0, implicit $exec
    S_ENDPGM 0, implicit %2

...

---

# First operand is an SGPR, other operand FI is in a VGPR
name: shrink_sgpr_vgpr_fi_v_add_i32_e64_no_carry_out_use
tracksRegLiveness: true
stack:
  - { id: 0, type: default, offset: 0, size: 64, alignment: 16 }
body:             |
  bb.0:
    liveins: $sgpr0

    ; GCN-LABEL: name: shrink_sgpr_vgpr_fi_v_add_i32_e64_no_carry_out_use
    ; GCN: liveins: $sgpr0
    ; GCN-NEXT: {{  $}}
    ; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr0
    ; GCN-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
    ; GCN-NEXT: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64 = V_ADD_CO_U32_e64 [[V_MOV_B32_e32_]], [[COPY]], 0, implicit $exec
    ; GCN-NEXT: S_ENDPGM 0, implicit [[V_ADD_CO_U32_e64_]]
    %0:sreg_32_xm0 = COPY $sgpr0
    %1:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
    %2:vgpr_32, %3:sreg_64 = V_ADD_CO_U32_e64 %0, %1, 0, implicit $exec
    S_ENDPGM 0, implicit %2

...

---

# First operand is FI is in an SGPR, other operand is a VGPR
name: shrink_sgpr_fi_vgpr_v_add_i32_e64_no_carry_out_use
tracksRegLiveness: true
stack:
  - { id: 0, type: default, offset: 0, size: 64, alignment: 16 }
body:             |
  bb.0:
    liveins: $vgpr0

    ; GCN-LABEL: name: shrink_sgpr_fi_vgpr_v_add_i32_e64_no_carry_out_use
    ; GCN: liveins: $vgpr0
    ; GCN-NEXT: {{  $}}
    ; GCN-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 %stack.0
    ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
    ; GCN-NEXT: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 [[S_MOV_B32_]], [[COPY]], implicit-def $vcc, implicit $exec
    ; GCN-NEXT: S_ENDPGM 0, implicit [[V_ADD_CO_U32_e32_]]
    %0:sreg_32_xm0 = S_MOV_B32 %stack.0
    %1:vgpr_32 = COPY $vgpr0
    %2:vgpr_32, %3:sreg_64 = V_ADD_CO_U32_e64 %0, %1, 0, implicit $exec
    S_ENDPGM 0, implicit %2

...

---

# First operand is a VGPR, other operand FI is in an SGPR
name: shrink_vgpr_sgpr_fi_v_add_i32_e64_no_carry_out_use
tracksRegLiveness: true
stack:
  - { id: 0, type: default, offset: 0, size: 64, alignment: 16}
body:             |
  bb.0:
    liveins: $vgpr0

    ; GCN-LABEL: name: shrink_vgpr_sgpr_fi_v_add_i32_e64_no_carry_out_use
    ; GCN: liveins: $vgpr0
    ; GCN-NEXT: {{  $}}
    ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
    ; GCN-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 %stack.0
    ; GCN-NEXT: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 [[S_MOV_B32_]], [[COPY]], implicit-def $vcc, implicit $exec
    ; GCN-NEXT: S_ENDPGM 0, implicit [[V_ADD_CO_U32_e32_]]
    %0:vgpr_32 = COPY $vgpr0
    %1:sreg_32_xm0 = S_MOV_B32 %stack.0
    %2:vgpr_32, %3:sreg_64 = V_ADD_CO_U32_e64 %0, %1, 0, implicit $exec
    S_ENDPGM 0, implicit %2

...

---

# First operand is FI is in a VGPR, other operand is an inline imm in a VGPR
name: shrink_vgpr_imm_fi_vgpr_v_add_i32_e64_no_carry_out_use
tracksRegLiveness: true
stack:
  - { id: 0, type: default, offset: 0, size: 64, alignment: 16 }
body:             |
  bb.0:

    ; GCN-LABEL: name: shrink_vgpr_imm_fi_vgpr_v_add_i32_e64_no_carry_out_use
    ; GCN: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
    ; GCN-NEXT: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 16, [[V_MOV_B32_e32_]], implicit-def $vcc, implicit $exec
    ; GCN-NEXT: S_ENDPGM 0, implicit [[V_ADD_CO_U32_e32_]]
    %0:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
    %1:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
    %2:vgpr_32, %3:sreg_64 = V_ADD_CO_U32_e64 %0, %1, 0, implicit $exec
    S_ENDPGM 0, implicit %2

...

---

# First operand is an inline imm in a VGPR, other operand FI is in a VGPR
name: shrink_vgpr_imm_vgpr_fi_v_add_i32_e64_no_carry_out_use
tracksRegLiveness: true
stack:
  - { id: 0, type: default, offset: 0, size: 64, alignment: 16 }
body:             |
  bb.0:

    ; GCN-LABEL: name: shrink_vgpr_imm_vgpr_fi_v_add_i32_e64_no_carry_out_use
    ; GCN: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64 = V_ADD_CO_U32_e64 16, %stack.0, 0, implicit $exec
    ; GCN-NEXT: S_ENDPGM 0, implicit [[V_ADD_CO_U32_e64_]]
    %0:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
    %1:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
    %2:vgpr_32, %3:sreg_64 = V_ADD_CO_U32_e64 %0, %1, 0, implicit $exec
    S_ENDPGM 0, implicit %2

...

---

# First operand is FI is in a VGPR, other operand is an literal constant in a VGPR
name: shrink_vgpr_k_fi_vgpr_v_add_i32_e64_no_carry_out_use
tracksRegLiveness: true
stack:
  - { id: 0, type: default, offset: 0, size: 64, alignment: 16 }
body:             |
  bb.0:

    ; GCN-LABEL: name: shrink_vgpr_k_fi_vgpr_v_add_i32_e64_no_carry_out_use
    ; GCN: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
    ; GCN-NEXT: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 1234, [[V_MOV_B32_e32_]], implicit-def $vcc, implicit $exec
    ; GCN-NEXT: S_ENDPGM 0, implicit [[V_ADD_CO_U32_e32_]]
    %0:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
    %1:vgpr_32 = V_MOV_B32_e32 1234, implicit $exec
    %2:vgpr_32, %3:sreg_64 = V_ADD_CO_U32_e64 %0, %1, 0, implicit $exec
    S_ENDPGM 0, implicit %2

...

---

# First operand is a literal constant in a VGPR, other operand FI is in a VGPR
name: shrink_vgpr_k_vgpr_fi_v_add_i32_e64_no_carry_out_use
tracksRegLiveness: true
stack:
  - { id: 0, type: default, offset: 0, size: 64, alignment: 16 }
body:             |
  bb.0:

    ; GCN-LABEL: name: shrink_vgpr_k_vgpr_fi_v_add_i32_e64_no_carry_out_use
    ; GCN: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1234, implicit $exec
    ; GCN-NEXT: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 %stack.0, [[V_MOV_B32_e32_]], implicit-def $vcc, implicit $exec
    ; GCN-NEXT: S_ENDPGM 0, implicit [[V_ADD_CO_U32_e32_]]
    %0:vgpr_32 = V_MOV_B32_e32 1234, implicit $exec
    %1:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
    %2:vgpr_32, %3:sreg_64 = V_ADD_CO_U32_e64 %0, %1, 0, implicit $exec
    S_ENDPGM 0, implicit %2

...