llvm/test/Transforms/PhaseOrdering/pr45682.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -O3 -S < %s                    | FileCheck %s
; RUN: opt -passes='default<O3>' -S < %s  | FileCheck %s

define void @PR45682(i32 %x, i32 %y) {
; CHECK-LABEL: @PR45682(
; CHECK-NEXT:  entry:
; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[Y:%.*]], 0
; CHECK-NEXT:    tail call void @llvm.assume(i1 [[CMP]])
; CHECK-NEXT:    ret void
;
entry:
  %x.addr = alloca i32, align 4
  %y.addr = alloca i32, align 4
  store i32 %x, i32* %x.addr, align 4
  store i32 %y, i32* %y.addr, align 4
  %0 = load i32, i32* %y.addr, align 4
  %cmp = icmp sgt i32 %0, 0
  call void @llvm.assume(i1 %cmp)
  %1 = load i32, i32* %y.addr, align 4
  %2 = load i32, i32* %x.addr, align 4
  %add = add nsw i32 %2, %1
  store i32 %add, i32* %x.addr, align 4
  %3 = load i32, i32* %x.addr, align 4
  %cmp1 = icmp eq i32 %3, -2147483648
  br i1 %cmp1, label %if.then, label %if.end

if.then:
  call void @v()
  br label %if.end

if.end:
  ret void
}

declare void @v()
declare void @llvm.assume(i1)