| // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py |
| // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s |
| // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK |
| // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s |
| // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK |
| // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s |
| // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s |
| |
| // REQUIRES: aarch64-registered-target || arm-registered-target |
| |
| #include <arm_sve.h> |
| |
| #ifdef SVE_OVERLOADED_FORMS |
| // A simple used,unused... macro, long enough to represent any SVE builtin. |
| #define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3 |
| #else |
| #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 |
| #endif |
| |
| // CHECK-LABEL: @test_svwhilewr_s8( |
| // CHECK-NEXT: entry: |
| // CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 16 x i1> @llvm.aarch64.sve.whilewr.b.nxv16i1.p0i8(i8* [[OP1:%.*]], i8* [[OP2:%.*]]) |
| // CHECK-NEXT: ret <vscale x 16 x i1> [[TMP0]] |
| // |
| // CPP-CHECK-LABEL: @_Z17test_svwhilewr_s8PKaS0_( |
| // CPP-CHECK-NEXT: entry: |
| // CPP-CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 16 x i1> @llvm.aarch64.sve.whilewr.b.nxv16i1.p0i8(i8* [[OP1:%.*]], i8* [[OP2:%.*]]) |
| // CPP-CHECK-NEXT: ret <vscale x 16 x i1> [[TMP0]] |
| // |
| svbool_t test_svwhilewr_s8(const int8_t *op1, const int8_t *op2) |
| { |
| // overload-warning@+2 {{implicit declaration of function 'svwhilewr'}} |
| // expected-warning@+1 {{implicit declaration of function 'svwhilewr_s8'}} |
| return SVE_ACLE_FUNC(svwhilewr,_s8,,)(op1, op2); |
| } |
| |
| // CHECK-LABEL: @test_svwhilewr_s16( |
| // CHECK-NEXT: entry: |
| // CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.whilewr.h.nxv8i1.p0i16(i16* [[OP1:%.*]], i16* [[OP2:%.*]]) |
| // CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv8i1(<vscale x 8 x i1> [[TMP0]]) |
| // CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]] |
| // |
| // CPP-CHECK-LABEL: @_Z18test_svwhilewr_s16PKsS0_( |
| // CPP-CHECK-NEXT: entry: |
| // CPP-CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.whilewr.h.nxv8i1.p0i16(i16* [[OP1:%.*]], i16* [[OP2:%.*]]) |
| // CPP-CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv8i1(<vscale x 8 x i1> [[TMP0]]) |
| // CPP-CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]] |
| // |
| svbool_t test_svwhilewr_s16(const int16_t *op1, const int16_t *op2) |
| { |
| // overload-warning@+2 {{implicit declaration of function 'svwhilewr'}} |
| // expected-warning@+1 {{implicit declaration of function 'svwhilewr_s16'}} |
| return SVE_ACLE_FUNC(svwhilewr,_s16,,)(op1, op2); |
| } |
| |
| // CHECK-LABEL: @test_svwhilewr_s32( |
| // CHECK-NEXT: entry: |
| // CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.whilewr.s.nxv4i1.p0i32(i32* [[OP1:%.*]], i32* [[OP2:%.*]]) |
| // CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv4i1(<vscale x 4 x i1> [[TMP0]]) |
| // CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]] |
| // |
| // CPP-CHECK-LABEL: @_Z18test_svwhilewr_s32PKiS0_( |
| // CPP-CHECK-NEXT: entry: |
| // CPP-CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.whilewr.s.nxv4i1.p0i32(i32* [[OP1:%.*]], i32* [[OP2:%.*]]) |
| // CPP-CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv4i1(<vscale x 4 x i1> [[TMP0]]) |
| // CPP-CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]] |
| // |
| svbool_t test_svwhilewr_s32(const int32_t *op1, const int32_t *op2) |
| { |
| // overload-warning@+2 {{implicit declaration of function 'svwhilewr'}} |
| // expected-warning@+1 {{implicit declaration of function 'svwhilewr_s32'}} |
| return SVE_ACLE_FUNC(svwhilewr,_s32,,)(op1, op2); |
| } |
| |
| // CHECK-LABEL: @test_svwhilewr_s64( |
| // CHECK-NEXT: entry: |
| // CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.whilewr.d.nxv2i1.p0i64(i64* [[OP1:%.*]], i64* [[OP2:%.*]]) |
| // CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv2i1(<vscale x 2 x i1> [[TMP0]]) |
| // CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]] |
| // |
| // CPP-CHECK-LABEL: @_Z18test_svwhilewr_s64PKlS0_( |
| // CPP-CHECK-NEXT: entry: |
| // CPP-CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.whilewr.d.nxv2i1.p0i64(i64* [[OP1:%.*]], i64* [[OP2:%.*]]) |
| // CPP-CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv2i1(<vscale x 2 x i1> [[TMP0]]) |
| // CPP-CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]] |
| // |
| svbool_t test_svwhilewr_s64(const int64_t *op1, const int64_t *op2) |
| { |
| // overload-warning@+2 {{implicit declaration of function 'svwhilewr'}} |
| // expected-warning@+1 {{implicit declaration of function 'svwhilewr_s64'}} |
| return SVE_ACLE_FUNC(svwhilewr,_s64,,)(op1, op2); |
| } |
| |
| // CHECK-LABEL: @test_svwhilewr_u8( |
| // CHECK-NEXT: entry: |
| // CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 16 x i1> @llvm.aarch64.sve.whilewr.b.nxv16i1.p0i8(i8* [[OP1:%.*]], i8* [[OP2:%.*]]) |
| // CHECK-NEXT: ret <vscale x 16 x i1> [[TMP0]] |
| // |
| // CPP-CHECK-LABEL: @_Z17test_svwhilewr_u8PKhS0_( |
| // CPP-CHECK-NEXT: entry: |
| // CPP-CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 16 x i1> @llvm.aarch64.sve.whilewr.b.nxv16i1.p0i8(i8* [[OP1:%.*]], i8* [[OP2:%.*]]) |
| // CPP-CHECK-NEXT: ret <vscale x 16 x i1> [[TMP0]] |
| // |
| svbool_t test_svwhilewr_u8(const uint8_t *op1, const uint8_t *op2) |
| { |
| // overload-warning@+2 {{implicit declaration of function 'svwhilewr'}} |
| // expected-warning@+1 {{implicit declaration of function 'svwhilewr_u8'}} |
| return SVE_ACLE_FUNC(svwhilewr,_u8,,)(op1, op2); |
| } |
| |
| // CHECK-LABEL: @test_svwhilewr_u16( |
| // CHECK-NEXT: entry: |
| // CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.whilewr.h.nxv8i1.p0i16(i16* [[OP1:%.*]], i16* [[OP2:%.*]]) |
| // CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv8i1(<vscale x 8 x i1> [[TMP0]]) |
| // CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]] |
| // |
| // CPP-CHECK-LABEL: @_Z18test_svwhilewr_u16PKtS0_( |
| // CPP-CHECK-NEXT: entry: |
| // CPP-CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.whilewr.h.nxv8i1.p0i16(i16* [[OP1:%.*]], i16* [[OP2:%.*]]) |
| // CPP-CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv8i1(<vscale x 8 x i1> [[TMP0]]) |
| // CPP-CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]] |
| // |
| svbool_t test_svwhilewr_u16(const uint16_t *op1, const uint16_t *op2) |
| { |
| // overload-warning@+2 {{implicit declaration of function 'svwhilewr'}} |
| // expected-warning@+1 {{implicit declaration of function 'svwhilewr_u16'}} |
| return SVE_ACLE_FUNC(svwhilewr,_u16,,)(op1, op2); |
| } |
| |
| // CHECK-LABEL: @test_svwhilewr_u32( |
| // CHECK-NEXT: entry: |
| // CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.whilewr.s.nxv4i1.p0i32(i32* [[OP1:%.*]], i32* [[OP2:%.*]]) |
| // CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv4i1(<vscale x 4 x i1> [[TMP0]]) |
| // CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]] |
| // |
| // CPP-CHECK-LABEL: @_Z18test_svwhilewr_u32PKjS0_( |
| // CPP-CHECK-NEXT: entry: |
| // CPP-CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.whilewr.s.nxv4i1.p0i32(i32* [[OP1:%.*]], i32* [[OP2:%.*]]) |
| // CPP-CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv4i1(<vscale x 4 x i1> [[TMP0]]) |
| // CPP-CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]] |
| // |
| svbool_t test_svwhilewr_u32(const uint32_t *op1, const uint32_t *op2) |
| { |
| // overload-warning@+2 {{implicit declaration of function 'svwhilewr'}} |
| // expected-warning@+1 {{implicit declaration of function 'svwhilewr_u32'}} |
| return SVE_ACLE_FUNC(svwhilewr,_u32,,)(op1, op2); |
| } |
| |
| // CHECK-LABEL: @test_svwhilewr_u64( |
| // CHECK-NEXT: entry: |
| // CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.whilewr.d.nxv2i1.p0i64(i64* [[OP1:%.*]], i64* [[OP2:%.*]]) |
| // CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv2i1(<vscale x 2 x i1> [[TMP0]]) |
| // CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]] |
| // |
| // CPP-CHECK-LABEL: @_Z18test_svwhilewr_u64PKmS0_( |
| // CPP-CHECK-NEXT: entry: |
| // CPP-CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.whilewr.d.nxv2i1.p0i64(i64* [[OP1:%.*]], i64* [[OP2:%.*]]) |
| // CPP-CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv2i1(<vscale x 2 x i1> [[TMP0]]) |
| // CPP-CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]] |
| // |
| svbool_t test_svwhilewr_u64(const uint64_t *op1, const uint64_t *op2) |
| { |
| // overload-warning@+2 {{implicit declaration of function 'svwhilewr'}} |
| // expected-warning@+1 {{implicit declaration of function 'svwhilewr_u64'}} |
| return SVE_ACLE_FUNC(svwhilewr,_u64,,)(op1, op2); |
| } |
| |
| // CHECK-LABEL: @test_svwhilewr_f16( |
| // CHECK-NEXT: entry: |
| // CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.whilewr.h.nxv8i1.p0f16(half* [[OP1:%.*]], half* [[OP2:%.*]]) |
| // CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv8i1(<vscale x 8 x i1> [[TMP0]]) |
| // CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]] |
| // |
| // CPP-CHECK-LABEL: @_Z18test_svwhilewr_f16PKDhS0_( |
| // CPP-CHECK-NEXT: entry: |
| // CPP-CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.whilewr.h.nxv8i1.p0f16(half* [[OP1:%.*]], half* [[OP2:%.*]]) |
| // CPP-CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv8i1(<vscale x 8 x i1> [[TMP0]]) |
| // CPP-CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]] |
| // |
| svbool_t test_svwhilewr_f16(const float16_t *op1, const float16_t *op2) |
| { |
| // overload-warning@+2 {{implicit declaration of function 'svwhilewr'}} |
| // expected-warning@+1 {{implicit declaration of function 'svwhilewr_f16'}} |
| return SVE_ACLE_FUNC(svwhilewr,_f16,,)(op1, op2); |
| } |
| |
| // CHECK-LABEL: @test_svwhilewr_f32( |
| // CHECK-NEXT: entry: |
| // CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.whilewr.s.nxv4i1.p0f32(float* [[OP1:%.*]], float* [[OP2:%.*]]) |
| // CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv4i1(<vscale x 4 x i1> [[TMP0]]) |
| // CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]] |
| // |
| // CPP-CHECK-LABEL: @_Z18test_svwhilewr_f32PKfS0_( |
| // CPP-CHECK-NEXT: entry: |
| // CPP-CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.whilewr.s.nxv4i1.p0f32(float* [[OP1:%.*]], float* [[OP2:%.*]]) |
| // CPP-CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv4i1(<vscale x 4 x i1> [[TMP0]]) |
| // CPP-CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]] |
| // |
| svbool_t test_svwhilewr_f32(const float32_t *op1, const float32_t *op2) |
| { |
| // overload-warning@+2 {{implicit declaration of function 'svwhilewr'}} |
| // expected-warning@+1 {{implicit declaration of function 'svwhilewr_f32'}} |
| return SVE_ACLE_FUNC(svwhilewr,_f32,,)(op1, op2); |
| } |
| |
| // CHECK-LABEL: @test_svwhilewr_f64( |
| // CHECK-NEXT: entry: |
| // CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.whilewr.d.nxv2i1.p0f64(double* [[OP1:%.*]], double* [[OP2:%.*]]) |
| // CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv2i1(<vscale x 2 x i1> [[TMP0]]) |
| // CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]] |
| // |
| // CPP-CHECK-LABEL: @_Z18test_svwhilewr_f64PKdS0_( |
| // CPP-CHECK-NEXT: entry: |
| // CPP-CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.whilewr.d.nxv2i1.p0f64(double* [[OP1:%.*]], double* [[OP2:%.*]]) |
| // CPP-CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv2i1(<vscale x 2 x i1> [[TMP0]]) |
| // CPP-CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]] |
| // |
| svbool_t test_svwhilewr_f64(const float64_t *op1, const float64_t *op2) |
| { |
| // overload-warning@+2 {{implicit declaration of function 'svwhilewr'}} |
| // expected-warning@+1 {{implicit declaration of function 'svwhilewr_f64'}} |
| return SVE_ACLE_FUNC(svwhilewr,_f64,,)(op1, op2); |
| } |