llvm/test/CodeGen/AMDGPU/av_movimm_pseudo_expansion.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
# RUN: llc -mtriple=amdgcn -mcpu=gfx90a -run-pass=postrapseudos %s -o - | FileCheck %s
# RUN: llc -mtriple=amdgcn -mcpu=gfx942 -run-pass=postrapseudos %s -o - | FileCheck %s

---
name: av_mov_b32_imm_pseudo_agpr_0
tracksRegLiveness: true
body: |
  bb.0:
    ; CHECK-LABEL: name: av_mov_b32_imm_pseudo_agpr_0
    ; CHECK: $agpr0 = V_ACCVGPR_WRITE_B32_e64 0, implicit $exec
    $agpr0 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec
...

---
name: av_mov_b32_imm_pseudo_agpr_64
tracksRegLiveness: true
body: |
  bb.0:
    ; CHECK-LABEL: name: av_mov_b32_imm_pseudo_agpr_64
    ; CHECK: $agpr0 = V_ACCVGPR_WRITE_B32_e64 64, implicit $exec
    $agpr0 = AV_MOV_B32_IMM_PSEUDO 64, implicit $exec
...

---
name: av_mov_b32_imm_pseudo_vgpr_0
tracksRegLiveness: true
body: |
  bb.0:
    ; CHECK-LABEL: name: av_mov_b32_imm_pseudo_vgpr_0
    ; CHECK: $vgpr0 = V_MOV_B32_e32 0, implicit $exec
    $vgpr0 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec
...

---
name: av_mov_b32_imm_pseudo_vgpr_64
tracksRegLiveness: true
body: |
  bb.0:
    ; CHECK-LABEL: name: av_mov_b32_imm_pseudo_vgpr_64
    ; CHECK: $vgpr0 = V_MOV_B32_e32 64, implicit $exec
    $vgpr0 = AV_MOV_B32_IMM_PSEUDO 64, implicit $exec
...

---
name: av_mov_b32_imm_pseudo_agpr_vgpr
tracksRegLiveness: true
body: |
  bb.0:
    liveins: $vgpr0
    ; CHECK-LABEL: name: av_mov_b32_imm_pseudo_agpr_vgpr
    ; CHECK: liveins: $vgpr0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: $agpr1 = V_ACCVGPR_WRITE_B32_e64 $vgpr0, implicit $exec
    $agpr1 = AV_MOV_B32_IMM_PSEUDO $vgpr0, implicit $exec
...