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llvm
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test
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CodeGen
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ARM
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ret_arg5.ll
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; RUN: llc -mtriple=arm-eabi %s -o /dev/null
define
i32
@test
(
i32
%a1
,
i32
%a2
,
i32
%a3
,
i32
%a4
,
i32
%a5
)
{
ret
i32
%a5
}