llvm/test/CodeGen/Mips/data-layout.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc -mtriple=mips64-linux-gnuabi64 -mcpu=mips64 < %s | FileCheck %s -check-prefix=MIPS64
; RUN: llc -mtriple=mips64el-linux-gnuabi64 -mcpu=mips64 < %s | FileCheck %s -check-prefix=MIPS64EL

; MIPS64:      .p2align 2, 0x0
; MIPS64-NEXT: Li8:
; MIPS64-NEXT: .byte 10 # 0xa
; MIPS64-NEXT: .size .Li8, 1

; MIPS64EL:      .p2align 2, 0x0
; MIPS64EL-NEXT: Li8:
; MIPS64EL-NEXT: .byte 10 # 0xa
; MIPS64EL-NEXT: .size .Li8, 1
@i8 = private constant i8 10

; MIPS64:      .p2align 2, 0x0
; MIPS64-NEXT: .Li16:
; MIPS64-NEXT: .2byte 10 # 0xa
; MIPS64-NEXT:  .size .Li16, 2

; MIPS64EL:      .p2align 2, 0x0
; MIPS64EL-NEXT: .Li16:
; MIPS64EL-NEXT: .2byte 10 # 0xa
; MIPS64EL-NEXT:  .size .Li16, 2
@i16 = private constant i16 10

; MIPS64:      .p2align 2, 0x0
; MIPS64-NEXT: .Li32:
; MIPS64-NEXT: .4byte 10 # 0xa
; MIPS64-NEXT: .size .Li32, 4

; MIPS64EL:      .p2align 2, 0x0
; MIPS64EL-NEXT: .Li32:
; MIPS64EL-NEXT: .4byte 10 # 0xa
; MIPS64EL-NEXT: .size .Li32, 4
@i32 = private constant i32 10

; MIPS64:      .p2align 3, 0x0
; MIPS64-NEXT: .Li64:
; MIPS64-NEXT: .8byte 10 # 0xa
; MIPS64-NEXT:  .size .Li64, 8

; MIPS64EL:      .p2align 3, 0x0
; MIPS64EL-NEXT: .Li64:
; MIPS64EL-NEXT: .8byte 10 # 0xa
; MIPS64EL-NEXT:  .size .Li64, 8
@i64 = private constant i64 10

; MIPS64:      .p2align 4, 0x0
; MIPS64-NEXT: .Li128:
; MIPS64-NEXT: .8byte 0
; MIPS64-NEXT: .8byte 10
; MIPS64-NEXT:  .size .Li128, 16

; MIPS64EL:      .p2align 4, 0x0
; MIPS64EL-NEXT: .Li128:
; MIPS64EL-NEXT: .8byte 10
; MIPS64EL-NEXT: .8byte 0
; MIPS64EL-NEXT:  .size .Li128, 16
@i128 = private constant i128 10