llvm/test/Transforms/SLPVectorizer/AArch64/vec-node-dropped-with-gather-user.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
; RUN: opt -S --passes=slp-vectorizer -mtriple=aarch64-unknown-linux-gnu < %s | FileCheck %s

define i1 @test(i64 %0, i64 %1) {
; CHECK-LABEL: define i1 @test(
; CHECK-SAME: i64 [[TMP0:%.*]], i64 [[TMP1:%.*]]) {
; CHECK-NEXT:  [[BB:.*:]]
; CHECK-NEXT:    [[TMP2:%.*]] = mul i64 [[TMP0]], -12
; CHECK-NEXT:    [[DIFF_CHECK640:%.*]] = icmp ult i64 [[TMP2]], 16
; CHECK-NEXT:    [[TMP3:%.*]] = or i64 [[TMP2]], [[TMP0]]
; CHECK-NEXT:    [[DIFF_CHECK642:%.*]] = icmp ult i64 [[TMP3]], 16
; CHECK-NEXT:    [[CONFLICT_RDX643:%.*]] = or i1 [[DIFF_CHECK640]], [[DIFF_CHECK642]]
; CHECK-NEXT:    [[TMP4:%.*]] = mul i64 [[TMP0]], -4
; CHECK-NEXT:    [[DIFF_CHECK644:%.*]] = icmp ult i64 [[TMP4]], 16
; CHECK-NEXT:    [[TMP5:%.*]] = mul i64 [[TMP0]], -8
; CHECK-NEXT:    [[TMP6:%.*]] = mul i64 [[TMP0]], -16
; CHECK-NEXT:    [[CONFLICT_RDX645:%.*]] = or i1 [[CONFLICT_RDX643]], [[DIFF_CHECK644]]
; CHECK-NEXT:    [[DIFF_CHECK646:%.*]] = icmp ult i64 [[TMP5]], 16
; CHECK-NEXT:    [[CONFLICT_RDX647:%.*]] = or i1 [[CONFLICT_RDX645]], [[DIFF_CHECK646]]
; CHECK-NEXT:    [[TMP7:%.*]] = mul i64 [[TMP0]], -4
; CHECK-NEXT:    [[DIFF_CHECK648:%.*]] = icmp ult i64 [[TMP7]], 16
; CHECK-NEXT:    [[CONFLICT_RDX649:%.*]] = or i1 [[CONFLICT_RDX647]], [[DIFF_CHECK648]]
; CHECK-NEXT:    [[TMP8:%.*]] = or i64 [[TMP6]], [[TMP0]]
; CHECK-NEXT:    [[DIFF_CHECK654:%.*]] = icmp ult i64 [[TMP8]], 16
; CHECK-NEXT:    [[CONFLICT_RDX655:%.*]] = or i1 [[CONFLICT_RDX649]], [[DIFF_CHECK654]]
; CHECK-NEXT:    [[DIFF_CHECK666:%.*]] = icmp ult i64 [[TMP0]], 16
; CHECK-NEXT:    [[CONFLICT_RDX667:%.*]] = or i1 [[CONFLICT_RDX655]], [[DIFF_CHECK666]]
; CHECK-NEXT:    [[DIFF_CHECK672:%.*]] = icmp eq i64 [[TMP1]], 0
; CHECK-NEXT:    [[CONFLICT_RDX673:%.*]] = or i1 [[CONFLICT_RDX667]], [[DIFF_CHECK672]]
; CHECK-NEXT:    ret i1 [[CONFLICT_RDX673]]
;
bb:
  %2 = mul i64 %0, -12
  %diff.check640 = icmp ult i64 %2, 16
  %3 = or i64 %2, %0
  %diff.check642 = icmp ult i64 %3, 16
  %conflict.rdx643 = or i1 %diff.check640, %diff.check642
  %4 = mul i64 %0, -4
  %diff.check644 = icmp ult i64 %4, 16
  %5 = mul i64 %0, -8
  %6 = mul i64 %0, -16
  %conflict.rdx645 = or i1 %conflict.rdx643, %diff.check644
  %diff.check646 = icmp ult i64 %5, 16
  %conflict.rdx647 = or i1 %conflict.rdx645, %diff.check646
  %7 = mul i64 %0, -4
  %diff.check648 = icmp ult i64 %7, 16
  %conflict.rdx649 = or i1 %conflict.rdx647, %diff.check648
  %8 = or i64 %6, %0
  %diff.check654 = icmp ult i64 %8, 16
  %conflict.rdx655 = or i1 %conflict.rdx649, %diff.check654
  %diff.check666 = icmp ult i64 %0, 16
  %conflict.rdx667 = or i1 %conflict.rdx655, %diff.check666
  %diff.check672 = icmp eq i64 %1, 0
  %conflict.rdx673 = or i1 %conflict.rdx667, %diff.check672
  ret i1 %conflict.rdx673
}