| ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 | 
 | ; RUN: llc < %s -mtriple=powerpc-unknown-linux-gnu | FileCheck %s --check-prefix=LINUXASM | 
 | ; RUN: llc < %s -mtriple=powerpc-ibm-aix-xcoff | FileCheck %s --check-prefix=AIXASM | 
 |  | 
 | define noundef i32 @add(i32 noundef %a, i32 noundef %b, ptr nocapture noundef writeonly %ovf) { | 
 | ; LINUXASM-LABEL: add: | 
 | ; LINUXASM:       # %bb.0: # %entry | 
 | ; LINUXASM-NEXT:    li 6, 0 | 
 | ; LINUXASM-NEXT:    addc 3, 3, 4 | 
 | ; LINUXASM-NEXT:    addze 4, 6 | 
 | ; LINUXASM-NEXT:    stw 4, 0(5) | 
 | ; LINUXASM-NEXT:    blr | 
 |  | 
 | ; AIXASM-LABEL: .add: | 
 | ; AIXASM:       # %bb.0:                                # %entry | 
 | ; AIXASM-NEXT:    addc 3, 3, 4 | 
 | ; AIXASM-NEXT:    li 4, 0 | 
 | ; AIXASM-NEXT:    addze 4, 4 | 
 | ; AIXASM-NEXT:    stw 4, 0(5) | 
 | ; AIXASM-NEXT:    blr | 
 |  | 
 | entry: | 
 |   %0 = tail call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 %a, i32 %b) | 
 |   %1 = extractvalue { i32, i1 } %0, 1 | 
 |   %2 = extractvalue { i32, i1 } %0, 0 | 
 |   %3 = zext i1 %1 to i32 | 
 |   store i32 %3, ptr %ovf, align 8 | 
 |   ret i32 %2 | 
 | } | 
 |  | 
 | declare { i32, i1 } @llvm.uadd.with.overflow.i32(i32, i32) | 
 |  | 
 | define noundef zeroext i1 @add_overflow(i32 noundef %a, i32 noundef %b, ptr nocapture noundef writeonly %ovf) { | 
 | ; LINUXASM-LABEL: add_overflow: | 
 | ; LINUXASM:       # %bb.0: # %entry | 
 | ; LINUXASM-NEXT:    li 6, 0 | 
 | ; LINUXASM-NEXT:    addc 4, 3, 4 | 
 | ; LINUXASM-NEXT:    addze 3, 6 | 
 | ; LINUXASM-NEXT:    stw 4, 0(5) | 
 | ; LINUXASM-NEXT:    blr | 
 |  | 
 | ; AIXASM-LABEL: .add_overflow: | 
 | ; AIXASM:       # %bb.0:                                # %entry | 
 | ; AIXASM-NEXT:    addc 4, 3, 4 | 
 | ; AIXASM-NEXT:    li 3, 0 | 
 | ; AIXASM-NEXT:    addze 3, 3 | 
 | ; AIXASM-NEXT:    stw 4, 0(5) | 
 | ; AIXASM-NEXT:    blr | 
 |  | 
 | entry: | 
 |   %0 = tail call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 %a, i32 %b) | 
 |   %1 = extractvalue { i32, i1 } %0, 1 | 
 |   %2 = extractvalue { i32, i1 } %0, 0 | 
 |   store i32 %2, ptr %ovf, align 8 | 
 |   ret i1 %1 | 
 | } |