llvm/test/CodeGen/AArch64/aarch64-f16f32dot-intrinsics.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
; RUN: llc -mtriple aarch64 -mattr=+f16f32dot %s -o - | FileCheck %s

define <2 x float> @test_vdot_f32(<2 x float> %r, <4 x half> %a, <4 x half> %b) {
; CHECK-LABEL: test_vdot_f32:
; CHECK:       // %bb.0:
; CHECK-NEXT:    fdot v0.2s, v1.4h, v2.4h
; CHECK-NEXT:    ret
  %res = call <2 x float> @llvm.aarch64.neon.fdot.v2f32.v4f16(<2 x float> %r, <4 x half> %a, <4 x half> %b)
  ret <2 x float> %res
}

define <4 x float> @test_vdotq_f32(<4 x float> %r, <8 x half> %a, <8 x half> %b) {
; CHECK-LABEL: test_vdotq_f32:
; CHECK:       // %bb.0:
; CHECK-NEXT:    fdot v0.4s, v1.8h, v2.8h
; CHECK-NEXT:    ret
  %res = call <4 x float> @llvm.aarch64.neon.fdot.v4f32.v8f16(<4 x float> %r, <8 x half> %a, <8 x half> %b)
  ret <4 x float> %res
}

define <2 x float> @test_vdot_lane_f32(<2 x float> %r, <4 x half> %a, <4 x half> %b) {
; CHECK-LABEL: test_vdot_lane_f32:
; CHECK:       // %bb.0:
; CHECK-NEXT:    // kill: def $d2 killed $d2 def $q2
; CHECK-NEXT:    fdot v0.2s, v1.4h, v2.2h[0]
; CHECK-NEXT:    ret
  %lane = shufflevector <4 x half> %b, <4 x half> poison, <4 x i32> zeroinitializer
  %res = call <2 x float> @llvm.aarch64.neon.fdot.v2f32.v4f16(<2 x float> %r, <4 x half> %a, <4 x half> %lane)
  ret <2 x float> %res
}

define <4 x float> @test_vdotq_laneq_f32(<4 x float> %r, <8 x half> %a, <8 x half> %b) {
; CHECK-LABEL: test_vdotq_laneq_f32:
; CHECK:       // %bb.0:
; CHECK-NEXT:    fdot v0.4s, v1.8h, v2.2h[3]
; CHECK-NEXT:    ret
  %lane = shufflevector <8 x half> %b, <8 x half> poison, <8 x i32> <i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3>
  %res = call <4 x float> @llvm.aarch64.neon.fdot.v4f32.v8f16(<4 x float> %r, <8 x half> %a, <8 x half> %lane)
  ret <4 x float> %res
}

define <2 x float> @test_vdot_laneq_f32(<2 x float> %r, <4 x half> %a, <8 x half> %b) {
; CHECK-LABEL: test_vdot_laneq_f32:
; CHECK:       // %bb.0:
; CHECK-NEXT:    fdot v0.2s, v1.4h, v2.2h[3]
; CHECK-NEXT:    ret
  %lane = shufflevector <8 x half> %b, <8 x half> poison, <4 x i32> <i32 3, i32 3, i32 3, i32 3>
  %res = call <2 x float> @llvm.aarch64.neon.fdot.v2f32.v4f16(<2 x float> %r, <4 x half> %a, <4 x half> %lane)
  ret <2 x float> %res
}

define <4 x float> @test_vdotq_lane_f32(<4 x float> %r, <8 x half> %a, <4 x half> %b) {
; CHECK-LABEL: test_vdotq_lane_f32:
; CHECK:       // %bb.0:
; CHECK-NEXT:    // kill: def $d2 killed $d2 def $q2
; CHECK-NEXT:    fdot v0.4s, v1.8h, v2.2h[0]
; CHECK-NEXT:    ret
  %lane = shufflevector <4 x half> %b, <4 x half> poison, <8 x i32> zeroinitializer
  %res = call <4 x float> @llvm.aarch64.neon.fdot.v4f32.v8f16(<4 x float> %r, <8 x half> %a, <8 x half> %lane)
  ret <4 x float> %res
}