llvm/test/CodeGen/AArch64/aarch64-condopt-select-instrs.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
# RUN: llc -mtriple=aarch64-linux-gnu -run-pass=aarch64-condopt -verify-machineinstrs %s -o - | FileCheck %s
# RUN: llc -mtriple=aarch64-linux-gnu -passes=aarch64-condopt %s -o - | FileCheck %s

---
# CSEL pair — same direction (GT/GT, diff 1). The first CMP is adjusted from
# #9 to #10 and its CSEL condition relaxed GT -> GE, matching the second pair
# so CSE can eliminate the duplicate CMP.
#
# Input:  CMP #9 GT; CMP #10 GT
# Output: CMP #10 GE; CMP #10 GT
name:            csel_same_direction
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $w0, $w1, $w2, $x3, $x4

    ; CHECK-LABEL: name: csel_same_direction
    ; CHECK: liveins: $w0, $w1, $w2, $x3, $x4
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32common = COPY $w0
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $w2
    ; CHECK-NEXT: [[COPY3:%[0-9]+]]:gpr64common = COPY $x3
    ; CHECK-NEXT: [[COPY4:%[0-9]+]]:gpr64common = COPY $x4
    ; CHECK-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[COPY]], 10, 0, implicit-def $nzcv
    ; CHECK-NEXT: [[CSELWr:%[0-9]+]]:gpr32 = CSELWr [[COPY1]], [[COPY2]], 10, implicit $nzcv
    ; CHECK-NEXT: [[SUBSWri1:%[0-9]+]]:gpr32 = SUBSWri [[COPY]], 10, 0, implicit-def $nzcv
    ; CHECK-NEXT: [[CSELWr1:%[0-9]+]]:gpr32 = CSELWr [[COPY1]], [[COPY2]], 12, implicit $nzcv
    ; CHECK-NEXT: STRWui killed [[CSELWr]], [[COPY3]], 0
    ; CHECK-NEXT: STRWui killed [[CSELWr1]], [[COPY4]], 0
    ; CHECK-NEXT: RET_ReallyLR
    %0:gpr32common = COPY $w0
    %1:gpr32 = COPY $w1
    %2:gpr32 = COPY $w2
    %3:gpr64common = COPY $x3
    %4:gpr64common = COPY $x4

    %5:gpr32 = SUBSWri %0, 9, 0, implicit-def $nzcv
    %6:gpr32 = CSELWr %1, %2, 12, implicit $nzcv

    %7:gpr32 = SUBSWri %0, 10, 0, implicit-def $nzcv
    %8:gpr32 = CSELWr %1, %2, 12, implicit $nzcv

    STRWui killed %6, %3, 0
    STRWui killed %8, %4, 0
    RET_ReallyLR

...
---
# CSINV pair — opposite direction (GT/LT, diff 2). Both CMPs are adjusted to
# #10, conditions relaxed GT -> GE and LT -> LE.
#
# Input:  CMP #9 GT; CMP #11 LT
# Output: CMP #10 GE; CMP #10 LE
name:            csinv_opposite_direction
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $w0, $w1, $w2, $x3, $x4

    ; CHECK-LABEL: name: csinv_opposite_direction
    ; CHECK: liveins: $w0, $w1, $w2, $x3, $x4
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32common = COPY $w0
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $w2
    ; CHECK-NEXT: [[COPY3:%[0-9]+]]:gpr64common = COPY $x3
    ; CHECK-NEXT: [[COPY4:%[0-9]+]]:gpr64common = COPY $x4
    ; CHECK-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[COPY]], 10, 0, implicit-def $nzcv
    ; CHECK-NEXT: [[CSINVWr:%[0-9]+]]:gpr32 = CSINVWr [[COPY1]], [[COPY2]], 10, implicit $nzcv
    ; CHECK-NEXT: [[SUBSWri1:%[0-9]+]]:gpr32 = SUBSWri [[COPY]], 10, 0, implicit-def $nzcv
    ; CHECK-NEXT: [[CSINVWr1:%[0-9]+]]:gpr32 = CSINVWr [[COPY1]], [[COPY2]], 13, implicit $nzcv
    ; CHECK-NEXT: STRWui killed [[CSINVWr]], [[COPY3]], 0
    ; CHECK-NEXT: STRWui killed [[CSINVWr1]], [[COPY4]], 0
    ; CHECK-NEXT: RET_ReallyLR
    %0:gpr32common = COPY $w0
    %1:gpr32 = COPY $w1
    %2:gpr32 = COPY $w2
    %3:gpr64common = COPY $x3
    %4:gpr64common = COPY $x4

    %5:gpr32 = SUBSWri %0, 9, 0, implicit-def $nzcv
    %6:gpr32 = CSINVWr %1, %2, 12, implicit $nzcv

    %7:gpr32 = SUBSWri %0, 11, 0, implicit-def $nzcv
    %8:gpr32 = CSINVWr %1, %2, 11, implicit $nzcv

    STRWui killed %6, %3, 0
    STRWui killed %8, %4, 0
    RET_ReallyLR

...
---
# CSNEG pair — same direction (GT/GT, diff 1).
#
# Input:  CMP #9 GT; CMP #10 GT
# Output: CMP #10 GE; CMP #10 GT
name:            csneg_same_direction
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $w0, $w1, $w2, $x3, $x4

    ; CHECK-LABEL: name: csneg_same_direction
    ; CHECK: liveins: $w0, $w1, $w2, $x3, $x4
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32common = COPY $w0
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $w2
    ; CHECK-NEXT: [[COPY3:%[0-9]+]]:gpr64common = COPY $x3
    ; CHECK-NEXT: [[COPY4:%[0-9]+]]:gpr64common = COPY $x4
    ; CHECK-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[COPY]], 10, 0, implicit-def $nzcv
    ; CHECK-NEXT: [[CSNEGWr:%[0-9]+]]:gpr32 = CSNEGWr [[COPY1]], [[COPY2]], 10, implicit $nzcv
    ; CHECK-NEXT: [[SUBSWri1:%[0-9]+]]:gpr32 = SUBSWri [[COPY]], 10, 0, implicit-def $nzcv
    ; CHECK-NEXT: [[CSNEGWr1:%[0-9]+]]:gpr32 = CSNEGWr [[COPY1]], [[COPY2]], 12, implicit $nzcv
    ; CHECK-NEXT: STRWui killed [[CSNEGWr]], [[COPY3]], 0
    ; CHECK-NEXT: STRWui killed [[CSNEGWr1]], [[COPY4]], 0
    ; CHECK-NEXT: RET_ReallyLR
    %0:gpr32common = COPY $w0
    %1:gpr32 = COPY $w1
    %2:gpr32 = COPY $w2
    %3:gpr64common = COPY $x3
    %4:gpr64common = COPY $x4

    %5:gpr32 = SUBSWri %0, 9, 0, implicit-def $nzcv
    %6:gpr32 = CSNEGWr %1, %2, 12, implicit $nzcv

    %7:gpr32 = SUBSWri %0, 10, 0, implicit-def $nzcv
    %8:gpr32 = CSNEGWr %1, %2, 12, implicit $nzcv

    STRWui killed %6, %3, 0
    STRWui killed %8, %4, 0
    RET_ReallyLR

...
---
# Mixed: CSINC and CSEL in the same block. Both pairs should be optimized
# independently regardless of instruction type.
#
# Input:  CMP #9 GT (CSINC); CMP #10 GT (CSEL)
# Output: CMP #10 GE (CSINC); CMP #10 GT (CSEL)
name:            mixed_csinc_csel
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $w0, $w1, $w2, $x3, $x4

    ; CHECK-LABEL: name: mixed_csinc_csel
    ; CHECK: liveins: $w0, $w1, $w2, $x3, $x4
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32common = COPY $w0
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $w2
    ; CHECK-NEXT: [[COPY3:%[0-9]+]]:gpr64common = COPY $x3
    ; CHECK-NEXT: [[COPY4:%[0-9]+]]:gpr64common = COPY $x4
    ; CHECK-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[COPY]], 10, 0, implicit-def $nzcv
    ; CHECK-NEXT: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr [[COPY1]], [[COPY2]], 10, implicit $nzcv
    ; CHECK-NEXT: [[SUBSWri1:%[0-9]+]]:gpr32 = SUBSWri [[COPY]], 10, 0, implicit-def $nzcv
    ; CHECK-NEXT: [[CSELWr:%[0-9]+]]:gpr32 = CSELWr [[COPY1]], [[COPY2]], 12, implicit $nzcv
    ; CHECK-NEXT: STRWui killed [[CSINCWr]], [[COPY3]], 0
    ; CHECK-NEXT: STRWui killed [[CSELWr]], [[COPY4]], 0
    ; CHECK-NEXT: RET_ReallyLR
    %0:gpr32common = COPY $w0
    %1:gpr32 = COPY $w1
    %2:gpr32 = COPY $w2
    %3:gpr64common = COPY $x3
    %4:gpr64common = COPY $x4

    %5:gpr32 = SUBSWri %0, 9, 0, implicit-def $nzcv
    %6:gpr32 = CSINCWr %1, %2, 12, implicit $nzcv

    %7:gpr32 = SUBSWri %0, 10, 0, implicit-def $nzcv
    %8:gpr32 = CSELWr %1, %2, 12, implicit $nzcv

    STRWui killed %6, %3, 0
    STRWui killed %8, %4, 0
    RET_ReallyLR

...