| # RUN: llvm-mc --disassemble %s -triple=i686 | FileCheck %s --check-prefixes=ATT |
| # RUN: llvm-mc --disassemble %s -triple=i686 -x86-asm-syntax=intel --output-asm-variant=1 | FileCheck %s --check-prefixes=INTEL |
| |
| # ATT: vaddph %ymm4, %ymm5, %ymm6 |
| # INTEL: vaddph ymm6, ymm5, ymm4 |
| 0x62,0xf5,0x54,0x28,0x58,0xf4 |
| |
| # ATT: vaddph %xmm4, %xmm5, %xmm6 |
| # INTEL: vaddph xmm6, xmm5, xmm4 |
| 0x62,0xf5,0x54,0x08,0x58,0xf4 |
| |
| # ATT: vaddph 268435456(%esp,%esi,8), %ymm5, %ymm6 {%k7} |
| # INTEL: vaddph ymm6 {k7}, ymm5, ymmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf5,0x54,0x2f,0x58,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vaddph (%ecx){1to16}, %ymm5, %ymm6 |
| # INTEL: vaddph ymm6, ymm5, word ptr [ecx]{1to16} |
| 0x62,0xf5,0x54,0x38,0x58,0x31 |
| |
| # ATT: vaddph 4064(%ecx), %ymm5, %ymm6 |
| # INTEL: vaddph ymm6, ymm5, ymmword ptr [ecx + 4064] |
| 0x62,0xf5,0x54,0x28,0x58,0x71,0x7f |
| |
| # ATT: vaddph -256(%edx){1to16}, %ymm5, %ymm6 {%k7} {z} |
| # INTEL: vaddph ymm6 {k7} {z}, ymm5, word ptr [edx - 256]{1to16} |
| 0x62,0xf5,0x54,0xbf,0x58,0x72,0x80 |
| |
| # ATT: vaddph 268435456(%esp,%esi,8), %xmm5, %xmm6 {%k7} |
| # INTEL: vaddph xmm6 {k7}, xmm5, xmmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf5,0x54,0x0f,0x58,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vaddph (%ecx){1to8}, %xmm5, %xmm6 |
| # INTEL: vaddph xmm6, xmm5, word ptr [ecx]{1to8} |
| 0x62,0xf5,0x54,0x18,0x58,0x31 |
| |
| # ATT: vaddph 2032(%ecx), %xmm5, %xmm6 |
| # INTEL: vaddph xmm6, xmm5, xmmword ptr [ecx + 2032] |
| 0x62,0xf5,0x54,0x08,0x58,0x71,0x7f |
| |
| # ATT: vaddph -256(%edx){1to8}, %xmm5, %xmm6 {%k7} {z} |
| # INTEL: vaddph xmm6 {k7} {z}, xmm5, word ptr [edx - 256]{1to8} |
| 0x62,0xf5,0x54,0x9f,0x58,0x72,0x80 |
| |
| # ATT: vcmpltph %ymm4, %ymm5, %k5 |
| # INTEL: vcmpltph k5, ymm5, ymm4 |
| 0x62,0xf3,0x54,0x28,0xc2,0xec,0x01 |
| |
| # ATT: vcmpunordph %xmm4, %xmm5, %k5 |
| # INTEL: vcmpunordph k5, xmm5, xmm4 |
| 0x62,0xf3,0x54,0x08,0xc2,0xec,0x03 |
| |
| # ATT: vcmpnltph 268435456(%esp,%esi,8), %xmm5, %k5 {%k7} |
| # INTEL: vcmpnltph k5 {k7}, xmm5, xmmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf3,0x54,0x0f,0xc2,0xac,0xf4,0x00,0x00,0x00,0x10,0x05 |
| |
| # ATT: vcmpordph (%ecx){1to8}, %xmm5, %k5 |
| # INTEL: vcmpordph k5, xmm5, word ptr [ecx]{1to8} |
| 0x62,0xf3,0x54,0x18,0xc2,0x29,0x07 |
| |
| # ATT: vcmpngeph 2032(%ecx), %xmm5, %k5 |
| # INTEL: vcmpngeph k5, xmm5, xmmword ptr [ecx + 2032] |
| 0x62,0xf3,0x54,0x08,0xc2,0x69,0x7f,0x09 |
| |
| # ATT: vcmpfalseph -256(%edx){1to8}, %xmm5, %k5 {%k7} |
| # INTEL: vcmpfalseph k5 {k7}, xmm5, word ptr [edx - 256]{1to8} |
| 0x62,0xf3,0x54,0x1f,0xc2,0x6a,0x80,0x0b |
| |
| # ATT: vcmpgeph 268435456(%esp,%esi,8), %ymm5, %k5 {%k7} |
| # INTEL: vcmpgeph k5 {k7}, ymm5, ymmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf3,0x54,0x2f,0xc2,0xac,0xf4,0x00,0x00,0x00,0x10,0x0d |
| |
| # ATT: vcmptrueph (%ecx){1to16}, %ymm5, %k5 |
| # INTEL: vcmptrueph k5, ymm5, word ptr [ecx]{1to16} |
| 0x62,0xf3,0x54,0x38,0xc2,0x29,0x0f |
| |
| # ATT: vcmplt_oqph 4064(%ecx), %ymm5, %k5 |
| # INTEL: vcmplt_oqph k5, ymm5, ymmword ptr [ecx + 4064] |
| 0x62,0xf3,0x54,0x28,0xc2,0x69,0x7f,0x11 |
| |
| # ATT: vcmpunord_sph -256(%edx){1to16}, %ymm5, %k5 {%k7} |
| # INTEL: vcmpunord_sph k5 {k7}, ymm5, word ptr [edx - 256]{1to16} |
| 0x62,0xf3,0x54,0x3f,0xc2,0x6a,0x80,0x13 |
| |
| # ATT: vdivph %ymm4, %ymm5, %ymm6 |
| # INTEL: vdivph ymm6, ymm5, ymm4 |
| 0x62,0xf5,0x54,0x28,0x5e,0xf4 |
| |
| # ATT: vdivph %xmm4, %xmm5, %xmm6 |
| # INTEL: vdivph xmm6, xmm5, xmm4 |
| 0x62,0xf5,0x54,0x08,0x5e,0xf4 |
| |
| # ATT: vdivph 268435456(%esp,%esi,8), %ymm5, %ymm6 {%k7} |
| # INTEL: vdivph ymm6 {k7}, ymm5, ymmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf5,0x54,0x2f,0x5e,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vdivph (%ecx){1to16}, %ymm5, %ymm6 |
| # INTEL: vdivph ymm6, ymm5, word ptr [ecx]{1to16} |
| 0x62,0xf5,0x54,0x38,0x5e,0x31 |
| |
| # ATT: vdivph 4064(%ecx), %ymm5, %ymm6 |
| # INTEL: vdivph ymm6, ymm5, ymmword ptr [ecx + 4064] |
| 0x62,0xf5,0x54,0x28,0x5e,0x71,0x7f |
| |
| # ATT: vdivph -256(%edx){1to16}, %ymm5, %ymm6 {%k7} {z} |
| # INTEL: vdivph ymm6 {k7} {z}, ymm5, word ptr [edx - 256]{1to16} |
| 0x62,0xf5,0x54,0xbf,0x5e,0x72,0x80 |
| |
| # ATT: vdivph 268435456(%esp,%esi,8), %xmm5, %xmm6 {%k7} |
| # INTEL: vdivph xmm6 {k7}, xmm5, xmmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf5,0x54,0x0f,0x5e,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vdivph (%ecx){1to8}, %xmm5, %xmm6 |
| # INTEL: vdivph xmm6, xmm5, word ptr [ecx]{1to8} |
| 0x62,0xf5,0x54,0x18,0x5e,0x31 |
| |
| # ATT: vdivph 2032(%ecx), %xmm5, %xmm6 |
| # INTEL: vdivph xmm6, xmm5, xmmword ptr [ecx + 2032] |
| 0x62,0xf5,0x54,0x08,0x5e,0x71,0x7f |
| |
| # ATT: vdivph -256(%edx){1to8}, %xmm5, %xmm6 {%k7} {z} |
| # INTEL: vdivph xmm6 {k7} {z}, xmm5, word ptr [edx - 256]{1to8} |
| 0x62,0xf5,0x54,0x9f,0x5e,0x72,0x80 |
| |
| # ATT: vmaxph %ymm4, %ymm5, %ymm6 |
| # INTEL: vmaxph ymm6, ymm5, ymm4 |
| 0x62,0xf5,0x54,0x28,0x5f,0xf4 |
| |
| # ATT: vmaxph %xmm4, %xmm5, %xmm6 |
| # INTEL: vmaxph xmm6, xmm5, xmm4 |
| 0x62,0xf5,0x54,0x08,0x5f,0xf4 |
| |
| # ATT: vmaxph 268435456(%esp,%esi,8), %ymm5, %ymm6 {%k7} |
| # INTEL: vmaxph ymm6 {k7}, ymm5, ymmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf5,0x54,0x2f,0x5f,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vmaxph (%ecx){1to16}, %ymm5, %ymm6 |
| # INTEL: vmaxph ymm6, ymm5, word ptr [ecx]{1to16} |
| 0x62,0xf5,0x54,0x38,0x5f,0x31 |
| |
| # ATT: vmaxph 4064(%ecx), %ymm5, %ymm6 |
| # INTEL: vmaxph ymm6, ymm5, ymmword ptr [ecx + 4064] |
| 0x62,0xf5,0x54,0x28,0x5f,0x71,0x7f |
| |
| # ATT: vmaxph -256(%edx){1to16}, %ymm5, %ymm6 {%k7} {z} |
| # INTEL: vmaxph ymm6 {k7} {z}, ymm5, word ptr [edx - 256]{1to16} |
| 0x62,0xf5,0x54,0xbf,0x5f,0x72,0x80 |
| |
| # ATT: vmaxph 268435456(%esp,%esi,8), %xmm5, %xmm6 {%k7} |
| # INTEL: vmaxph xmm6 {k7}, xmm5, xmmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf5,0x54,0x0f,0x5f,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vmaxph (%ecx){1to8}, %xmm5, %xmm6 |
| # INTEL: vmaxph xmm6, xmm5, word ptr [ecx]{1to8} |
| 0x62,0xf5,0x54,0x18,0x5f,0x31 |
| |
| # ATT: vmaxph 2032(%ecx), %xmm5, %xmm6 |
| # INTEL: vmaxph xmm6, xmm5, xmmword ptr [ecx + 2032] |
| 0x62,0xf5,0x54,0x08,0x5f,0x71,0x7f |
| |
| # ATT: vmaxph -256(%edx){1to8}, %xmm5, %xmm6 {%k7} {z} |
| # INTEL: vmaxph xmm6 {k7} {z}, xmm5, word ptr [edx - 256]{1to8} |
| 0x62,0xf5,0x54,0x9f,0x5f,0x72,0x80 |
| |
| # ATT: vminph %ymm4, %ymm5, %ymm6 |
| # INTEL: vminph ymm6, ymm5, ymm4 |
| 0x62,0xf5,0x54,0x28,0x5d,0xf4 |
| |
| # ATT: vminph %xmm4, %xmm5, %xmm6 |
| # INTEL: vminph xmm6, xmm5, xmm4 |
| 0x62,0xf5,0x54,0x08,0x5d,0xf4 |
| |
| # ATT: vminph 268435456(%esp,%esi,8), %ymm5, %ymm6 {%k7} |
| # INTEL: vminph ymm6 {k7}, ymm5, ymmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf5,0x54,0x2f,0x5d,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vminph (%ecx){1to16}, %ymm5, %ymm6 |
| # INTEL: vminph ymm6, ymm5, word ptr [ecx]{1to16} |
| 0x62,0xf5,0x54,0x38,0x5d,0x31 |
| |
| # ATT: vminph 4064(%ecx), %ymm5, %ymm6 |
| # INTEL: vminph ymm6, ymm5, ymmword ptr [ecx + 4064] |
| 0x62,0xf5,0x54,0x28,0x5d,0x71,0x7f |
| |
| # ATT: vminph -256(%edx){1to16}, %ymm5, %ymm6 {%k7} {z} |
| # INTEL: vminph ymm6 {k7} {z}, ymm5, word ptr [edx - 256]{1to16} |
| 0x62,0xf5,0x54,0xbf,0x5d,0x72,0x80 |
| |
| # ATT: vminph 268435456(%esp,%esi,8), %xmm5, %xmm6 {%k7} |
| # INTEL: vminph xmm6 {k7}, xmm5, xmmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf5,0x54,0x0f,0x5d,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vminph (%ecx){1to8}, %xmm5, %xmm6 |
| # INTEL: vminph xmm6, xmm5, word ptr [ecx]{1to8} |
| 0x62,0xf5,0x54,0x18,0x5d,0x31 |
| |
| # ATT: vminph 2032(%ecx), %xmm5, %xmm6 |
| # INTEL: vminph xmm6, xmm5, xmmword ptr [ecx + 2032] |
| 0x62,0xf5,0x54,0x08,0x5d,0x71,0x7f |
| |
| # ATT: vminph -256(%edx){1to8}, %xmm5, %xmm6 {%k7} {z} |
| # INTEL: vminph xmm6 {k7} {z}, xmm5, word ptr [edx - 256]{1to8} |
| 0x62,0xf5,0x54,0x9f,0x5d,0x72,0x80 |
| |
| # ATT: vmulph %ymm4, %ymm5, %ymm6 |
| # INTEL: vmulph ymm6, ymm5, ymm4 |
| 0x62,0xf5,0x54,0x28,0x59,0xf4 |
| |
| # ATT: vmulph %xmm4, %xmm5, %xmm6 |
| # INTEL: vmulph xmm6, xmm5, xmm4 |
| 0x62,0xf5,0x54,0x08,0x59,0xf4 |
| |
| # ATT: vmulph 268435456(%esp,%esi,8), %ymm5, %ymm6 {%k7} |
| # INTEL: vmulph ymm6 {k7}, ymm5, ymmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf5,0x54,0x2f,0x59,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vmulph (%ecx){1to16}, %ymm5, %ymm6 |
| # INTEL: vmulph ymm6, ymm5, word ptr [ecx]{1to16} |
| 0x62,0xf5,0x54,0x38,0x59,0x31 |
| |
| # ATT: vmulph 4064(%ecx), %ymm5, %ymm6 |
| # INTEL: vmulph ymm6, ymm5, ymmword ptr [ecx + 4064] |
| 0x62,0xf5,0x54,0x28,0x59,0x71,0x7f |
| |
| # ATT: vmulph -256(%edx){1to16}, %ymm5, %ymm6 {%k7} {z} |
| # INTEL: vmulph ymm6 {k7} {z}, ymm5, word ptr [edx - 256]{1to16} |
| 0x62,0xf5,0x54,0xbf,0x59,0x72,0x80 |
| |
| # ATT: vmulph 268435456(%esp,%esi,8), %xmm5, %xmm6 {%k7} |
| # INTEL: vmulph xmm6 {k7}, xmm5, xmmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf5,0x54,0x0f,0x59,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vmulph (%ecx){1to8}, %xmm5, %xmm6 |
| # INTEL: vmulph xmm6, xmm5, word ptr [ecx]{1to8} |
| 0x62,0xf5,0x54,0x18,0x59,0x31 |
| |
| # ATT: vmulph 2032(%ecx), %xmm5, %xmm6 |
| # INTEL: vmulph xmm6, xmm5, xmmword ptr [ecx + 2032] |
| 0x62,0xf5,0x54,0x08,0x59,0x71,0x7f |
| |
| # ATT: vmulph -256(%edx){1to8}, %xmm5, %xmm6 {%k7} {z} |
| # INTEL: vmulph xmm6 {k7} {z}, xmm5, word ptr [edx - 256]{1to8} |
| 0x62,0xf5,0x54,0x9f,0x59,0x72,0x80 |
| |
| # ATT: vsubph %ymm4, %ymm5, %ymm6 |
| # INTEL: vsubph ymm6, ymm5, ymm4 |
| 0x62,0xf5,0x54,0x28,0x5c,0xf4 |
| |
| # ATT: vsubph %xmm4, %xmm5, %xmm6 |
| # INTEL: vsubph xmm6, xmm5, xmm4 |
| 0x62,0xf5,0x54,0x08,0x5c,0xf4 |
| |
| # ATT: vsubph 268435456(%esp,%esi,8), %ymm5, %ymm6 {%k7} |
| # INTEL: vsubph ymm6 {k7}, ymm5, ymmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf5,0x54,0x2f,0x5c,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vsubph (%ecx){1to16}, %ymm5, %ymm6 |
| # INTEL: vsubph ymm6, ymm5, word ptr [ecx]{1to16} |
| 0x62,0xf5,0x54,0x38,0x5c,0x31 |
| |
| # ATT: vsubph 4064(%ecx), %ymm5, %ymm6 |
| # INTEL: vsubph ymm6, ymm5, ymmword ptr [ecx + 4064] |
| 0x62,0xf5,0x54,0x28,0x5c,0x71,0x7f |
| |
| # ATT: vsubph -256(%edx){1to16}, %ymm5, %ymm6 {%k7} {z} |
| # INTEL: vsubph ymm6 {k7} {z}, ymm5, word ptr [edx - 256]{1to16} |
| 0x62,0xf5,0x54,0xbf,0x5c,0x72,0x80 |
| |
| # ATT: vsubph 268435456(%esp,%esi,8), %xmm5, %xmm6 {%k7} |
| # INTEL: vsubph xmm6 {k7}, xmm5, xmmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf5,0x54,0x0f,0x5c,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vsubph (%ecx){1to8}, %xmm5, %xmm6 |
| # INTEL: vsubph xmm6, xmm5, word ptr [ecx]{1to8} |
| 0x62,0xf5,0x54,0x18,0x5c,0x31 |
| |
| # ATT: vsubph 2032(%ecx), %xmm5, %xmm6 |
| # INTEL: vsubph xmm6, xmm5, xmmword ptr [ecx + 2032] |
| 0x62,0xf5,0x54,0x08,0x5c,0x71,0x7f |
| |
| # ATT: vsubph -256(%edx){1to8}, %xmm5, %xmm6 {%k7} {z} |
| # INTEL: vsubph xmm6 {k7} {z}, xmm5, word ptr [edx - 256]{1to8} |
| 0x62,0xf5,0x54,0x9f,0x5c,0x72,0x80 |
| |
| # ATT: vcvtdq2ph %xmm5, %xmm6 |
| # INTEL: vcvtdq2ph xmm6, xmm5 |
| 0x62,0xf5,0x7c,0x08,0x5b,0xf5 |
| |
| # ATT: vcvtdq2ph %ymm5, %xmm6 |
| # INTEL: vcvtdq2ph xmm6, ymm5 |
| 0x62,0xf5,0x7c,0x28,0x5b,0xf5 |
| |
| # ATT: vcvtdq2phx 268435456(%esp,%esi,8), %xmm6 {%k7} |
| # INTEL: vcvtdq2ph xmm6 {k7}, xmmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf5,0x7c,0x0f,0x5b,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vcvtdq2ph (%ecx){1to4}, %xmm6 |
| # INTEL: vcvtdq2ph xmm6, dword ptr [ecx]{1to4} |
| 0x62,0xf5,0x7c,0x18,0x5b,0x31 |
| |
| # ATT: vcvtdq2phx 2032(%ecx), %xmm6 |
| # INTEL: vcvtdq2ph xmm6, xmmword ptr [ecx + 2032] |
| 0x62,0xf5,0x7c,0x08,0x5b,0x71,0x7f |
| |
| # ATT: vcvtdq2ph -512(%edx){1to4}, %xmm6 {%k7} {z} |
| # INTEL: vcvtdq2ph xmm6 {k7} {z}, dword ptr [edx - 512]{1to4} |
| 0x62,0xf5,0x7c,0x9f,0x5b,0x72,0x80 |
| |
| # ATT: vcvtdq2ph (%ecx){1to8}, %xmm6 |
| # INTEL: vcvtdq2ph xmm6, dword ptr [ecx]{1to8} |
| 0x62,0xf5,0x7c,0x38,0x5b,0x31 |
| |
| # ATT: vcvtdq2phy 4064(%ecx), %xmm6 |
| # INTEL: vcvtdq2ph xmm6, ymmword ptr [ecx + 4064] |
| 0x62,0xf5,0x7c,0x28,0x5b,0x71,0x7f |
| |
| # ATT: vcvtdq2ph -512(%edx){1to8}, %xmm6 {%k7} {z} |
| # INTEL: vcvtdq2ph xmm6 {k7} {z}, dword ptr [edx - 512]{1to8} |
| 0x62,0xf5,0x7c,0xbf,0x5b,0x72,0x80 |
| |
| # ATT: vcvtpd2ph %xmm5, %xmm6 |
| # INTEL: vcvtpd2ph xmm6, xmm5 |
| 0x62,0xf5,0xfd,0x08,0x5a,0xf5 |
| |
| # ATT: vcvtpd2ph %ymm5, %xmm6 |
| # INTEL: vcvtpd2ph xmm6, ymm5 |
| 0x62,0xf5,0xfd,0x28,0x5a,0xf5 |
| |
| # ATT: vcvtpd2phx 268435456(%esp,%esi,8), %xmm6 {%k7} |
| # INTEL: vcvtpd2ph xmm6 {k7}, xmmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf5,0xfd,0x0f,0x5a,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vcvtpd2ph (%ecx){1to2}, %xmm6 |
| # INTEL: vcvtpd2ph xmm6, qword ptr [ecx]{1to2} |
| 0x62,0xf5,0xfd,0x18,0x5a,0x31 |
| |
| # ATT: vcvtpd2phx 2032(%ecx), %xmm6 |
| # INTEL: vcvtpd2ph xmm6, xmmword ptr [ecx + 2032] |
| 0x62,0xf5,0xfd,0x08,0x5a,0x71,0x7f |
| |
| # ATT: vcvtpd2ph -1024(%edx){1to2}, %xmm6 {%k7} {z} |
| # INTEL: vcvtpd2ph xmm6 {k7} {z}, qword ptr [edx - 1024]{1to2} |
| 0x62,0xf5,0xfd,0x9f,0x5a,0x72,0x80 |
| |
| # ATT: vcvtpd2ph (%ecx){1to4}, %xmm6 |
| # INTEL: vcvtpd2ph xmm6, qword ptr [ecx]{1to4} |
| 0x62,0xf5,0xfd,0x38,0x5a,0x31 |
| |
| # ATT: vcvtpd2phy 4064(%ecx), %xmm6 |
| # INTEL: vcvtpd2ph xmm6, ymmword ptr [ecx + 4064] |
| 0x62,0xf5,0xfd,0x28,0x5a,0x71,0x7f |
| |
| # ATT: vcvtpd2ph -1024(%edx){1to4}, %xmm6 {%k7} {z} |
| # INTEL: vcvtpd2ph xmm6 {k7} {z}, qword ptr [edx - 1024]{1to4} |
| 0x62,0xf5,0xfd,0xbf,0x5a,0x72,0x80 |
| |
| # ATT: vcvtph2dq %xmm5, %xmm6 |
| # INTEL: vcvtph2dq xmm6, xmm5 |
| 0x62,0xf5,0x7d,0x08,0x5b,0xf5 |
| |
| # ATT: vcvtph2dq %xmm5, %ymm6 |
| # INTEL: vcvtph2dq ymm6, xmm5 |
| 0x62,0xf5,0x7d,0x28,0x5b,0xf5 |
| |
| # ATT: vcvtph2dq 268435456(%esp,%esi,8), %xmm6 {%k7} |
| # INTEL: vcvtph2dq xmm6 {k7}, qword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf5,0x7d,0x0f,0x5b,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vcvtph2dq (%ecx){1to4}, %xmm6 |
| # INTEL: vcvtph2dq xmm6, word ptr [ecx]{1to4} |
| 0x62,0xf5,0x7d,0x18,0x5b,0x31 |
| |
| # ATT: vcvtph2dq 1016(%ecx), %xmm6 |
| # INTEL: vcvtph2dq xmm6, qword ptr [ecx + 1016] |
| 0x62,0xf5,0x7d,0x08,0x5b,0x71,0x7f |
| |
| # ATT: vcvtph2dq -256(%edx){1to4}, %xmm6 {%k7} {z} |
| # INTEL: vcvtph2dq xmm6 {k7} {z}, word ptr [edx - 256]{1to4} |
| 0x62,0xf5,0x7d,0x9f,0x5b,0x72,0x80 |
| |
| # ATT: vcvtph2dq 268435456(%esp,%esi,8), %ymm6 {%k7} |
| # INTEL: vcvtph2dq ymm6 {k7}, xmmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf5,0x7d,0x2f,0x5b,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vcvtph2dq (%ecx){1to8}, %ymm6 |
| # INTEL: vcvtph2dq ymm6, word ptr [ecx]{1to8} |
| 0x62,0xf5,0x7d,0x38,0x5b,0x31 |
| |
| # ATT: vcvtph2dq 2032(%ecx), %ymm6 |
| # INTEL: vcvtph2dq ymm6, xmmword ptr [ecx + 2032] |
| 0x62,0xf5,0x7d,0x28,0x5b,0x71,0x7f |
| |
| # ATT: vcvtph2dq -256(%edx){1to8}, %ymm6 {%k7} {z} |
| # INTEL: vcvtph2dq ymm6 {k7} {z}, word ptr [edx - 256]{1to8} |
| 0x62,0xf5,0x7d,0xbf,0x5b,0x72,0x80 |
| |
| # ATT: vcvtph2pd %xmm5, %xmm6 |
| # INTEL: vcvtph2pd xmm6, xmm5 |
| 0x62,0xf5,0x7c,0x08,0x5a,0xf5 |
| |
| # ATT: vcvtph2pd %xmm5, %ymm6 |
| # INTEL: vcvtph2pd ymm6, xmm5 |
| 0x62,0xf5,0x7c,0x28,0x5a,0xf5 |
| |
| # ATT: vcvtph2pd 268435456(%esp,%esi,8), %xmm6 {%k7} |
| # INTEL: vcvtph2pd xmm6 {k7}, dword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf5,0x7c,0x0f,0x5a,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vcvtph2pd (%ecx){1to2}, %xmm6 |
| # INTEL: vcvtph2pd xmm6, word ptr [ecx]{1to2} |
| 0x62,0xf5,0x7c,0x18,0x5a,0x31 |
| |
| # ATT: vcvtph2pd 508(%ecx), %xmm6 |
| # INTEL: vcvtph2pd xmm6, dword ptr [ecx + 508] |
| 0x62,0xf5,0x7c,0x08,0x5a,0x71,0x7f |
| |
| # ATT: vcvtph2pd -256(%edx){1to2}, %xmm6 {%k7} {z} |
| # INTEL: vcvtph2pd xmm6 {k7} {z}, word ptr [edx - 256]{1to2} |
| 0x62,0xf5,0x7c,0x9f,0x5a,0x72,0x80 |
| |
| # ATT: vcvtph2pd 268435456(%esp,%esi,8), %ymm6 {%k7} |
| # INTEL: vcvtph2pd ymm6 {k7}, qword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf5,0x7c,0x2f,0x5a,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vcvtph2pd (%ecx){1to4}, %ymm6 |
| # INTEL: vcvtph2pd ymm6, word ptr [ecx]{1to4} |
| 0x62,0xf5,0x7c,0x38,0x5a,0x31 |
| |
| # ATT: vcvtph2pd 1016(%ecx), %ymm6 |
| # INTEL: vcvtph2pd ymm6, qword ptr [ecx + 1016] |
| 0x62,0xf5,0x7c,0x28,0x5a,0x71,0x7f |
| |
| # ATT: vcvtph2pd -256(%edx){1to4}, %ymm6 {%k7} {z} |
| # INTEL: vcvtph2pd ymm6 {k7} {z}, word ptr [edx - 256]{1to4} |
| 0x62,0xf5,0x7c,0xbf,0x5a,0x72,0x80 |
| |
| # ATT: vcvtph2psx %xmm5, %xmm6 |
| # INTEL: vcvtph2psx xmm6, xmm5 |
| 0x62,0xf6,0x7d,0x08,0x13,0xf5 |
| |
| # ATT: vcvtph2psx %xmm5, %ymm6 |
| # INTEL: vcvtph2psx ymm6, xmm5 |
| 0x62,0xf6,0x7d,0x28,0x13,0xf5 |
| |
| # ATT: vcvtph2psx 268435456(%esp,%esi,8), %xmm6 {%k7} |
| # INTEL: vcvtph2psx xmm6 {k7}, qword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf6,0x7d,0x0f,0x13,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vcvtph2psx (%ecx){1to4}, %xmm6 |
| # INTEL: vcvtph2psx xmm6, word ptr [ecx]{1to4} |
| 0x62,0xf6,0x7d,0x18,0x13,0x31 |
| |
| # ATT: vcvtph2psx 1016(%ecx), %xmm6 |
| # INTEL: vcvtph2psx xmm6, qword ptr [ecx + 1016] |
| 0x62,0xf6,0x7d,0x08,0x13,0x71,0x7f |
| |
| # ATT: vcvtph2psx -256(%edx){1to4}, %xmm6 {%k7} {z} |
| # INTEL: vcvtph2psx xmm6 {k7} {z}, word ptr [edx - 256]{1to4} |
| 0x62,0xf6,0x7d,0x9f,0x13,0x72,0x80 |
| |
| # ATT: vcvtph2psx 268435456(%esp,%esi,8), %ymm6 {%k7} |
| # INTEL: vcvtph2psx ymm6 {k7}, xmmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf6,0x7d,0x2f,0x13,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vcvtph2psx (%ecx){1to8}, %ymm6 |
| # INTEL: vcvtph2psx ymm6, word ptr [ecx]{1to8} |
| 0x62,0xf6,0x7d,0x38,0x13,0x31 |
| |
| # ATT: vcvtph2psx 2032(%ecx), %ymm6 |
| # INTEL: vcvtph2psx ymm6, xmmword ptr [ecx + 2032] |
| 0x62,0xf6,0x7d,0x28,0x13,0x71,0x7f |
| |
| # ATT: vcvtph2psx -256(%edx){1to8}, %ymm6 {%k7} {z} |
| # INTEL: vcvtph2psx ymm6 {k7} {z}, word ptr [edx - 256]{1to8} |
| 0x62,0xf6,0x7d,0xbf,0x13,0x72,0x80 |
| |
| # ATT: vcvtph2qq %xmm5, %xmm6 |
| # INTEL: vcvtph2qq xmm6, xmm5 |
| 0x62,0xf5,0x7d,0x08,0x7b,0xf5 |
| |
| # ATT: vcvtph2qq %xmm5, %ymm6 |
| # INTEL: vcvtph2qq ymm6, xmm5 |
| 0x62,0xf5,0x7d,0x28,0x7b,0xf5 |
| |
| # ATT: vcvtph2qq 268435456(%esp,%esi,8), %xmm6 {%k7} |
| # INTEL: vcvtph2qq xmm6 {k7}, dword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf5,0x7d,0x0f,0x7b,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vcvtph2qq (%ecx){1to2}, %xmm6 |
| # INTEL: vcvtph2qq xmm6, word ptr [ecx]{1to2} |
| 0x62,0xf5,0x7d,0x18,0x7b,0x31 |
| |
| # ATT: vcvtph2qq 508(%ecx), %xmm6 |
| # INTEL: vcvtph2qq xmm6, dword ptr [ecx + 508] |
| 0x62,0xf5,0x7d,0x08,0x7b,0x71,0x7f |
| |
| # ATT: vcvtph2qq -256(%edx){1to2}, %xmm6 {%k7} {z} |
| # INTEL: vcvtph2qq xmm6 {k7} {z}, word ptr [edx - 256]{1to2} |
| 0x62,0xf5,0x7d,0x9f,0x7b,0x72,0x80 |
| |
| # ATT: vcvtph2qq 268435456(%esp,%esi,8), %ymm6 {%k7} |
| # INTEL: vcvtph2qq ymm6 {k7}, qword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf5,0x7d,0x2f,0x7b,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vcvtph2qq (%ecx){1to4}, %ymm6 |
| # INTEL: vcvtph2qq ymm6, word ptr [ecx]{1to4} |
| 0x62,0xf5,0x7d,0x38,0x7b,0x31 |
| |
| # ATT: vcvtph2qq 1016(%ecx), %ymm6 |
| # INTEL: vcvtph2qq ymm6, qword ptr [ecx + 1016] |
| 0x62,0xf5,0x7d,0x28,0x7b,0x71,0x7f |
| |
| # ATT: vcvtph2qq -256(%edx){1to4}, %ymm6 {%k7} {z} |
| # INTEL: vcvtph2qq ymm6 {k7} {z}, word ptr [edx - 256]{1to4} |
| 0x62,0xf5,0x7d,0xbf,0x7b,0x72,0x80 |
| |
| # ATT: vcvtph2udq %xmm5, %xmm6 |
| # INTEL: vcvtph2udq xmm6, xmm5 |
| 0x62,0xf5,0x7c,0x08,0x79,0xf5 |
| |
| # ATT: vcvtph2udq %xmm5, %ymm6 |
| # INTEL: vcvtph2udq ymm6, xmm5 |
| 0x62,0xf5,0x7c,0x28,0x79,0xf5 |
| |
| # ATT: vcvtph2udq 268435456(%esp,%esi,8), %xmm6 {%k7} |
| # INTEL: vcvtph2udq xmm6 {k7}, qword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf5,0x7c,0x0f,0x79,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vcvtph2udq (%ecx){1to4}, %xmm6 |
| # INTEL: vcvtph2udq xmm6, word ptr [ecx]{1to4} |
| 0x62,0xf5,0x7c,0x18,0x79,0x31 |
| |
| # ATT: vcvtph2udq 1016(%ecx), %xmm6 |
| # INTEL: vcvtph2udq xmm6, qword ptr [ecx + 1016] |
| 0x62,0xf5,0x7c,0x08,0x79,0x71,0x7f |
| |
| # ATT: vcvtph2udq -256(%edx){1to4}, %xmm6 {%k7} {z} |
| # INTEL: vcvtph2udq xmm6 {k7} {z}, word ptr [edx - 256]{1to4} |
| 0x62,0xf5,0x7c,0x9f,0x79,0x72,0x80 |
| |
| # ATT: vcvtph2udq 268435456(%esp,%esi,8), %ymm6 {%k7} |
| # INTEL: vcvtph2udq ymm6 {k7}, xmmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf5,0x7c,0x2f,0x79,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vcvtph2udq (%ecx){1to8}, %ymm6 |
| # INTEL: vcvtph2udq ymm6, word ptr [ecx]{1to8} |
| 0x62,0xf5,0x7c,0x38,0x79,0x31 |
| |
| # ATT: vcvtph2udq 2032(%ecx), %ymm6 |
| # INTEL: vcvtph2udq ymm6, xmmword ptr [ecx + 2032] |
| 0x62,0xf5,0x7c,0x28,0x79,0x71,0x7f |
| |
| # ATT: vcvtph2udq -256(%edx){1to8}, %ymm6 {%k7} {z} |
| # INTEL: vcvtph2udq ymm6 {k7} {z}, word ptr [edx - 256]{1to8} |
| 0x62,0xf5,0x7c,0xbf,0x79,0x72,0x80 |
| |
| # ATT: vcvtph2uqq %xmm5, %xmm6 |
| # INTEL: vcvtph2uqq xmm6, xmm5 |
| 0x62,0xf5,0x7d,0x08,0x79,0xf5 |
| |
| # ATT: vcvtph2uqq %xmm5, %ymm6 |
| # INTEL: vcvtph2uqq ymm6, xmm5 |
| 0x62,0xf5,0x7d,0x28,0x79,0xf5 |
| |
| # ATT: vcvtph2uqq 268435456(%esp,%esi,8), %xmm6 {%k7} |
| # INTEL: vcvtph2uqq xmm6 {k7}, dword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf5,0x7d,0x0f,0x79,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vcvtph2uqq (%ecx){1to2}, %xmm6 |
| # INTEL: vcvtph2uqq xmm6, word ptr [ecx]{1to2} |
| 0x62,0xf5,0x7d,0x18,0x79,0x31 |
| |
| # ATT: vcvtph2uqq 508(%ecx), %xmm6 |
| # INTEL: vcvtph2uqq xmm6, dword ptr [ecx + 508] |
| 0x62,0xf5,0x7d,0x08,0x79,0x71,0x7f |
| |
| # ATT: vcvtph2uqq -256(%edx){1to2}, %xmm6 {%k7} {z} |
| # INTEL: vcvtph2uqq xmm6 {k7} {z}, word ptr [edx - 256]{1to2} |
| 0x62,0xf5,0x7d,0x9f,0x79,0x72,0x80 |
| |
| # ATT: vcvtph2uqq 268435456(%esp,%esi,8), %ymm6 {%k7} |
| # INTEL: vcvtph2uqq ymm6 {k7}, qword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf5,0x7d,0x2f,0x79,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vcvtph2uqq (%ecx){1to4}, %ymm6 |
| # INTEL: vcvtph2uqq ymm6, word ptr [ecx]{1to4} |
| 0x62,0xf5,0x7d,0x38,0x79,0x31 |
| |
| # ATT: vcvtph2uqq 1016(%ecx), %ymm6 |
| # INTEL: vcvtph2uqq ymm6, qword ptr [ecx + 1016] |
| 0x62,0xf5,0x7d,0x28,0x79,0x71,0x7f |
| |
| # ATT: vcvtph2uqq -256(%edx){1to4}, %ymm6 {%k7} {z} |
| # INTEL: vcvtph2uqq ymm6 {k7} {z}, word ptr [edx - 256]{1to4} |
| 0x62,0xf5,0x7d,0xbf,0x79,0x72,0x80 |
| |
| # ATT: vcvtph2uw %xmm5, %xmm6 |
| # INTEL: vcvtph2uw xmm6, xmm5 |
| 0x62,0xf5,0x7c,0x08,0x7d,0xf5 |
| |
| # ATT: vcvtph2uw %ymm5, %ymm6 |
| # INTEL: vcvtph2uw ymm6, ymm5 |
| 0x62,0xf5,0x7c,0x28,0x7d,0xf5 |
| |
| # ATT: vcvtph2uw 268435456(%esp,%esi,8), %xmm6 {%k7} |
| # INTEL: vcvtph2uw xmm6 {k7}, xmmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf5,0x7c,0x0f,0x7d,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vcvtph2uw (%ecx){1to8}, %xmm6 |
| # INTEL: vcvtph2uw xmm6, word ptr [ecx]{1to8} |
| 0x62,0xf5,0x7c,0x18,0x7d,0x31 |
| |
| # ATT: vcvtph2uw 2032(%ecx), %xmm6 |
| # INTEL: vcvtph2uw xmm6, xmmword ptr [ecx + 2032] |
| 0x62,0xf5,0x7c,0x08,0x7d,0x71,0x7f |
| |
| # ATT: vcvtph2uw -256(%edx){1to8}, %xmm6 {%k7} {z} |
| # INTEL: vcvtph2uw xmm6 {k7} {z}, word ptr [edx - 256]{1to8} |
| 0x62,0xf5,0x7c,0x9f,0x7d,0x72,0x80 |
| |
| # ATT: vcvtph2uw 268435456(%esp,%esi,8), %ymm6 {%k7} |
| # INTEL: vcvtph2uw ymm6 {k7}, ymmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf5,0x7c,0x2f,0x7d,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vcvtph2uw (%ecx){1to16}, %ymm6 |
| # INTEL: vcvtph2uw ymm6, word ptr [ecx]{1to16} |
| 0x62,0xf5,0x7c,0x38,0x7d,0x31 |
| |
| # ATT: vcvtph2uw 4064(%ecx), %ymm6 |
| # INTEL: vcvtph2uw ymm6, ymmword ptr [ecx + 4064] |
| 0x62,0xf5,0x7c,0x28,0x7d,0x71,0x7f |
| |
| # ATT: vcvtph2uw -256(%edx){1to16}, %ymm6 {%k7} {z} |
| # INTEL: vcvtph2uw ymm6 {k7} {z}, word ptr [edx - 256]{1to16} |
| 0x62,0xf5,0x7c,0xbf,0x7d,0x72,0x80 |
| |
| # ATT: vcvtph2w %xmm5, %xmm6 |
| # INTEL: vcvtph2w xmm6, xmm5 |
| 0x62,0xf5,0x7d,0x08,0x7d,0xf5 |
| |
| # ATT: vcvtph2w %ymm5, %ymm6 |
| # INTEL: vcvtph2w ymm6, ymm5 |
| 0x62,0xf5,0x7d,0x28,0x7d,0xf5 |
| |
| # ATT: vcvtph2w 268435456(%esp,%esi,8), %xmm6 {%k7} |
| # INTEL: vcvtph2w xmm6 {k7}, xmmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf5,0x7d,0x0f,0x7d,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vcvtph2w (%ecx){1to8}, %xmm6 |
| # INTEL: vcvtph2w xmm6, word ptr [ecx]{1to8} |
| 0x62,0xf5,0x7d,0x18,0x7d,0x31 |
| |
| # ATT: vcvtph2w 2032(%ecx), %xmm6 |
| # INTEL: vcvtph2w xmm6, xmmword ptr [ecx + 2032] |
| 0x62,0xf5,0x7d,0x08,0x7d,0x71,0x7f |
| |
| # ATT: vcvtph2w -256(%edx){1to8}, %xmm6 {%k7} {z} |
| # INTEL: vcvtph2w xmm6 {k7} {z}, word ptr [edx - 256]{1to8} |
| 0x62,0xf5,0x7d,0x9f,0x7d,0x72,0x80 |
| |
| # ATT: vcvtph2w 268435456(%esp,%esi,8), %ymm6 {%k7} |
| # INTEL: vcvtph2w ymm6 {k7}, ymmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf5,0x7d,0x2f,0x7d,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vcvtph2w (%ecx){1to16}, %ymm6 |
| # INTEL: vcvtph2w ymm6, word ptr [ecx]{1to16} |
| 0x62,0xf5,0x7d,0x38,0x7d,0x31 |
| |
| # ATT: vcvtph2w 4064(%ecx), %ymm6 |
| # INTEL: vcvtph2w ymm6, ymmword ptr [ecx + 4064] |
| 0x62,0xf5,0x7d,0x28,0x7d,0x71,0x7f |
| |
| # ATT: vcvtph2w -256(%edx){1to16}, %ymm6 {%k7} {z} |
| # INTEL: vcvtph2w ymm6 {k7} {z}, word ptr [edx - 256]{1to16} |
| 0x62,0xf5,0x7d,0xbf,0x7d,0x72,0x80 |
| |
| # ATT: vcvtps2phx %xmm5, %xmm6 |
| # INTEL: vcvtps2phx xmm6, xmm5 |
| 0x62,0xf5,0x7d,0x08,0x1d,0xf5 |
| |
| # ATT: vcvtps2phx %ymm5, %xmm6 |
| # INTEL: vcvtps2phx xmm6, ymm5 |
| 0x62,0xf5,0x7d,0x28,0x1d,0xf5 |
| |
| # ATT: vcvtps2phxx 268435456(%esp,%esi,8), %xmm6 {%k7} |
| # INTEL: vcvtps2phx xmm6 {k7}, xmmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf5,0x7d,0x0f,0x1d,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vcvtps2phx (%ecx){1to4}, %xmm6 |
| # INTEL: vcvtps2phx xmm6, dword ptr [ecx]{1to4} |
| 0x62,0xf5,0x7d,0x18,0x1d,0x31 |
| |
| # ATT: vcvtps2phxx 2032(%ecx), %xmm6 |
| # INTEL: vcvtps2phx xmm6, xmmword ptr [ecx + 2032] |
| 0x62,0xf5,0x7d,0x08,0x1d,0x71,0x7f |
| |
| # ATT: vcvtps2phx -512(%edx){1to4}, %xmm6 {%k7} {z} |
| # INTEL: vcvtps2phx xmm6 {k7} {z}, dword ptr [edx - 512]{1to4} |
| 0x62,0xf5,0x7d,0x9f,0x1d,0x72,0x80 |
| |
| # ATT: vcvtps2phx (%ecx){1to8}, %xmm6 |
| # INTEL: vcvtps2phx xmm6, dword ptr [ecx]{1to8} |
| 0x62,0xf5,0x7d,0x38,0x1d,0x31 |
| |
| # ATT: vcvtps2phxy 4064(%ecx), %xmm6 |
| # INTEL: vcvtps2phx xmm6, ymmword ptr [ecx + 4064] |
| 0x62,0xf5,0x7d,0x28,0x1d,0x71,0x7f |
| |
| # ATT: vcvtps2phx -512(%edx){1to8}, %xmm6 {%k7} {z} |
| # INTEL: vcvtps2phx xmm6 {k7} {z}, dword ptr [edx - 512]{1to8} |
| 0x62,0xf5,0x7d,0xbf,0x1d,0x72,0x80 |
| |
| # ATT: vcvtqq2ph %xmm5, %xmm6 |
| # INTEL: vcvtqq2ph xmm6, xmm5 |
| 0x62,0xf5,0xfc,0x08,0x5b,0xf5 |
| |
| # ATT: vcvtqq2ph %ymm5, %xmm6 |
| # INTEL: vcvtqq2ph xmm6, ymm5 |
| 0x62,0xf5,0xfc,0x28,0x5b,0xf5 |
| |
| # ATT: vcvtqq2phx 268435456(%esp,%esi,8), %xmm6 {%k7} |
| # INTEL: vcvtqq2ph xmm6 {k7}, xmmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf5,0xfc,0x0f,0x5b,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vcvtqq2ph (%ecx){1to2}, %xmm6 |
| # INTEL: vcvtqq2ph xmm6, qword ptr [ecx]{1to2} |
| 0x62,0xf5,0xfc,0x18,0x5b,0x31 |
| |
| # ATT: vcvtqq2phx 2032(%ecx), %xmm6 |
| # INTEL: vcvtqq2ph xmm6, xmmword ptr [ecx + 2032] |
| 0x62,0xf5,0xfc,0x08,0x5b,0x71,0x7f |
| |
| # ATT: vcvtqq2ph -1024(%edx){1to2}, %xmm6 {%k7} {z} |
| # INTEL: vcvtqq2ph xmm6 {k7} {z}, qword ptr [edx - 1024]{1to2} |
| 0x62,0xf5,0xfc,0x9f,0x5b,0x72,0x80 |
| |
| # ATT: vcvtqq2ph (%ecx){1to4}, %xmm6 |
| # INTEL: vcvtqq2ph xmm6, qword ptr [ecx]{1to4} |
| 0x62,0xf5,0xfc,0x38,0x5b,0x31 |
| |
| # ATT: vcvtqq2phy 4064(%ecx), %xmm6 |
| # INTEL: vcvtqq2ph xmm6, ymmword ptr [ecx + 4064] |
| 0x62,0xf5,0xfc,0x28,0x5b,0x71,0x7f |
| |
| # ATT: vcvtqq2ph -1024(%edx){1to4}, %xmm6 {%k7} {z} |
| # INTEL: vcvtqq2ph xmm6 {k7} {z}, qword ptr [edx - 1024]{1to4} |
| 0x62,0xf5,0xfc,0xbf,0x5b,0x72,0x80 |
| |
| # ATT: vcvttph2dq %xmm5, %xmm6 |
| # INTEL: vcvttph2dq xmm6, xmm5 |
| 0x62,0xf5,0x7e,0x08,0x5b,0xf5 |
| |
| # ATT: vcvttph2dq %xmm5, %ymm6 |
| # INTEL: vcvttph2dq ymm6, xmm5 |
| 0x62,0xf5,0x7e,0x28,0x5b,0xf5 |
| |
| # ATT: vcvttph2dq 268435456(%esp,%esi,8), %xmm6 {%k7} |
| # INTEL: vcvttph2dq xmm6 {k7}, qword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf5,0x7e,0x0f,0x5b,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vcvttph2dq (%ecx){1to4}, %xmm6 |
| # INTEL: vcvttph2dq xmm6, word ptr [ecx]{1to4} |
| 0x62,0xf5,0x7e,0x18,0x5b,0x31 |
| |
| # ATT: vcvttph2dq 1016(%ecx), %xmm6 |
| # INTEL: vcvttph2dq xmm6, qword ptr [ecx + 1016] |
| 0x62,0xf5,0x7e,0x08,0x5b,0x71,0x7f |
| |
| # ATT: vcvttph2dq -256(%edx){1to4}, %xmm6 {%k7} {z} |
| # INTEL: vcvttph2dq xmm6 {k7} {z}, word ptr [edx - 256]{1to4} |
| 0x62,0xf5,0x7e,0x9f,0x5b,0x72,0x80 |
| |
| # ATT: vcvttph2dq 268435456(%esp,%esi,8), %ymm6 {%k7} |
| # INTEL: vcvttph2dq ymm6 {k7}, xmmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf5,0x7e,0x2f,0x5b,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vcvttph2dq (%ecx){1to8}, %ymm6 |
| # INTEL: vcvttph2dq ymm6, word ptr [ecx]{1to8} |
| 0x62,0xf5,0x7e,0x38,0x5b,0x31 |
| |
| # ATT: vcvttph2dq 2032(%ecx), %ymm6 |
| # INTEL: vcvttph2dq ymm6, xmmword ptr [ecx + 2032] |
| 0x62,0xf5,0x7e,0x28,0x5b,0x71,0x7f |
| |
| # ATT: vcvttph2dq -256(%edx){1to8}, %ymm6 {%k7} {z} |
| # INTEL: vcvttph2dq ymm6 {k7} {z}, word ptr [edx - 256]{1to8} |
| 0x62,0xf5,0x7e,0xbf,0x5b,0x72,0x80 |
| |
| # ATT: vcvttph2qq %xmm5, %xmm6 |
| # INTEL: vcvttph2qq xmm6, xmm5 |
| 0x62,0xf5,0x7d,0x08,0x7a,0xf5 |
| |
| # ATT: vcvttph2qq %xmm5, %ymm6 |
| # INTEL: vcvttph2qq ymm6, xmm5 |
| 0x62,0xf5,0x7d,0x28,0x7a,0xf5 |
| |
| # ATT: vcvttph2qq 268435456(%esp,%esi,8), %xmm6 {%k7} |
| # INTEL: vcvttph2qq xmm6 {k7}, dword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf5,0x7d,0x0f,0x7a,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vcvttph2qq (%ecx){1to2}, %xmm6 |
| # INTEL: vcvttph2qq xmm6, word ptr [ecx]{1to2} |
| 0x62,0xf5,0x7d,0x18,0x7a,0x31 |
| |
| # ATT: vcvttph2qq 508(%ecx), %xmm6 |
| # INTEL: vcvttph2qq xmm6, dword ptr [ecx + 508] |
| 0x62,0xf5,0x7d,0x08,0x7a,0x71,0x7f |
| |
| # ATT: vcvttph2qq -256(%edx){1to2}, %xmm6 {%k7} {z} |
| # INTEL: vcvttph2qq xmm6 {k7} {z}, word ptr [edx - 256]{1to2} |
| 0x62,0xf5,0x7d,0x9f,0x7a,0x72,0x80 |
| |
| # ATT: vcvttph2qq 268435456(%esp,%esi,8), %ymm6 {%k7} |
| # INTEL: vcvttph2qq ymm6 {k7}, qword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf5,0x7d,0x2f,0x7a,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vcvttph2qq (%ecx){1to4}, %ymm6 |
| # INTEL: vcvttph2qq ymm6, word ptr [ecx]{1to4} |
| 0x62,0xf5,0x7d,0x38,0x7a,0x31 |
| |
| # ATT: vcvttph2qq 1016(%ecx), %ymm6 |
| # INTEL: vcvttph2qq ymm6, qword ptr [ecx + 1016] |
| 0x62,0xf5,0x7d,0x28,0x7a,0x71,0x7f |
| |
| # ATT: vcvttph2qq -256(%edx){1to4}, %ymm6 {%k7} {z} |
| # INTEL: vcvttph2qq ymm6 {k7} {z}, word ptr [edx - 256]{1to4} |
| 0x62,0xf5,0x7d,0xbf,0x7a,0x72,0x80 |
| |
| # ATT: vcvttph2udq %xmm5, %xmm6 |
| # INTEL: vcvttph2udq xmm6, xmm5 |
| 0x62,0xf5,0x7c,0x08,0x78,0xf5 |
| |
| # ATT: vcvttph2udq %xmm5, %ymm6 |
| # INTEL: vcvttph2udq ymm6, xmm5 |
| 0x62,0xf5,0x7c,0x28,0x78,0xf5 |
| |
| # ATT: vcvttph2udq 268435456(%esp,%esi,8), %xmm6 {%k7} |
| # INTEL: vcvttph2udq xmm6 {k7}, qword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf5,0x7c,0x0f,0x78,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vcvttph2udq (%ecx){1to4}, %xmm6 |
| # INTEL: vcvttph2udq xmm6, word ptr [ecx]{1to4} |
| 0x62,0xf5,0x7c,0x18,0x78,0x31 |
| |
| # ATT: vcvttph2udq 1016(%ecx), %xmm6 |
| # INTEL: vcvttph2udq xmm6, qword ptr [ecx + 1016] |
| 0x62,0xf5,0x7c,0x08,0x78,0x71,0x7f |
| |
| # ATT: vcvttph2udq -256(%edx){1to4}, %xmm6 {%k7} {z} |
| # INTEL: vcvttph2udq xmm6 {k7} {z}, word ptr [edx - 256]{1to4} |
| 0x62,0xf5,0x7c,0x9f,0x78,0x72,0x80 |
| |
| # ATT: vcvttph2udq 268435456(%esp,%esi,8), %ymm6 {%k7} |
| # INTEL: vcvttph2udq ymm6 {k7}, xmmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf5,0x7c,0x2f,0x78,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vcvttph2udq (%ecx){1to8}, %ymm6 |
| # INTEL: vcvttph2udq ymm6, word ptr [ecx]{1to8} |
| 0x62,0xf5,0x7c,0x38,0x78,0x31 |
| |
| # ATT: vcvttph2udq 2032(%ecx), %ymm6 |
| # INTEL: vcvttph2udq ymm6, xmmword ptr [ecx + 2032] |
| 0x62,0xf5,0x7c,0x28,0x78,0x71,0x7f |
| |
| # ATT: vcvttph2udq -256(%edx){1to8}, %ymm6 {%k7} {z} |
| # INTEL: vcvttph2udq ymm6 {k7} {z}, word ptr [edx - 256]{1to8} |
| 0x62,0xf5,0x7c,0xbf,0x78,0x72,0x80 |
| |
| # ATT: vcvttph2uqq %xmm5, %xmm6 |
| # INTEL: vcvttph2uqq xmm6, xmm5 |
| 0x62,0xf5,0x7d,0x08,0x78,0xf5 |
| |
| # ATT: vcvttph2uqq %xmm5, %ymm6 |
| # INTEL: vcvttph2uqq ymm6, xmm5 |
| 0x62,0xf5,0x7d,0x28,0x78,0xf5 |
| |
| # ATT: vcvttph2uqq 268435456(%esp,%esi,8), %xmm6 {%k7} |
| # INTEL: vcvttph2uqq xmm6 {k7}, dword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf5,0x7d,0x0f,0x78,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vcvttph2uqq (%ecx){1to2}, %xmm6 |
| # INTEL: vcvttph2uqq xmm6, word ptr [ecx]{1to2} |
| 0x62,0xf5,0x7d,0x18,0x78,0x31 |
| |
| # ATT: vcvttph2uqq 508(%ecx), %xmm6 |
| # INTEL: vcvttph2uqq xmm6, dword ptr [ecx + 508] |
| 0x62,0xf5,0x7d,0x08,0x78,0x71,0x7f |
| |
| # ATT: vcvttph2uqq -256(%edx){1to2}, %xmm6 {%k7} {z} |
| # INTEL: vcvttph2uqq xmm6 {k7} {z}, word ptr [edx - 256]{1to2} |
| 0x62,0xf5,0x7d,0x9f,0x78,0x72,0x80 |
| |
| # ATT: vcvttph2uqq 268435456(%esp,%esi,8), %ymm6 {%k7} |
| # INTEL: vcvttph2uqq ymm6 {k7}, qword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf5,0x7d,0x2f,0x78,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vcvttph2uqq (%ecx){1to4}, %ymm6 |
| # INTEL: vcvttph2uqq ymm6, word ptr [ecx]{1to4} |
| 0x62,0xf5,0x7d,0x38,0x78,0x31 |
| |
| # ATT: vcvttph2uqq 1016(%ecx), %ymm6 |
| # INTEL: vcvttph2uqq ymm6, qword ptr [ecx + 1016] |
| 0x62,0xf5,0x7d,0x28,0x78,0x71,0x7f |
| |
| # ATT: vcvttph2uqq -256(%edx){1to4}, %ymm6 {%k7} {z} |
| # INTEL: vcvttph2uqq ymm6 {k7} {z}, word ptr [edx - 256]{1to4} |
| 0x62,0xf5,0x7d,0xbf,0x78,0x72,0x80 |
| |
| # ATT: vcvttph2uw %xmm5, %xmm6 |
| # INTEL: vcvttph2uw xmm6, xmm5 |
| 0x62,0xf5,0x7c,0x08,0x7c,0xf5 |
| |
| # ATT: vcvttph2uw %ymm5, %ymm6 |
| # INTEL: vcvttph2uw ymm6, ymm5 |
| 0x62,0xf5,0x7c,0x28,0x7c,0xf5 |
| |
| # ATT: vcvttph2uw 268435456(%esp,%esi,8), %xmm6 {%k7} |
| # INTEL: vcvttph2uw xmm6 {k7}, xmmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf5,0x7c,0x0f,0x7c,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vcvttph2uw (%ecx){1to8}, %xmm6 |
| # INTEL: vcvttph2uw xmm6, word ptr [ecx]{1to8} |
| 0x62,0xf5,0x7c,0x18,0x7c,0x31 |
| |
| # ATT: vcvttph2uw 2032(%ecx), %xmm6 |
| # INTEL: vcvttph2uw xmm6, xmmword ptr [ecx + 2032] |
| 0x62,0xf5,0x7c,0x08,0x7c,0x71,0x7f |
| |
| # ATT: vcvttph2uw -256(%edx){1to8}, %xmm6 {%k7} {z} |
| # INTEL: vcvttph2uw xmm6 {k7} {z}, word ptr [edx - 256]{1to8} |
| 0x62,0xf5,0x7c,0x9f,0x7c,0x72,0x80 |
| |
| # ATT: vcvttph2uw 268435456(%esp,%esi,8), %ymm6 {%k7} |
| # INTEL: vcvttph2uw ymm6 {k7}, ymmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf5,0x7c,0x2f,0x7c,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vcvttph2uw (%ecx){1to16}, %ymm6 |
| # INTEL: vcvttph2uw ymm6, word ptr [ecx]{1to16} |
| 0x62,0xf5,0x7c,0x38,0x7c,0x31 |
| |
| # ATT: vcvttph2uw 4064(%ecx), %ymm6 |
| # INTEL: vcvttph2uw ymm6, ymmword ptr [ecx + 4064] |
| 0x62,0xf5,0x7c,0x28,0x7c,0x71,0x7f |
| |
| # ATT: vcvttph2uw -256(%edx){1to16}, %ymm6 {%k7} {z} |
| # INTEL: vcvttph2uw ymm6 {k7} {z}, word ptr [edx - 256]{1to16} |
| 0x62,0xf5,0x7c,0xbf,0x7c,0x72,0x80 |
| |
| # ATT: vcvttph2w %xmm5, %xmm6 |
| # INTEL: vcvttph2w xmm6, xmm5 |
| 0x62,0xf5,0x7d,0x08,0x7c,0xf5 |
| |
| # ATT: vcvttph2w %ymm5, %ymm6 |
| # INTEL: vcvttph2w ymm6, ymm5 |
| 0x62,0xf5,0x7d,0x28,0x7c,0xf5 |
| |
| # ATT: vcvttph2w 268435456(%esp,%esi,8), %xmm6 {%k7} |
| # INTEL: vcvttph2w xmm6 {k7}, xmmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf5,0x7d,0x0f,0x7c,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vcvttph2w (%ecx){1to8}, %xmm6 |
| # INTEL: vcvttph2w xmm6, word ptr [ecx]{1to8} |
| 0x62,0xf5,0x7d,0x18,0x7c,0x31 |
| |
| # ATT: vcvttph2w 2032(%ecx), %xmm6 |
| # INTEL: vcvttph2w xmm6, xmmword ptr [ecx + 2032] |
| 0x62,0xf5,0x7d,0x08,0x7c,0x71,0x7f |
| |
| # ATT: vcvttph2w -256(%edx){1to8}, %xmm6 {%k7} {z} |
| # INTEL: vcvttph2w xmm6 {k7} {z}, word ptr [edx - 256]{1to8} |
| 0x62,0xf5,0x7d,0x9f,0x7c,0x72,0x80 |
| |
| # ATT: vcvttph2w 268435456(%esp,%esi,8), %ymm6 {%k7} |
| # INTEL: vcvttph2w ymm6 {k7}, ymmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf5,0x7d,0x2f,0x7c,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vcvttph2w (%ecx){1to16}, %ymm6 |
| # INTEL: vcvttph2w ymm6, word ptr [ecx]{1to16} |
| 0x62,0xf5,0x7d,0x38,0x7c,0x31 |
| |
| # ATT: vcvttph2w 4064(%ecx), %ymm6 |
| # INTEL: vcvttph2w ymm6, ymmword ptr [ecx + 4064] |
| 0x62,0xf5,0x7d,0x28,0x7c,0x71,0x7f |
| |
| # ATT: vcvttph2w -256(%edx){1to16}, %ymm6 {%k7} {z} |
| # INTEL: vcvttph2w ymm6 {k7} {z}, word ptr [edx - 256]{1to16} |
| 0x62,0xf5,0x7d,0xbf,0x7c,0x72,0x80 |
| |
| # ATT: vcvtudq2ph %xmm5, %xmm6 |
| # INTEL: vcvtudq2ph xmm6, xmm5 |
| 0x62,0xf5,0x7f,0x08,0x7a,0xf5 |
| |
| # ATT: vcvtudq2ph %ymm5, %xmm6 |
| # INTEL: vcvtudq2ph xmm6, ymm5 |
| 0x62,0xf5,0x7f,0x28,0x7a,0xf5 |
| |
| # ATT: vcvtudq2phx 268435456(%esp,%esi,8), %xmm6 {%k7} |
| # INTEL: vcvtudq2ph xmm6 {k7}, xmmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf5,0x7f,0x0f,0x7a,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vcvtudq2ph (%ecx){1to4}, %xmm6 |
| # INTEL: vcvtudq2ph xmm6, dword ptr [ecx]{1to4} |
| 0x62,0xf5,0x7f,0x18,0x7a,0x31 |
| |
| # ATT: vcvtudq2phx 2032(%ecx), %xmm6 |
| # INTEL: vcvtudq2ph xmm6, xmmword ptr [ecx + 2032] |
| 0x62,0xf5,0x7f,0x08,0x7a,0x71,0x7f |
| |
| # ATT: vcvtudq2ph -512(%edx){1to4}, %xmm6 {%k7} {z} |
| # INTEL: vcvtudq2ph xmm6 {k7} {z}, dword ptr [edx - 512]{1to4} |
| 0x62,0xf5,0x7f,0x9f,0x7a,0x72,0x80 |
| |
| # ATT: vcvtudq2ph (%ecx){1to8}, %xmm6 |
| # INTEL: vcvtudq2ph xmm6, dword ptr [ecx]{1to8} |
| 0x62,0xf5,0x7f,0x38,0x7a,0x31 |
| |
| # ATT: vcvtudq2phy 4064(%ecx), %xmm6 |
| # INTEL: vcvtudq2ph xmm6, ymmword ptr [ecx + 4064] |
| 0x62,0xf5,0x7f,0x28,0x7a,0x71,0x7f |
| |
| # ATT: vcvtudq2ph -512(%edx){1to8}, %xmm6 {%k7} {z} |
| # INTEL: vcvtudq2ph xmm6 {k7} {z}, dword ptr [edx - 512]{1to8} |
| 0x62,0xf5,0x7f,0xbf,0x7a,0x72,0x80 |
| |
| # ATT: vcvtuqq2ph %xmm5, %xmm6 |
| # INTEL: vcvtuqq2ph xmm6, xmm5 |
| 0x62,0xf5,0xff,0x08,0x7a,0xf5 |
| |
| # ATT: vcvtuqq2ph %ymm5, %xmm6 |
| # INTEL: vcvtuqq2ph xmm6, ymm5 |
| 0x62,0xf5,0xff,0x28,0x7a,0xf5 |
| |
| # ATT: vcvtuqq2phx 268435456(%esp,%esi,8), %xmm6 {%k7} |
| # INTEL: vcvtuqq2ph xmm6 {k7}, xmmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf5,0xff,0x0f,0x7a,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vcvtuqq2ph (%ecx){1to2}, %xmm6 |
| # INTEL: vcvtuqq2ph xmm6, qword ptr [ecx]{1to2} |
| 0x62,0xf5,0xff,0x18,0x7a,0x31 |
| |
| # ATT: vcvtuqq2phx 2032(%ecx), %xmm6 |
| # INTEL: vcvtuqq2ph xmm6, xmmword ptr [ecx + 2032] |
| 0x62,0xf5,0xff,0x08,0x7a,0x71,0x7f |
| |
| # ATT: vcvtuqq2ph -1024(%edx){1to2}, %xmm6 {%k7} {z} |
| # INTEL: vcvtuqq2ph xmm6 {k7} {z}, qword ptr [edx - 1024]{1to2} |
| 0x62,0xf5,0xff,0x9f,0x7a,0x72,0x80 |
| |
| # ATT: vcvtuqq2ph (%ecx){1to4}, %xmm6 |
| # INTEL: vcvtuqq2ph xmm6, qword ptr [ecx]{1to4} |
| 0x62,0xf5,0xff,0x38,0x7a,0x31 |
| |
| # ATT: vcvtuqq2phy 4064(%ecx), %xmm6 |
| # INTEL: vcvtuqq2ph xmm6, ymmword ptr [ecx + 4064] |
| 0x62,0xf5,0xff,0x28,0x7a,0x71,0x7f |
| |
| # ATT: vcvtuqq2ph -1024(%edx){1to4}, %xmm6 {%k7} {z} |
| # INTEL: vcvtuqq2ph xmm6 {k7} {z}, qword ptr [edx - 1024]{1to4} |
| 0x62,0xf5,0xff,0xbf,0x7a,0x72,0x80 |
| |
| # ATT: vcvtuw2ph %xmm5, %xmm6 |
| # INTEL: vcvtuw2ph xmm6, xmm5 |
| 0x62,0xf5,0x7f,0x08,0x7d,0xf5 |
| |
| # ATT: vcvtuw2ph %ymm5, %ymm6 |
| # INTEL: vcvtuw2ph ymm6, ymm5 |
| 0x62,0xf5,0x7f,0x28,0x7d,0xf5 |
| |
| # ATT: vcvtuw2ph 268435456(%esp,%esi,8), %xmm6 {%k7} |
| # INTEL: vcvtuw2ph xmm6 {k7}, xmmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf5,0x7f,0x0f,0x7d,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vcvtuw2ph (%ecx){1to8}, %xmm6 |
| # INTEL: vcvtuw2ph xmm6, word ptr [ecx]{1to8} |
| 0x62,0xf5,0x7f,0x18,0x7d,0x31 |
| |
| # ATT: vcvtuw2ph 2032(%ecx), %xmm6 |
| # INTEL: vcvtuw2ph xmm6, xmmword ptr [ecx + 2032] |
| 0x62,0xf5,0x7f,0x08,0x7d,0x71,0x7f |
| |
| # ATT: vcvtuw2ph -256(%edx){1to8}, %xmm6 {%k7} {z} |
| # INTEL: vcvtuw2ph xmm6 {k7} {z}, word ptr [edx - 256]{1to8} |
| 0x62,0xf5,0x7f,0x9f,0x7d,0x72,0x80 |
| |
| # ATT: vcvtuw2ph 268435456(%esp,%esi,8), %ymm6 {%k7} |
| # INTEL: vcvtuw2ph ymm6 {k7}, ymmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf5,0x7f,0x2f,0x7d,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vcvtuw2ph (%ecx){1to16}, %ymm6 |
| # INTEL: vcvtuw2ph ymm6, word ptr [ecx]{1to16} |
| 0x62,0xf5,0x7f,0x38,0x7d,0x31 |
| |
| # ATT: vcvtuw2ph 4064(%ecx), %ymm6 |
| # INTEL: vcvtuw2ph ymm6, ymmword ptr [ecx + 4064] |
| 0x62,0xf5,0x7f,0x28,0x7d,0x71,0x7f |
| |
| # ATT: vcvtuw2ph -256(%edx){1to16}, %ymm6 {%k7} {z} |
| # INTEL: vcvtuw2ph ymm6 {k7} {z}, word ptr [edx - 256]{1to16} |
| 0x62,0xf5,0x7f,0xbf,0x7d,0x72,0x80 |
| |
| # ATT: vcvtw2ph %xmm5, %xmm6 |
| # INTEL: vcvtw2ph xmm6, xmm5 |
| 0x62,0xf5,0x7e,0x08,0x7d,0xf5 |
| |
| # ATT: vcvtw2ph %ymm5, %ymm6 |
| # INTEL: vcvtw2ph ymm6, ymm5 |
| 0x62,0xf5,0x7e,0x28,0x7d,0xf5 |
| |
| # ATT: vcvtw2ph 268435456(%esp,%esi,8), %xmm6 {%k7} |
| # INTEL: vcvtw2ph xmm6 {k7}, xmmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf5,0x7e,0x0f,0x7d,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vcvtw2ph (%ecx){1to8}, %xmm6 |
| # INTEL: vcvtw2ph xmm6, word ptr [ecx]{1to8} |
| 0x62,0xf5,0x7e,0x18,0x7d,0x31 |
| |
| # ATT: vcvtw2ph 2032(%ecx), %xmm6 |
| # INTEL: vcvtw2ph xmm6, xmmword ptr [ecx + 2032] |
| 0x62,0xf5,0x7e,0x08,0x7d,0x71,0x7f |
| |
| # ATT: vcvtw2ph -256(%edx){1to8}, %xmm6 {%k7} {z} |
| # INTEL: vcvtw2ph xmm6 {k7} {z}, word ptr [edx - 256]{1to8} |
| 0x62,0xf5,0x7e,0x9f,0x7d,0x72,0x80 |
| |
| # ATT: vcvtw2ph 268435456(%esp,%esi,8), %ymm6 {%k7} |
| # INTEL: vcvtw2ph ymm6 {k7}, ymmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf5,0x7e,0x2f,0x7d,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vcvtw2ph (%ecx){1to16}, %ymm6 |
| # INTEL: vcvtw2ph ymm6, word ptr [ecx]{1to16} |
| 0x62,0xf5,0x7e,0x38,0x7d,0x31 |
| |
| # ATT: vcvtw2ph 4064(%ecx), %ymm6 |
| # INTEL: vcvtw2ph ymm6, ymmword ptr [ecx + 4064] |
| 0x62,0xf5,0x7e,0x28,0x7d,0x71,0x7f |
| |
| # ATT: vcvtw2ph -256(%edx){1to16}, %ymm6 {%k7} {z} |
| # INTEL: vcvtw2ph ymm6 {k7} {z}, word ptr [edx - 256]{1to16} |
| 0x62,0xf5,0x7e,0xbf,0x7d,0x72,0x80 |
| |
| # ATT: vfpclassph $123, %xmm6, %k5 |
| # INTEL: vfpclassph k5, xmm6, 123 |
| 0x62,0xf3,0x7c,0x08,0x66,0xee,0x7b |
| |
| # ATT: vfpclassph $123, %ymm6, %k5 |
| # INTEL: vfpclassph k5, ymm6, 123 |
| 0x62,0xf3,0x7c,0x28,0x66,0xee,0x7b |
| |
| # ATT: vfpclassphx $123, 268435456(%esp,%esi,8), %k5 {%k7} |
| # INTEL: vfpclassph k5 {k7}, xmmword ptr [esp + 8*esi + 268435456], 123 |
| 0x62,0xf3,0x7c,0x0f,0x66,0xac,0xf4,0x00,0x00,0x00,0x10,0x7b |
| |
| # ATT: vfpclassph $123, (%ecx){1to8}, %k5 |
| # INTEL: vfpclassph k5, word ptr [ecx]{1to8}, 123 |
| 0x62,0xf3,0x7c,0x18,0x66,0x29,0x7b |
| |
| # ATT: vfpclassphx $123, 2032(%ecx), %k5 |
| # INTEL: vfpclassph k5, xmmword ptr [ecx + 2032], 123 |
| 0x62,0xf3,0x7c,0x08,0x66,0x69,0x7f,0x7b |
| |
| # ATT: vfpclassph $123, -256(%edx){1to8}, %k5 {%k7} |
| # INTEL: vfpclassph k5 {k7}, word ptr [edx - 256]{1to8}, 123 |
| 0x62,0xf3,0x7c,0x1f,0x66,0x6a,0x80,0x7b |
| |
| # ATT: vfpclassph $123, (%ecx){1to16}, %k5 |
| # INTEL: vfpclassph k5, word ptr [ecx]{1to16}, 123 |
| 0x62,0xf3,0x7c,0x38,0x66,0x29,0x7b |
| |
| # ATT: vfpclassphy $123, 4064(%ecx), %k5 |
| # INTEL: vfpclassph k5, ymmword ptr [ecx + 4064], 123 |
| 0x62,0xf3,0x7c,0x28,0x66,0x69,0x7f,0x7b |
| |
| # ATT: vfpclassph $123, -256(%edx){1to16}, %k5 {%k7} |
| # INTEL: vfpclassph k5 {k7}, word ptr [edx - 256]{1to16}, 123 |
| 0x62,0xf3,0x7c,0x3f,0x66,0x6a,0x80,0x7b |
| |
| # ATT: vgetexpph %xmm5, %xmm6 |
| # INTEL: vgetexpph xmm6, xmm5 |
| 0x62,0xf6,0x7d,0x08,0x42,0xf5 |
| |
| # ATT: vgetexpph %ymm5, %ymm6 |
| # INTEL: vgetexpph ymm6, ymm5 |
| 0x62,0xf6,0x7d,0x28,0x42,0xf5 |
| |
| # ATT: vgetexpph 268435456(%esp,%esi,8), %xmm6 {%k7} |
| # INTEL: vgetexpph xmm6 {k7}, xmmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf6,0x7d,0x0f,0x42,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vgetexpph (%ecx){1to8}, %xmm6 |
| # INTEL: vgetexpph xmm6, word ptr [ecx]{1to8} |
| 0x62,0xf6,0x7d,0x18,0x42,0x31 |
| |
| # ATT: vgetexpph 2032(%ecx), %xmm6 |
| # INTEL: vgetexpph xmm6, xmmword ptr [ecx + 2032] |
| 0x62,0xf6,0x7d,0x08,0x42,0x71,0x7f |
| |
| # ATT: vgetexpph -256(%edx){1to8}, %xmm6 {%k7} {z} |
| # INTEL: vgetexpph xmm6 {k7} {z}, word ptr [edx - 256]{1to8} |
| 0x62,0xf6,0x7d,0x9f,0x42,0x72,0x80 |
| |
| # ATT: vgetexpph 268435456(%esp,%esi,8), %ymm6 {%k7} |
| # INTEL: vgetexpph ymm6 {k7}, ymmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf6,0x7d,0x2f,0x42,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vgetexpph (%ecx){1to16}, %ymm6 |
| # INTEL: vgetexpph ymm6, word ptr [ecx]{1to16} |
| 0x62,0xf6,0x7d,0x38,0x42,0x31 |
| |
| # ATT: vgetexpph 4064(%ecx), %ymm6 |
| # INTEL: vgetexpph ymm6, ymmword ptr [ecx + 4064] |
| 0x62,0xf6,0x7d,0x28,0x42,0x71,0x7f |
| |
| # ATT: vgetexpph -256(%edx){1to16}, %ymm6 {%k7} {z} |
| # INTEL: vgetexpph ymm6 {k7} {z}, word ptr [edx - 256]{1to16} |
| 0x62,0xf6,0x7d,0xbf,0x42,0x72,0x80 |
| |
| # ATT: vgetmantph $123, %ymm5, %ymm6 |
| # INTEL: vgetmantph ymm6, ymm5, 123 |
| 0x62,0xf3,0x7c,0x28,0x26,0xf5,0x7b |
| |
| # ATT: vgetmantph $123, %xmm5, %xmm6 |
| # INTEL: vgetmantph xmm6, xmm5, 123 |
| 0x62,0xf3,0x7c,0x08,0x26,0xf5,0x7b |
| |
| # ATT: vgetmantph $123, 268435456(%esp,%esi,8), %xmm6 {%k7} |
| # INTEL: vgetmantph xmm6 {k7}, xmmword ptr [esp + 8*esi + 268435456], 123 |
| 0x62,0xf3,0x7c,0x0f,0x26,0xb4,0xf4,0x00,0x00,0x00,0x10,0x7b |
| |
| # ATT: vgetmantph $123, (%ecx){1to8}, %xmm6 |
| # INTEL: vgetmantph xmm6, word ptr [ecx]{1to8}, 123 |
| 0x62,0xf3,0x7c,0x18,0x26,0x31,0x7b |
| |
| # ATT: vgetmantph $123, 2032(%ecx), %xmm6 |
| # INTEL: vgetmantph xmm6, xmmword ptr [ecx + 2032], 123 |
| 0x62,0xf3,0x7c,0x08,0x26,0x71,0x7f,0x7b |
| |
| # ATT: vgetmantph $123, -256(%edx){1to8}, %xmm6 {%k7} {z} |
| # INTEL: vgetmantph xmm6 {k7} {z}, word ptr [edx - 256]{1to8}, 123 |
| 0x62,0xf3,0x7c,0x9f,0x26,0x72,0x80,0x7b |
| |
| # ATT: vgetmantph $123, 268435456(%esp,%esi,8), %ymm6 {%k7} |
| # INTEL: vgetmantph ymm6 {k7}, ymmword ptr [esp + 8*esi + 268435456], 123 |
| 0x62,0xf3,0x7c,0x2f,0x26,0xb4,0xf4,0x00,0x00,0x00,0x10,0x7b |
| |
| # ATT: vgetmantph $123, (%ecx){1to16}, %ymm6 |
| # INTEL: vgetmantph ymm6, word ptr [ecx]{1to16}, 123 |
| 0x62,0xf3,0x7c,0x38,0x26,0x31,0x7b |
| |
| # ATT: vgetmantph $123, 4064(%ecx), %ymm6 |
| # INTEL: vgetmantph ymm6, ymmword ptr [ecx + 4064], 123 |
| 0x62,0xf3,0x7c,0x28,0x26,0x71,0x7f,0x7b |
| |
| # ATT: vgetmantph $123, -256(%edx){1to16}, %ymm6 {%k7} {z} |
| # INTEL: vgetmantph ymm6 {k7} {z}, word ptr [edx - 256]{1to16}, 123 |
| 0x62,0xf3,0x7c,0xbf,0x26,0x72,0x80,0x7b |
| |
| # ATT: vrcpph %xmm5, %xmm6 |
| # INTEL: vrcpph xmm6, xmm5 |
| 0x62,0xf6,0x7d,0x08,0x4c,0xf5 |
| |
| # ATT: vrcpph %ymm5, %ymm6 |
| # INTEL: vrcpph ymm6, ymm5 |
| 0x62,0xf6,0x7d,0x28,0x4c,0xf5 |
| |
| # ATT: vrcpph 268435456(%esp,%esi,8), %xmm6 {%k7} |
| # INTEL: vrcpph xmm6 {k7}, xmmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf6,0x7d,0x0f,0x4c,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vrcpph (%ecx){1to8}, %xmm6 |
| # INTEL: vrcpph xmm6, word ptr [ecx]{1to8} |
| 0x62,0xf6,0x7d,0x18,0x4c,0x31 |
| |
| # ATT: vrcpph 2032(%ecx), %xmm6 |
| # INTEL: vrcpph xmm6, xmmword ptr [ecx + 2032] |
| 0x62,0xf6,0x7d,0x08,0x4c,0x71,0x7f |
| |
| # ATT: vrcpph -256(%edx){1to8}, %xmm6 {%k7} {z} |
| # INTEL: vrcpph xmm6 {k7} {z}, word ptr [edx - 256]{1to8} |
| 0x62,0xf6,0x7d,0x9f,0x4c,0x72,0x80 |
| |
| # ATT: vrcpph 268435456(%esp,%esi,8), %ymm6 {%k7} |
| # INTEL: vrcpph ymm6 {k7}, ymmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf6,0x7d,0x2f,0x4c,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vrcpph (%ecx){1to16}, %ymm6 |
| # INTEL: vrcpph ymm6, word ptr [ecx]{1to16} |
| 0x62,0xf6,0x7d,0x38,0x4c,0x31 |
| |
| # ATT: vrcpph 4064(%ecx), %ymm6 |
| # INTEL: vrcpph ymm6, ymmword ptr [ecx + 4064] |
| 0x62,0xf6,0x7d,0x28,0x4c,0x71,0x7f |
| |
| # ATT: vrcpph -256(%edx){1to16}, %ymm6 {%k7} {z} |
| # INTEL: vrcpph ymm6 {k7} {z}, word ptr [edx - 256]{1to16} |
| 0x62,0xf6,0x7d,0xbf,0x4c,0x72,0x80 |
| |
| # ATT: vreduceph $123, %ymm5, %ymm6 |
| # INTEL: vreduceph ymm6, ymm5, 123 |
| 0x62,0xf3,0x7c,0x28,0x56,0xf5,0x7b |
| |
| # ATT: vreduceph $123, %xmm5, %xmm6 |
| # INTEL: vreduceph xmm6, xmm5, 123 |
| 0x62,0xf3,0x7c,0x08,0x56,0xf5,0x7b |
| |
| # ATT: vreduceph $123, 268435456(%esp,%esi,8), %xmm6 {%k7} |
| # INTEL: vreduceph xmm6 {k7}, xmmword ptr [esp + 8*esi + 268435456], 123 |
| 0x62,0xf3,0x7c,0x0f,0x56,0xb4,0xf4,0x00,0x00,0x00,0x10,0x7b |
| |
| # ATT: vreduceph $123, (%ecx){1to8}, %xmm6 |
| # INTEL: vreduceph xmm6, word ptr [ecx]{1to8}, 123 |
| 0x62,0xf3,0x7c,0x18,0x56,0x31,0x7b |
| |
| # ATT: vreduceph $123, 2032(%ecx), %xmm6 |
| # INTEL: vreduceph xmm6, xmmword ptr [ecx + 2032], 123 |
| 0x62,0xf3,0x7c,0x08,0x56,0x71,0x7f,0x7b |
| |
| # ATT: vreduceph $123, -256(%edx){1to8}, %xmm6 {%k7} {z} |
| # INTEL: vreduceph xmm6 {k7} {z}, word ptr [edx - 256]{1to8}, 123 |
| 0x62,0xf3,0x7c,0x9f,0x56,0x72,0x80,0x7b |
| |
| # ATT: vreduceph $123, 268435456(%esp,%esi,8), %ymm6 {%k7} |
| # INTEL: vreduceph ymm6 {k7}, ymmword ptr [esp + 8*esi + 268435456], 123 |
| 0x62,0xf3,0x7c,0x2f,0x56,0xb4,0xf4,0x00,0x00,0x00,0x10,0x7b |
| |
| # ATT: vreduceph $123, (%ecx){1to16}, %ymm6 |
| # INTEL: vreduceph ymm6, word ptr [ecx]{1to16}, 123 |
| 0x62,0xf3,0x7c,0x38,0x56,0x31,0x7b |
| |
| # ATT: vreduceph $123, 4064(%ecx), %ymm6 |
| # INTEL: vreduceph ymm6, ymmword ptr [ecx + 4064], 123 |
| 0x62,0xf3,0x7c,0x28,0x56,0x71,0x7f,0x7b |
| |
| # ATT: vreduceph $123, -256(%edx){1to16}, %ymm6 {%k7} {z} |
| # INTEL: vreduceph ymm6 {k7} {z}, word ptr [edx - 256]{1to16}, 123 |
| 0x62,0xf3,0x7c,0xbf,0x56,0x72,0x80,0x7b |
| |
| # ATT: vrndscaleph $123, %ymm5, %ymm6 |
| # INTEL: vrndscaleph ymm6, ymm5, 123 |
| 0x62,0xf3,0x7c,0x28,0x08,0xf5,0x7b |
| |
| # ATT: vrndscaleph $123, %xmm5, %xmm6 |
| # INTEL: vrndscaleph xmm6, xmm5, 123 |
| 0x62,0xf3,0x7c,0x08,0x08,0xf5,0x7b |
| |
| # ATT: vrndscaleph $123, 268435456(%esp,%esi,8), %xmm6 {%k7} |
| # INTEL: vrndscaleph xmm6 {k7}, xmmword ptr [esp + 8*esi + 268435456], 123 |
| 0x62,0xf3,0x7c,0x0f,0x08,0xb4,0xf4,0x00,0x00,0x00,0x10,0x7b |
| |
| # ATT: vrndscaleph $123, (%ecx){1to8}, %xmm6 |
| # INTEL: vrndscaleph xmm6, word ptr [ecx]{1to8}, 123 |
| 0x62,0xf3,0x7c,0x18,0x08,0x31,0x7b |
| |
| # ATT: vrndscaleph $123, 2032(%ecx), %xmm6 |
| # INTEL: vrndscaleph xmm6, xmmword ptr [ecx + 2032], 123 |
| 0x62,0xf3,0x7c,0x08,0x08,0x71,0x7f,0x7b |
| |
| # ATT: vrndscaleph $123, -256(%edx){1to8}, %xmm6 {%k7} {z} |
| # INTEL: vrndscaleph xmm6 {k7} {z}, word ptr [edx - 256]{1to8}, 123 |
| 0x62,0xf3,0x7c,0x9f,0x08,0x72,0x80,0x7b |
| |
| # ATT: vrndscaleph $123, 268435456(%esp,%esi,8), %ymm6 {%k7} |
| # INTEL: vrndscaleph ymm6 {k7}, ymmword ptr [esp + 8*esi + 268435456], 123 |
| 0x62,0xf3,0x7c,0x2f,0x08,0xb4,0xf4,0x00,0x00,0x00,0x10,0x7b |
| |
| # ATT: vrndscaleph $123, (%ecx){1to16}, %ymm6 |
| # INTEL: vrndscaleph ymm6, word ptr [ecx]{1to16}, 123 |
| 0x62,0xf3,0x7c,0x38,0x08,0x31,0x7b |
| |
| # ATT: vrndscaleph $123, 4064(%ecx), %ymm6 |
| # INTEL: vrndscaleph ymm6, ymmword ptr [ecx + 4064], 123 |
| 0x62,0xf3,0x7c,0x28,0x08,0x71,0x7f,0x7b |
| |
| # ATT: vrndscaleph $123, -256(%edx){1to16}, %ymm6 {%k7} {z} |
| # INTEL: vrndscaleph ymm6 {k7} {z}, word ptr [edx - 256]{1to16}, 123 |
| 0x62,0xf3,0x7c,0xbf,0x08,0x72,0x80,0x7b |
| |
| # ATT: vrsqrtph %xmm5, %xmm6 |
| # INTEL: vrsqrtph xmm6, xmm5 |
| 0x62,0xf6,0x7d,0x08,0x4e,0xf5 |
| |
| # ATT: vrsqrtph %ymm5, %ymm6 |
| # INTEL: vrsqrtph ymm6, ymm5 |
| 0x62,0xf6,0x7d,0x28,0x4e,0xf5 |
| |
| # ATT: vrsqrtph 268435456(%esp,%esi,8), %xmm6 {%k7} |
| # INTEL: vrsqrtph xmm6 {k7}, xmmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf6,0x7d,0x0f,0x4e,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vrsqrtph (%ecx){1to8}, %xmm6 |
| # INTEL: vrsqrtph xmm6, word ptr [ecx]{1to8} |
| 0x62,0xf6,0x7d,0x18,0x4e,0x31 |
| |
| # ATT: vrsqrtph 2032(%ecx), %xmm6 |
| # INTEL: vrsqrtph xmm6, xmmword ptr [ecx + 2032] |
| 0x62,0xf6,0x7d,0x08,0x4e,0x71,0x7f |
| |
| # ATT: vrsqrtph -256(%edx){1to8}, %xmm6 {%k7} {z} |
| # INTEL: vrsqrtph xmm6 {k7} {z}, word ptr [edx - 256]{1to8} |
| 0x62,0xf6,0x7d,0x9f,0x4e,0x72,0x80 |
| |
| # ATT: vrsqrtph 268435456(%esp,%esi,8), %ymm6 {%k7} |
| # INTEL: vrsqrtph ymm6 {k7}, ymmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf6,0x7d,0x2f,0x4e,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vrsqrtph (%ecx){1to16}, %ymm6 |
| # INTEL: vrsqrtph ymm6, word ptr [ecx]{1to16} |
| 0x62,0xf6,0x7d,0x38,0x4e,0x31 |
| |
| # ATT: vrsqrtph 4064(%ecx), %ymm6 |
| # INTEL: vrsqrtph ymm6, ymmword ptr [ecx + 4064] |
| 0x62,0xf6,0x7d,0x28,0x4e,0x71,0x7f |
| |
| # ATT: vrsqrtph -256(%edx){1to16}, %ymm6 {%k7} {z} |
| # INTEL: vrsqrtph ymm6 {k7} {z}, word ptr [edx - 256]{1to16} |
| 0x62,0xf6,0x7d,0xbf,0x4e,0x72,0x80 |
| |
| # ATT: vscalefph %ymm4, %ymm5, %ymm6 |
| # INTEL: vscalefph ymm6, ymm5, ymm4 |
| 0x62,0xf6,0x55,0x28,0x2c,0xf4 |
| |
| # ATT: vscalefph %xmm4, %xmm5, %xmm6 |
| # INTEL: vscalefph xmm6, xmm5, xmm4 |
| 0x62,0xf6,0x55,0x08,0x2c,0xf4 |
| |
| # ATT: vscalefph 268435456(%esp,%esi,8), %ymm5, %ymm6 {%k7} |
| # INTEL: vscalefph ymm6 {k7}, ymm5, ymmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf6,0x55,0x2f,0x2c,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vscalefph (%ecx){1to16}, %ymm5, %ymm6 |
| # INTEL: vscalefph ymm6, ymm5, word ptr [ecx]{1to16} |
| 0x62,0xf6,0x55,0x38,0x2c,0x31 |
| |
| # ATT: vscalefph 4064(%ecx), %ymm5, %ymm6 |
| # INTEL: vscalefph ymm6, ymm5, ymmword ptr [ecx + 4064] |
| 0x62,0xf6,0x55,0x28,0x2c,0x71,0x7f |
| |
| # ATT: vscalefph -256(%edx){1to16}, %ymm5, %ymm6 {%k7} {z} |
| # INTEL: vscalefph ymm6 {k7} {z}, ymm5, word ptr [edx - 256]{1to16} |
| 0x62,0xf6,0x55,0xbf,0x2c,0x72,0x80 |
| |
| # ATT: vscalefph 268435456(%esp,%esi,8), %xmm5, %xmm6 {%k7} |
| # INTEL: vscalefph xmm6 {k7}, xmm5, xmmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf6,0x55,0x0f,0x2c,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vscalefph (%ecx){1to8}, %xmm5, %xmm6 |
| # INTEL: vscalefph xmm6, xmm5, word ptr [ecx]{1to8} |
| 0x62,0xf6,0x55,0x18,0x2c,0x31 |
| |
| # ATT: vscalefph 2032(%ecx), %xmm5, %xmm6 |
| # INTEL: vscalefph xmm6, xmm5, xmmword ptr [ecx + 2032] |
| 0x62,0xf6,0x55,0x08,0x2c,0x71,0x7f |
| |
| # ATT: vscalefph -256(%edx){1to8}, %xmm5, %xmm6 {%k7} {z} |
| # INTEL: vscalefph xmm6 {k7} {z}, xmm5, word ptr [edx - 256]{1to8} |
| 0x62,0xf6,0x55,0x9f,0x2c,0x72,0x80 |
| |
| # ATT: vsqrtph %xmm5, %xmm6 |
| # INTEL: vsqrtph xmm6, xmm5 |
| 0x62,0xf5,0x7c,0x08,0x51,0xf5 |
| |
| # ATT: vsqrtph %ymm5, %ymm6 |
| # INTEL: vsqrtph ymm6, ymm5 |
| 0x62,0xf5,0x7c,0x28,0x51,0xf5 |
| |
| # ATT: vsqrtph 268435456(%esp,%esi,8), %xmm6 {%k7} |
| # INTEL: vsqrtph xmm6 {k7}, xmmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf5,0x7c,0x0f,0x51,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vsqrtph (%ecx){1to8}, %xmm6 |
| # INTEL: vsqrtph xmm6, word ptr [ecx]{1to8} |
| 0x62,0xf5,0x7c,0x18,0x51,0x31 |
| |
| # ATT: vsqrtph 2032(%ecx), %xmm6 |
| # INTEL: vsqrtph xmm6, xmmword ptr [ecx + 2032] |
| 0x62,0xf5,0x7c,0x08,0x51,0x71,0x7f |
| |
| # ATT: vsqrtph -256(%edx){1to8}, %xmm6 {%k7} {z} |
| # INTEL: vsqrtph xmm6 {k7} {z}, word ptr [edx - 256]{1to8} |
| 0x62,0xf5,0x7c,0x9f,0x51,0x72,0x80 |
| |
| # ATT: vsqrtph 268435456(%esp,%esi,8), %ymm6 {%k7} |
| # INTEL: vsqrtph ymm6 {k7}, ymmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf5,0x7c,0x2f,0x51,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vsqrtph (%ecx){1to16}, %ymm6 |
| # INTEL: vsqrtph ymm6, word ptr [ecx]{1to16} |
| 0x62,0xf5,0x7c,0x38,0x51,0x31 |
| |
| # ATT: vsqrtph 4064(%ecx), %ymm6 |
| # INTEL: vsqrtph ymm6, ymmword ptr [ecx + 4064] |
| 0x62,0xf5,0x7c,0x28,0x51,0x71,0x7f |
| |
| # ATT: vsqrtph -256(%edx){1to16}, %ymm6 {%k7} {z} |
| # INTEL: vsqrtph ymm6 {k7} {z}, word ptr [edx - 256]{1to16} |
| 0x62,0xf5,0x7c,0xbf,0x51,0x72,0x80 |
| |
| # ATT: vfmadd132ph %ymm4, %ymm5, %ymm6 |
| # INTEL: vfmadd132ph ymm6, ymm5, ymm4 |
| 0x62,0xf6,0x55,0x28,0x98,0xf4 |
| |
| # ATT: vfmadd132ph %xmm4, %xmm5, %xmm6 |
| # INTEL: vfmadd132ph xmm6, xmm5, xmm4 |
| 0x62,0xf6,0x55,0x08,0x98,0xf4 |
| |
| # ATT: vfmadd132ph 268435456(%esp,%esi,8), %ymm5, %ymm6 {%k7} |
| # INTEL: vfmadd132ph ymm6 {k7}, ymm5, ymmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf6,0x55,0x2f,0x98,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vfmadd132ph (%ecx){1to16}, %ymm5, %ymm6 |
| # INTEL: vfmadd132ph ymm6, ymm5, word ptr [ecx]{1to16} |
| 0x62,0xf6,0x55,0x38,0x98,0x31 |
| |
| # ATT: vfmadd132ph 4064(%ecx), %ymm5, %ymm6 |
| # INTEL: vfmadd132ph ymm6, ymm5, ymmword ptr [ecx + 4064] |
| 0x62,0xf6,0x55,0x28,0x98,0x71,0x7f |
| |
| # ATT: vfmadd132ph -256(%edx){1to16}, %ymm5, %ymm6 {%k7} {z} |
| # INTEL: vfmadd132ph ymm6 {k7} {z}, ymm5, word ptr [edx - 256]{1to16} |
| 0x62,0xf6,0x55,0xbf,0x98,0x72,0x80 |
| |
| # ATT: vfmadd132ph 268435456(%esp,%esi,8), %xmm5, %xmm6 {%k7} |
| # INTEL: vfmadd132ph xmm6 {k7}, xmm5, xmmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf6,0x55,0x0f,0x98,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vfmadd132ph (%ecx){1to8}, %xmm5, %xmm6 |
| # INTEL: vfmadd132ph xmm6, xmm5, word ptr [ecx]{1to8} |
| 0x62,0xf6,0x55,0x18,0x98,0x31 |
| |
| # ATT: vfmadd132ph 2032(%ecx), %xmm5, %xmm6 |
| # INTEL: vfmadd132ph xmm6, xmm5, xmmword ptr [ecx + 2032] |
| 0x62,0xf6,0x55,0x08,0x98,0x71,0x7f |
| |
| # ATT: vfmadd132ph -256(%edx){1to8}, %xmm5, %xmm6 {%k7} {z} |
| # INTEL: vfmadd132ph xmm6 {k7} {z}, xmm5, word ptr [edx - 256]{1to8} |
| 0x62,0xf6,0x55,0x9f,0x98,0x72,0x80 |
| |
| # ATT: vfmadd213ph %ymm4, %ymm5, %ymm6 |
| # INTEL: vfmadd213ph ymm6, ymm5, ymm4 |
| 0x62,0xf6,0x55,0x28,0xa8,0xf4 |
| |
| # ATT: vfmadd213ph %xmm4, %xmm5, %xmm6 |
| # INTEL: vfmadd213ph xmm6, xmm5, xmm4 |
| 0x62,0xf6,0x55,0x08,0xa8,0xf4 |
| |
| # ATT: vfmadd213ph 268435456(%esp,%esi,8), %ymm5, %ymm6 {%k7} |
| # INTEL: vfmadd213ph ymm6 {k7}, ymm5, ymmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf6,0x55,0x2f,0xa8,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vfmadd213ph (%ecx){1to16}, %ymm5, %ymm6 |
| # INTEL: vfmadd213ph ymm6, ymm5, word ptr [ecx]{1to16} |
| 0x62,0xf6,0x55,0x38,0xa8,0x31 |
| |
| # ATT: vfmadd213ph 4064(%ecx), %ymm5, %ymm6 |
| # INTEL: vfmadd213ph ymm6, ymm5, ymmword ptr [ecx + 4064] |
| 0x62,0xf6,0x55,0x28,0xa8,0x71,0x7f |
| |
| # ATT: vfmadd213ph -256(%edx){1to16}, %ymm5, %ymm6 {%k7} {z} |
| # INTEL: vfmadd213ph ymm6 {k7} {z}, ymm5, word ptr [edx - 256]{1to16} |
| 0x62,0xf6,0x55,0xbf,0xa8,0x72,0x80 |
| |
| # ATT: vfmadd213ph 268435456(%esp,%esi,8), %xmm5, %xmm6 {%k7} |
| # INTEL: vfmadd213ph xmm6 {k7}, xmm5, xmmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf6,0x55,0x0f,0xa8,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vfmadd213ph (%ecx){1to8}, %xmm5, %xmm6 |
| # INTEL: vfmadd213ph xmm6, xmm5, word ptr [ecx]{1to8} |
| 0x62,0xf6,0x55,0x18,0xa8,0x31 |
| |
| # ATT: vfmadd213ph 2032(%ecx), %xmm5, %xmm6 |
| # INTEL: vfmadd213ph xmm6, xmm5, xmmword ptr [ecx + 2032] |
| 0x62,0xf6,0x55,0x08,0xa8,0x71,0x7f |
| |
| # ATT: vfmadd213ph -256(%edx){1to8}, %xmm5, %xmm6 {%k7} {z} |
| # INTEL: vfmadd213ph xmm6 {k7} {z}, xmm5, word ptr [edx - 256]{1to8} |
| 0x62,0xf6,0x55,0x9f,0xa8,0x72,0x80 |
| |
| # ATT: vfmadd231ph %ymm4, %ymm5, %ymm6 |
| # INTEL: vfmadd231ph ymm6, ymm5, ymm4 |
| 0x62,0xf6,0x55,0x28,0xb8,0xf4 |
| |
| # ATT: vfmadd231ph %xmm4, %xmm5, %xmm6 |
| # INTEL: vfmadd231ph xmm6, xmm5, xmm4 |
| 0x62,0xf6,0x55,0x08,0xb8,0xf4 |
| |
| # ATT: vfmadd231ph 268435456(%esp,%esi,8), %ymm5, %ymm6 {%k7} |
| # INTEL: vfmadd231ph ymm6 {k7}, ymm5, ymmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf6,0x55,0x2f,0xb8,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vfmadd231ph (%ecx){1to16}, %ymm5, %ymm6 |
| # INTEL: vfmadd231ph ymm6, ymm5, word ptr [ecx]{1to16} |
| 0x62,0xf6,0x55,0x38,0xb8,0x31 |
| |
| # ATT: vfmadd231ph 4064(%ecx), %ymm5, %ymm6 |
| # INTEL: vfmadd231ph ymm6, ymm5, ymmword ptr [ecx + 4064] |
| 0x62,0xf6,0x55,0x28,0xb8,0x71,0x7f |
| |
| # ATT: vfmadd231ph -256(%edx){1to16}, %ymm5, %ymm6 {%k7} {z} |
| # INTEL: vfmadd231ph ymm6 {k7} {z}, ymm5, word ptr [edx - 256]{1to16} |
| 0x62,0xf6,0x55,0xbf,0xb8,0x72,0x80 |
| |
| # ATT: vfmadd231ph 268435456(%esp,%esi,8), %xmm5, %xmm6 {%k7} |
| # INTEL: vfmadd231ph xmm6 {k7}, xmm5, xmmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf6,0x55,0x0f,0xb8,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vfmadd231ph (%ecx){1to8}, %xmm5, %xmm6 |
| # INTEL: vfmadd231ph xmm6, xmm5, word ptr [ecx]{1to8} |
| 0x62,0xf6,0x55,0x18,0xb8,0x31 |
| |
| # ATT: vfmadd231ph 2032(%ecx), %xmm5, %xmm6 |
| # INTEL: vfmadd231ph xmm6, xmm5, xmmword ptr [ecx + 2032] |
| 0x62,0xf6,0x55,0x08,0xb8,0x71,0x7f |
| |
| # ATT: vfmadd231ph -256(%edx){1to8}, %xmm5, %xmm6 {%k7} {z} |
| # INTEL: vfmadd231ph xmm6 {k7} {z}, xmm5, word ptr [edx - 256]{1to8} |
| 0x62,0xf6,0x55,0x9f,0xb8,0x72,0x80 |
| |
| # ATT: vfmaddsub132ph %ymm4, %ymm5, %ymm6 |
| # INTEL: vfmaddsub132ph ymm6, ymm5, ymm4 |
| 0x62,0xf6,0x55,0x28,0x96,0xf4 |
| |
| # ATT: vfmaddsub132ph %xmm4, %xmm5, %xmm6 |
| # INTEL: vfmaddsub132ph xmm6, xmm5, xmm4 |
| 0x62,0xf6,0x55,0x08,0x96,0xf4 |
| |
| # ATT: vfmaddsub132ph 268435456(%esp,%esi,8), %ymm5, %ymm6 {%k7} |
| # INTEL: vfmaddsub132ph ymm6 {k7}, ymm5, ymmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf6,0x55,0x2f,0x96,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vfmaddsub132ph (%ecx){1to16}, %ymm5, %ymm6 |
| # INTEL: vfmaddsub132ph ymm6, ymm5, word ptr [ecx]{1to16} |
| 0x62,0xf6,0x55,0x38,0x96,0x31 |
| |
| # ATT: vfmaddsub132ph 4064(%ecx), %ymm5, %ymm6 |
| # INTEL: vfmaddsub132ph ymm6, ymm5, ymmword ptr [ecx + 4064] |
| 0x62,0xf6,0x55,0x28,0x96,0x71,0x7f |
| |
| # ATT: vfmaddsub132ph -256(%edx){1to16}, %ymm5, %ymm6 {%k7} {z} |
| # INTEL: vfmaddsub132ph ymm6 {k7} {z}, ymm5, word ptr [edx - 256]{1to16} |
| 0x62,0xf6,0x55,0xbf,0x96,0x72,0x80 |
| |
| # ATT: vfmaddsub132ph 268435456(%esp,%esi,8), %xmm5, %xmm6 {%k7} |
| # INTEL: vfmaddsub132ph xmm6 {k7}, xmm5, xmmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf6,0x55,0x0f,0x96,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vfmaddsub132ph (%ecx){1to8}, %xmm5, %xmm6 |
| # INTEL: vfmaddsub132ph xmm6, xmm5, word ptr [ecx]{1to8} |
| 0x62,0xf6,0x55,0x18,0x96,0x31 |
| |
| # ATT: vfmaddsub132ph 2032(%ecx), %xmm5, %xmm6 |
| # INTEL: vfmaddsub132ph xmm6, xmm5, xmmword ptr [ecx + 2032] |
| 0x62,0xf6,0x55,0x08,0x96,0x71,0x7f |
| |
| # ATT: vfmaddsub132ph -256(%edx){1to8}, %xmm5, %xmm6 {%k7} {z} |
| # INTEL: vfmaddsub132ph xmm6 {k7} {z}, xmm5, word ptr [edx - 256]{1to8} |
| 0x62,0xf6,0x55,0x9f,0x96,0x72,0x80 |
| |
| # ATT: vfmaddsub213ph %ymm4, %ymm5, %ymm6 |
| # INTEL: vfmaddsub213ph ymm6, ymm5, ymm4 |
| 0x62,0xf6,0x55,0x28,0xa6,0xf4 |
| |
| # ATT: vfmaddsub213ph %xmm4, %xmm5, %xmm6 |
| # INTEL: vfmaddsub213ph xmm6, xmm5, xmm4 |
| 0x62,0xf6,0x55,0x08,0xa6,0xf4 |
| |
| # ATT: vfmaddsub213ph 268435456(%esp,%esi,8), %ymm5, %ymm6 {%k7} |
| # INTEL: vfmaddsub213ph ymm6 {k7}, ymm5, ymmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf6,0x55,0x2f,0xa6,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vfmaddsub213ph (%ecx){1to16}, %ymm5, %ymm6 |
| # INTEL: vfmaddsub213ph ymm6, ymm5, word ptr [ecx]{1to16} |
| 0x62,0xf6,0x55,0x38,0xa6,0x31 |
| |
| # ATT: vfmaddsub213ph 4064(%ecx), %ymm5, %ymm6 |
| # INTEL: vfmaddsub213ph ymm6, ymm5, ymmword ptr [ecx + 4064] |
| 0x62,0xf6,0x55,0x28,0xa6,0x71,0x7f |
| |
| # ATT: vfmaddsub213ph -256(%edx){1to16}, %ymm5, %ymm6 {%k7} {z} |
| # INTEL: vfmaddsub213ph ymm6 {k7} {z}, ymm5, word ptr [edx - 256]{1to16} |
| 0x62,0xf6,0x55,0xbf,0xa6,0x72,0x80 |
| |
| # ATT: vfmaddsub213ph 268435456(%esp,%esi,8), %xmm5, %xmm6 {%k7} |
| # INTEL: vfmaddsub213ph xmm6 {k7}, xmm5, xmmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf6,0x55,0x0f,0xa6,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vfmaddsub213ph (%ecx){1to8}, %xmm5, %xmm6 |
| # INTEL: vfmaddsub213ph xmm6, xmm5, word ptr [ecx]{1to8} |
| 0x62,0xf6,0x55,0x18,0xa6,0x31 |
| |
| # ATT: vfmaddsub213ph 2032(%ecx), %xmm5, %xmm6 |
| # INTEL: vfmaddsub213ph xmm6, xmm5, xmmword ptr [ecx + 2032] |
| 0x62,0xf6,0x55,0x08,0xa6,0x71,0x7f |
| |
| # ATT: vfmaddsub213ph -256(%edx){1to8}, %xmm5, %xmm6 {%k7} {z} |
| # INTEL: vfmaddsub213ph xmm6 {k7} {z}, xmm5, word ptr [edx - 256]{1to8} |
| 0x62,0xf6,0x55,0x9f,0xa6,0x72,0x80 |
| |
| # ATT: vfmaddsub231ph %ymm4, %ymm5, %ymm6 |
| # INTEL: vfmaddsub231ph ymm6, ymm5, ymm4 |
| 0x62,0xf6,0x55,0x28,0xb6,0xf4 |
| |
| # ATT: vfmaddsub231ph %xmm4, %xmm5, %xmm6 |
| # INTEL: vfmaddsub231ph xmm6, xmm5, xmm4 |
| 0x62,0xf6,0x55,0x08,0xb6,0xf4 |
| |
| # ATT: vfmaddsub231ph 268435456(%esp,%esi,8), %ymm5, %ymm6 {%k7} |
| # INTEL: vfmaddsub231ph ymm6 {k7}, ymm5, ymmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf6,0x55,0x2f,0xb6,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vfmaddsub231ph (%ecx){1to16}, %ymm5, %ymm6 |
| # INTEL: vfmaddsub231ph ymm6, ymm5, word ptr [ecx]{1to16} |
| 0x62,0xf6,0x55,0x38,0xb6,0x31 |
| |
| # ATT: vfmaddsub231ph 4064(%ecx), %ymm5, %ymm6 |
| # INTEL: vfmaddsub231ph ymm6, ymm5, ymmword ptr [ecx + 4064] |
| 0x62,0xf6,0x55,0x28,0xb6,0x71,0x7f |
| |
| # ATT: vfmaddsub231ph -256(%edx){1to16}, %ymm5, %ymm6 {%k7} {z} |
| # INTEL: vfmaddsub231ph ymm6 {k7} {z}, ymm5, word ptr [edx - 256]{1to16} |
| 0x62,0xf6,0x55,0xbf,0xb6,0x72,0x80 |
| |
| # ATT: vfmaddsub231ph 268435456(%esp,%esi,8), %xmm5, %xmm6 {%k7} |
| # INTEL: vfmaddsub231ph xmm6 {k7}, xmm5, xmmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf6,0x55,0x0f,0xb6,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vfmaddsub231ph (%ecx){1to8}, %xmm5, %xmm6 |
| # INTEL: vfmaddsub231ph xmm6, xmm5, word ptr [ecx]{1to8} |
| 0x62,0xf6,0x55,0x18,0xb6,0x31 |
| |
| # ATT: vfmaddsub231ph 2032(%ecx), %xmm5, %xmm6 |
| # INTEL: vfmaddsub231ph xmm6, xmm5, xmmword ptr [ecx + 2032] |
| 0x62,0xf6,0x55,0x08,0xb6,0x71,0x7f |
| |
| # ATT: vfmaddsub231ph -256(%edx){1to8}, %xmm5, %xmm6 {%k7} {z} |
| # INTEL: vfmaddsub231ph xmm6 {k7} {z}, xmm5, word ptr [edx - 256]{1to8} |
| 0x62,0xf6,0x55,0x9f,0xb6,0x72,0x80 |
| |
| # ATT: vfmsub132ph %ymm4, %ymm5, %ymm6 |
| # INTEL: vfmsub132ph ymm6, ymm5, ymm4 |
| 0x62,0xf6,0x55,0x28,0x9a,0xf4 |
| |
| # ATT: vfmsub132ph %xmm4, %xmm5, %xmm6 |
| # INTEL: vfmsub132ph xmm6, xmm5, xmm4 |
| 0x62,0xf6,0x55,0x08,0x9a,0xf4 |
| |
| # ATT: vfmsub132ph 268435456(%esp,%esi,8), %ymm5, %ymm6 {%k7} |
| # INTEL: vfmsub132ph ymm6 {k7}, ymm5, ymmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf6,0x55,0x2f,0x9a,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vfmsub132ph (%ecx){1to16}, %ymm5, %ymm6 |
| # INTEL: vfmsub132ph ymm6, ymm5, word ptr [ecx]{1to16} |
| 0x62,0xf6,0x55,0x38,0x9a,0x31 |
| |
| # ATT: vfmsub132ph 4064(%ecx), %ymm5, %ymm6 |
| # INTEL: vfmsub132ph ymm6, ymm5, ymmword ptr [ecx + 4064] |
| 0x62,0xf6,0x55,0x28,0x9a,0x71,0x7f |
| |
| # ATT: vfmsub132ph -256(%edx){1to16}, %ymm5, %ymm6 {%k7} {z} |
| # INTEL: vfmsub132ph ymm6 {k7} {z}, ymm5, word ptr [edx - 256]{1to16} |
| 0x62,0xf6,0x55,0xbf,0x9a,0x72,0x80 |
| |
| # ATT: vfmsub132ph 268435456(%esp,%esi,8), %xmm5, %xmm6 {%k7} |
| # INTEL: vfmsub132ph xmm6 {k7}, xmm5, xmmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf6,0x55,0x0f,0x9a,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vfmsub132ph (%ecx){1to8}, %xmm5, %xmm6 |
| # INTEL: vfmsub132ph xmm6, xmm5, word ptr [ecx]{1to8} |
| 0x62,0xf6,0x55,0x18,0x9a,0x31 |
| |
| # ATT: vfmsub132ph 2032(%ecx), %xmm5, %xmm6 |
| # INTEL: vfmsub132ph xmm6, xmm5, xmmword ptr [ecx + 2032] |
| 0x62,0xf6,0x55,0x08,0x9a,0x71,0x7f |
| |
| # ATT: vfmsub132ph -256(%edx){1to8}, %xmm5, %xmm6 {%k7} {z} |
| # INTEL: vfmsub132ph xmm6 {k7} {z}, xmm5, word ptr [edx - 256]{1to8} |
| 0x62,0xf6,0x55,0x9f,0x9a,0x72,0x80 |
| |
| # ATT: vfmsub213ph %ymm4, %ymm5, %ymm6 |
| # INTEL: vfmsub213ph ymm6, ymm5, ymm4 |
| 0x62,0xf6,0x55,0x28,0xaa,0xf4 |
| |
| # ATT: vfmsub213ph %xmm4, %xmm5, %xmm6 |
| # INTEL: vfmsub213ph xmm6, xmm5, xmm4 |
| 0x62,0xf6,0x55,0x08,0xaa,0xf4 |
| |
| # ATT: vfmsub213ph 268435456(%esp,%esi,8), %ymm5, %ymm6 {%k7} |
| # INTEL: vfmsub213ph ymm6 {k7}, ymm5, ymmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf6,0x55,0x2f,0xaa,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vfmsub213ph (%ecx){1to16}, %ymm5, %ymm6 |
| # INTEL: vfmsub213ph ymm6, ymm5, word ptr [ecx]{1to16} |
| 0x62,0xf6,0x55,0x38,0xaa,0x31 |
| |
| # ATT: vfmsub213ph 4064(%ecx), %ymm5, %ymm6 |
| # INTEL: vfmsub213ph ymm6, ymm5, ymmword ptr [ecx + 4064] |
| 0x62,0xf6,0x55,0x28,0xaa,0x71,0x7f |
| |
| # ATT: vfmsub213ph -256(%edx){1to16}, %ymm5, %ymm6 {%k7} {z} |
| # INTEL: vfmsub213ph ymm6 {k7} {z}, ymm5, word ptr [edx - 256]{1to16} |
| 0x62,0xf6,0x55,0xbf,0xaa,0x72,0x80 |
| |
| # ATT: vfmsub213ph 268435456(%esp,%esi,8), %xmm5, %xmm6 {%k7} |
| # INTEL: vfmsub213ph xmm6 {k7}, xmm5, xmmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf6,0x55,0x0f,0xaa,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vfmsub213ph (%ecx){1to8}, %xmm5, %xmm6 |
| # INTEL: vfmsub213ph xmm6, xmm5, word ptr [ecx]{1to8} |
| 0x62,0xf6,0x55,0x18,0xaa,0x31 |
| |
| # ATT: vfmsub213ph 2032(%ecx), %xmm5, %xmm6 |
| # INTEL: vfmsub213ph xmm6, xmm5, xmmword ptr [ecx + 2032] |
| 0x62,0xf6,0x55,0x08,0xaa,0x71,0x7f |
| |
| # ATT: vfmsub213ph -256(%edx){1to8}, %xmm5, %xmm6 {%k7} {z} |
| # INTEL: vfmsub213ph xmm6 {k7} {z}, xmm5, word ptr [edx - 256]{1to8} |
| 0x62,0xf6,0x55,0x9f,0xaa,0x72,0x80 |
| |
| # ATT: vfmsub231ph %ymm4, %ymm5, %ymm6 |
| # INTEL: vfmsub231ph ymm6, ymm5, ymm4 |
| 0x62,0xf6,0x55,0x28,0xba,0xf4 |
| |
| # ATT: vfmsub231ph %xmm4, %xmm5, %xmm6 |
| # INTEL: vfmsub231ph xmm6, xmm5, xmm4 |
| 0x62,0xf6,0x55,0x08,0xba,0xf4 |
| |
| # ATT: vfmsub231ph 268435456(%esp,%esi,8), %ymm5, %ymm6 {%k7} |
| # INTEL: vfmsub231ph ymm6 {k7}, ymm5, ymmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf6,0x55,0x2f,0xba,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vfmsub231ph (%ecx){1to16}, %ymm5, %ymm6 |
| # INTEL: vfmsub231ph ymm6, ymm5, word ptr [ecx]{1to16} |
| 0x62,0xf6,0x55,0x38,0xba,0x31 |
| |
| # ATT: vfmsub231ph 4064(%ecx), %ymm5, %ymm6 |
| # INTEL: vfmsub231ph ymm6, ymm5, ymmword ptr [ecx + 4064] |
| 0x62,0xf6,0x55,0x28,0xba,0x71,0x7f |
| |
| # ATT: vfmsub231ph -256(%edx){1to16}, %ymm5, %ymm6 {%k7} {z} |
| # INTEL: vfmsub231ph ymm6 {k7} {z}, ymm5, word ptr [edx - 256]{1to16} |
| 0x62,0xf6,0x55,0xbf,0xba,0x72,0x80 |
| |
| # ATT: vfmsub231ph 268435456(%esp,%esi,8), %xmm5, %xmm6 {%k7} |
| # INTEL: vfmsub231ph xmm6 {k7}, xmm5, xmmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf6,0x55,0x0f,0xba,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vfmsub231ph (%ecx){1to8}, %xmm5, %xmm6 |
| # INTEL: vfmsub231ph xmm6, xmm5, word ptr [ecx]{1to8} |
| 0x62,0xf6,0x55,0x18,0xba,0x31 |
| |
| # ATT: vfmsub231ph 2032(%ecx), %xmm5, %xmm6 |
| # INTEL: vfmsub231ph xmm6, xmm5, xmmword ptr [ecx + 2032] |
| 0x62,0xf6,0x55,0x08,0xba,0x71,0x7f |
| |
| # ATT: vfmsub231ph -256(%edx){1to8}, %xmm5, %xmm6 {%k7} {z} |
| # INTEL: vfmsub231ph xmm6 {k7} {z}, xmm5, word ptr [edx - 256]{1to8} |
| 0x62,0xf6,0x55,0x9f,0xba,0x72,0x80 |
| |
| # ATT: vfmsubadd132ph %ymm4, %ymm5, %ymm6 |
| # INTEL: vfmsubadd132ph ymm6, ymm5, ymm4 |
| 0x62,0xf6,0x55,0x28,0x97,0xf4 |
| |
| # ATT: vfmsubadd132ph %xmm4, %xmm5, %xmm6 |
| # INTEL: vfmsubadd132ph xmm6, xmm5, xmm4 |
| 0x62,0xf6,0x55,0x08,0x97,0xf4 |
| |
| # ATT: vfmsubadd132ph 268435456(%esp,%esi,8), %ymm5, %ymm6 {%k7} |
| # INTEL: vfmsubadd132ph ymm6 {k7}, ymm5, ymmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf6,0x55,0x2f,0x97,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vfmsubadd132ph (%ecx){1to16}, %ymm5, %ymm6 |
| # INTEL: vfmsubadd132ph ymm6, ymm5, word ptr [ecx]{1to16} |
| 0x62,0xf6,0x55,0x38,0x97,0x31 |
| |
| # ATT: vfmsubadd132ph 4064(%ecx), %ymm5, %ymm6 |
| # INTEL: vfmsubadd132ph ymm6, ymm5, ymmword ptr [ecx + 4064] |
| 0x62,0xf6,0x55,0x28,0x97,0x71,0x7f |
| |
| # ATT: vfmsubadd132ph -256(%edx){1to16}, %ymm5, %ymm6 {%k7} {z} |
| # INTEL: vfmsubadd132ph ymm6 {k7} {z}, ymm5, word ptr [edx - 256]{1to16} |
| 0x62,0xf6,0x55,0xbf,0x97,0x72,0x80 |
| |
| # ATT: vfmsubadd132ph 268435456(%esp,%esi,8), %xmm5, %xmm6 {%k7} |
| # INTEL: vfmsubadd132ph xmm6 {k7}, xmm5, xmmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf6,0x55,0x0f,0x97,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vfmsubadd132ph (%ecx){1to8}, %xmm5, %xmm6 |
| # INTEL: vfmsubadd132ph xmm6, xmm5, word ptr [ecx]{1to8} |
| 0x62,0xf6,0x55,0x18,0x97,0x31 |
| |
| # ATT: vfmsubadd132ph 2032(%ecx), %xmm5, %xmm6 |
| # INTEL: vfmsubadd132ph xmm6, xmm5, xmmword ptr [ecx + 2032] |
| 0x62,0xf6,0x55,0x08,0x97,0x71,0x7f |
| |
| # ATT: vfmsubadd132ph -256(%edx){1to8}, %xmm5, %xmm6 {%k7} {z} |
| # INTEL: vfmsubadd132ph xmm6 {k7} {z}, xmm5, word ptr [edx - 256]{1to8} |
| 0x62,0xf6,0x55,0x9f,0x97,0x72,0x80 |
| |
| # ATT: vfmsubadd213ph %ymm4, %ymm5, %ymm6 |
| # INTEL: vfmsubadd213ph ymm6, ymm5, ymm4 |
| 0x62,0xf6,0x55,0x28,0xa7,0xf4 |
| |
| # ATT: vfmsubadd213ph %xmm4, %xmm5, %xmm6 |
| # INTEL: vfmsubadd213ph xmm6, xmm5, xmm4 |
| 0x62,0xf6,0x55,0x08,0xa7,0xf4 |
| |
| # ATT: vfmsubadd213ph 268435456(%esp,%esi,8), %ymm5, %ymm6 {%k7} |
| # INTEL: vfmsubadd213ph ymm6 {k7}, ymm5, ymmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf6,0x55,0x2f,0xa7,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vfmsubadd213ph (%ecx){1to16}, %ymm5, %ymm6 |
| # INTEL: vfmsubadd213ph ymm6, ymm5, word ptr [ecx]{1to16} |
| 0x62,0xf6,0x55,0x38,0xa7,0x31 |
| |
| # ATT: vfmsubadd213ph 4064(%ecx), %ymm5, %ymm6 |
| # INTEL: vfmsubadd213ph ymm6, ymm5, ymmword ptr [ecx + 4064] |
| 0x62,0xf6,0x55,0x28,0xa7,0x71,0x7f |
| |
| # ATT: vfmsubadd213ph -256(%edx){1to16}, %ymm5, %ymm6 {%k7} {z} |
| # INTEL: vfmsubadd213ph ymm6 {k7} {z}, ymm5, word ptr [edx - 256]{1to16} |
| 0x62,0xf6,0x55,0xbf,0xa7,0x72,0x80 |
| |
| # ATT: vfmsubadd213ph 268435456(%esp,%esi,8), %xmm5, %xmm6 {%k7} |
| # INTEL: vfmsubadd213ph xmm6 {k7}, xmm5, xmmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf6,0x55,0x0f,0xa7,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vfmsubadd213ph (%ecx){1to8}, %xmm5, %xmm6 |
| # INTEL: vfmsubadd213ph xmm6, xmm5, word ptr [ecx]{1to8} |
| 0x62,0xf6,0x55,0x18,0xa7,0x31 |
| |
| # ATT: vfmsubadd213ph 2032(%ecx), %xmm5, %xmm6 |
| # INTEL: vfmsubadd213ph xmm6, xmm5, xmmword ptr [ecx + 2032] |
| 0x62,0xf6,0x55,0x08,0xa7,0x71,0x7f |
| |
| # ATT: vfmsubadd213ph -256(%edx){1to8}, %xmm5, %xmm6 {%k7} {z} |
| # INTEL: vfmsubadd213ph xmm6 {k7} {z}, xmm5, word ptr [edx - 256]{1to8} |
| 0x62,0xf6,0x55,0x9f,0xa7,0x72,0x80 |
| |
| # ATT: vfmsubadd231ph %ymm4, %ymm5, %ymm6 |
| # INTEL: vfmsubadd231ph ymm6, ymm5, ymm4 |
| 0x62,0xf6,0x55,0x28,0xb7,0xf4 |
| |
| # ATT: vfmsubadd231ph %xmm4, %xmm5, %xmm6 |
| # INTEL: vfmsubadd231ph xmm6, xmm5, xmm4 |
| 0x62,0xf6,0x55,0x08,0xb7,0xf4 |
| |
| # ATT: vfmsubadd231ph 268435456(%esp,%esi,8), %ymm5, %ymm6 {%k7} |
| # INTEL: vfmsubadd231ph ymm6 {k7}, ymm5, ymmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf6,0x55,0x2f,0xb7,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vfmsubadd231ph (%ecx){1to16}, %ymm5, %ymm6 |
| # INTEL: vfmsubadd231ph ymm6, ymm5, word ptr [ecx]{1to16} |
| 0x62,0xf6,0x55,0x38,0xb7,0x31 |
| |
| # ATT: vfmsubadd231ph 4064(%ecx), %ymm5, %ymm6 |
| # INTEL: vfmsubadd231ph ymm6, ymm5, ymmword ptr [ecx + 4064] |
| 0x62,0xf6,0x55,0x28,0xb7,0x71,0x7f |
| |
| # ATT: vfmsubadd231ph -256(%edx){1to16}, %ymm5, %ymm6 {%k7} {z} |
| # INTEL: vfmsubadd231ph ymm6 {k7} {z}, ymm5, word ptr [edx - 256]{1to16} |
| 0x62,0xf6,0x55,0xbf,0xb7,0x72,0x80 |
| |
| # ATT: vfmsubadd231ph 268435456(%esp,%esi,8), %xmm5, %xmm6 {%k7} |
| # INTEL: vfmsubadd231ph xmm6 {k7}, xmm5, xmmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf6,0x55,0x0f,0xb7,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vfmsubadd231ph (%ecx){1to8}, %xmm5, %xmm6 |
| # INTEL: vfmsubadd231ph xmm6, xmm5, word ptr [ecx]{1to8} |
| 0x62,0xf6,0x55,0x18,0xb7,0x31 |
| |
| # ATT: vfmsubadd231ph 2032(%ecx), %xmm5, %xmm6 |
| # INTEL: vfmsubadd231ph xmm6, xmm5, xmmword ptr [ecx + 2032] |
| 0x62,0xf6,0x55,0x08,0xb7,0x71,0x7f |
| |
| # ATT: vfmsubadd231ph -256(%edx){1to8}, %xmm5, %xmm6 {%k7} {z} |
| # INTEL: vfmsubadd231ph xmm6 {k7} {z}, xmm5, word ptr [edx - 256]{1to8} |
| 0x62,0xf6,0x55,0x9f,0xb7,0x72,0x80 |
| |
| # ATT: vfnmadd132ph %ymm4, %ymm5, %ymm6 |
| # INTEL: vfnmadd132ph ymm6, ymm5, ymm4 |
| 0x62,0xf6,0x55,0x28,0x9c,0xf4 |
| |
| # ATT: vfnmadd132ph %xmm4, %xmm5, %xmm6 |
| # INTEL: vfnmadd132ph xmm6, xmm5, xmm4 |
| 0x62,0xf6,0x55,0x08,0x9c,0xf4 |
| |
| # ATT: vfnmadd132ph 268435456(%esp,%esi,8), %ymm5, %ymm6 {%k7} |
| # INTEL: vfnmadd132ph ymm6 {k7}, ymm5, ymmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf6,0x55,0x2f,0x9c,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vfnmadd132ph (%ecx){1to16}, %ymm5, %ymm6 |
| # INTEL: vfnmadd132ph ymm6, ymm5, word ptr [ecx]{1to16} |
| 0x62,0xf6,0x55,0x38,0x9c,0x31 |
| |
| # ATT: vfnmadd132ph 4064(%ecx), %ymm5, %ymm6 |
| # INTEL: vfnmadd132ph ymm6, ymm5, ymmword ptr [ecx + 4064] |
| 0x62,0xf6,0x55,0x28,0x9c,0x71,0x7f |
| |
| # ATT: vfnmadd132ph -256(%edx){1to16}, %ymm5, %ymm6 {%k7} {z} |
| # INTEL: vfnmadd132ph ymm6 {k7} {z}, ymm5, word ptr [edx - 256]{1to16} |
| 0x62,0xf6,0x55,0xbf,0x9c,0x72,0x80 |
| |
| # ATT: vfnmadd132ph 268435456(%esp,%esi,8), %xmm5, %xmm6 {%k7} |
| # INTEL: vfnmadd132ph xmm6 {k7}, xmm5, xmmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf6,0x55,0x0f,0x9c,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vfnmadd132ph (%ecx){1to8}, %xmm5, %xmm6 |
| # INTEL: vfnmadd132ph xmm6, xmm5, word ptr [ecx]{1to8} |
| 0x62,0xf6,0x55,0x18,0x9c,0x31 |
| |
| # ATT: vfnmadd132ph 2032(%ecx), %xmm5, %xmm6 |
| # INTEL: vfnmadd132ph xmm6, xmm5, xmmword ptr [ecx + 2032] |
| 0x62,0xf6,0x55,0x08,0x9c,0x71,0x7f |
| |
| # ATT: vfnmadd132ph -256(%edx){1to8}, %xmm5, %xmm6 {%k7} {z} |
| # INTEL: vfnmadd132ph xmm6 {k7} {z}, xmm5, word ptr [edx - 256]{1to8} |
| 0x62,0xf6,0x55,0x9f,0x9c,0x72,0x80 |
| |
| # ATT: vfnmadd213ph %ymm4, %ymm5, %ymm6 |
| # INTEL: vfnmadd213ph ymm6, ymm5, ymm4 |
| 0x62,0xf6,0x55,0x28,0xac,0xf4 |
| |
| # ATT: vfnmadd213ph %xmm4, %xmm5, %xmm6 |
| # INTEL: vfnmadd213ph xmm6, xmm5, xmm4 |
| 0x62,0xf6,0x55,0x08,0xac,0xf4 |
| |
| # ATT: vfnmadd213ph 268435456(%esp,%esi,8), %ymm5, %ymm6 {%k7} |
| # INTEL: vfnmadd213ph ymm6 {k7}, ymm5, ymmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf6,0x55,0x2f,0xac,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vfnmadd213ph (%ecx){1to16}, %ymm5, %ymm6 |
| # INTEL: vfnmadd213ph ymm6, ymm5, word ptr [ecx]{1to16} |
| 0x62,0xf6,0x55,0x38,0xac,0x31 |
| |
| # ATT: vfnmadd213ph 4064(%ecx), %ymm5, %ymm6 |
| # INTEL: vfnmadd213ph ymm6, ymm5, ymmword ptr [ecx + 4064] |
| 0x62,0xf6,0x55,0x28,0xac,0x71,0x7f |
| |
| # ATT: vfnmadd213ph -256(%edx){1to16}, %ymm5, %ymm6 {%k7} {z} |
| # INTEL: vfnmadd213ph ymm6 {k7} {z}, ymm5, word ptr [edx - 256]{1to16} |
| 0x62,0xf6,0x55,0xbf,0xac,0x72,0x80 |
| |
| # ATT: vfnmadd213ph 268435456(%esp,%esi,8), %xmm5, %xmm6 {%k7} |
| # INTEL: vfnmadd213ph xmm6 {k7}, xmm5, xmmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf6,0x55,0x0f,0xac,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vfnmadd213ph (%ecx){1to8}, %xmm5, %xmm6 |
| # INTEL: vfnmadd213ph xmm6, xmm5, word ptr [ecx]{1to8} |
| 0x62,0xf6,0x55,0x18,0xac,0x31 |
| |
| # ATT: vfnmadd213ph 2032(%ecx), %xmm5, %xmm6 |
| # INTEL: vfnmadd213ph xmm6, xmm5, xmmword ptr [ecx + 2032] |
| 0x62,0xf6,0x55,0x08,0xac,0x71,0x7f |
| |
| # ATT: vfnmadd213ph -256(%edx){1to8}, %xmm5, %xmm6 {%k7} {z} |
| # INTEL: vfnmadd213ph xmm6 {k7} {z}, xmm5, word ptr [edx - 256]{1to8} |
| 0x62,0xf6,0x55,0x9f,0xac,0x72,0x80 |
| |
| # ATT: vfnmadd231ph %ymm4, %ymm5, %ymm6 |
| # INTEL: vfnmadd231ph ymm6, ymm5, ymm4 |
| 0x62,0xf6,0x55,0x28,0xbc,0xf4 |
| |
| # ATT: vfnmadd231ph %xmm4, %xmm5, %xmm6 |
| # INTEL: vfnmadd231ph xmm6, xmm5, xmm4 |
| 0x62,0xf6,0x55,0x08,0xbc,0xf4 |
| |
| # ATT: vfnmadd231ph 268435456(%esp,%esi,8), %ymm5, %ymm6 {%k7} |
| # INTEL: vfnmadd231ph ymm6 {k7}, ymm5, ymmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf6,0x55,0x2f,0xbc,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vfnmadd231ph (%ecx){1to16}, %ymm5, %ymm6 |
| # INTEL: vfnmadd231ph ymm6, ymm5, word ptr [ecx]{1to16} |
| 0x62,0xf6,0x55,0x38,0xbc,0x31 |
| |
| # ATT: vfnmadd231ph 4064(%ecx), %ymm5, %ymm6 |
| # INTEL: vfnmadd231ph ymm6, ymm5, ymmword ptr [ecx + 4064] |
| 0x62,0xf6,0x55,0x28,0xbc,0x71,0x7f |
| |
| # ATT: vfnmadd231ph -256(%edx){1to16}, %ymm5, %ymm6 {%k7} {z} |
| # INTEL: vfnmadd231ph ymm6 {k7} {z}, ymm5, word ptr [edx - 256]{1to16} |
| 0x62,0xf6,0x55,0xbf,0xbc,0x72,0x80 |
| |
| # ATT: vfnmadd231ph 268435456(%esp,%esi,8), %xmm5, %xmm6 {%k7} |
| # INTEL: vfnmadd231ph xmm6 {k7}, xmm5, xmmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf6,0x55,0x0f,0xbc,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vfnmadd231ph (%ecx){1to8}, %xmm5, %xmm6 |
| # INTEL: vfnmadd231ph xmm6, xmm5, word ptr [ecx]{1to8} |
| 0x62,0xf6,0x55,0x18,0xbc,0x31 |
| |
| # ATT: vfnmadd231ph 2032(%ecx), %xmm5, %xmm6 |
| # INTEL: vfnmadd231ph xmm6, xmm5, xmmword ptr [ecx + 2032] |
| 0x62,0xf6,0x55,0x08,0xbc,0x71,0x7f |
| |
| # ATT: vfnmadd231ph -256(%edx){1to8}, %xmm5, %xmm6 {%k7} {z} |
| # INTEL: vfnmadd231ph xmm6 {k7} {z}, xmm5, word ptr [edx - 256]{1to8} |
| 0x62,0xf6,0x55,0x9f,0xbc,0x72,0x80 |
| |
| # ATT: vfnmsub132ph %ymm4, %ymm5, %ymm6 |
| # INTEL: vfnmsub132ph ymm6, ymm5, ymm4 |
| 0x62,0xf6,0x55,0x28,0x9e,0xf4 |
| |
| # ATT: vfnmsub132ph %xmm4, %xmm5, %xmm6 |
| # INTEL: vfnmsub132ph xmm6, xmm5, xmm4 |
| 0x62,0xf6,0x55,0x08,0x9e,0xf4 |
| |
| # ATT: vfnmsub132ph 268435456(%esp,%esi,8), %ymm5, %ymm6 {%k7} |
| # INTEL: vfnmsub132ph ymm6 {k7}, ymm5, ymmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf6,0x55,0x2f,0x9e,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vfnmsub132ph (%ecx){1to16}, %ymm5, %ymm6 |
| # INTEL: vfnmsub132ph ymm6, ymm5, word ptr [ecx]{1to16} |
| 0x62,0xf6,0x55,0x38,0x9e,0x31 |
| |
| # ATT: vfnmsub132ph 4064(%ecx), %ymm5, %ymm6 |
| # INTEL: vfnmsub132ph ymm6, ymm5, ymmword ptr [ecx + 4064] |
| 0x62,0xf6,0x55,0x28,0x9e,0x71,0x7f |
| |
| # ATT: vfnmsub132ph -256(%edx){1to16}, %ymm5, %ymm6 {%k7} {z} |
| # INTEL: vfnmsub132ph ymm6 {k7} {z}, ymm5, word ptr [edx - 256]{1to16} |
| 0x62,0xf6,0x55,0xbf,0x9e,0x72,0x80 |
| |
| # ATT: vfnmsub132ph 268435456(%esp,%esi,8), %xmm5, %xmm6 {%k7} |
| # INTEL: vfnmsub132ph xmm6 {k7}, xmm5, xmmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf6,0x55,0x0f,0x9e,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vfnmsub132ph (%ecx){1to8}, %xmm5, %xmm6 |
| # INTEL: vfnmsub132ph xmm6, xmm5, word ptr [ecx]{1to8} |
| 0x62,0xf6,0x55,0x18,0x9e,0x31 |
| |
| # ATT: vfnmsub132ph 2032(%ecx), %xmm5, %xmm6 |
| # INTEL: vfnmsub132ph xmm6, xmm5, xmmword ptr [ecx + 2032] |
| 0x62,0xf6,0x55,0x08,0x9e,0x71,0x7f |
| |
| # ATT: vfnmsub132ph -256(%edx){1to8}, %xmm5, %xmm6 {%k7} {z} |
| # INTEL: vfnmsub132ph xmm6 {k7} {z}, xmm5, word ptr [edx - 256]{1to8} |
| 0x62,0xf6,0x55,0x9f,0x9e,0x72,0x80 |
| |
| # ATT: vfnmsub213ph %ymm4, %ymm5, %ymm6 |
| # INTEL: vfnmsub213ph ymm6, ymm5, ymm4 |
| 0x62,0xf6,0x55,0x28,0xae,0xf4 |
| |
| # ATT: vfnmsub213ph %xmm4, %xmm5, %xmm6 |
| # INTEL: vfnmsub213ph xmm6, xmm5, xmm4 |
| 0x62,0xf6,0x55,0x08,0xae,0xf4 |
| |
| # ATT: vfnmsub213ph 268435456(%esp,%esi,8), %ymm5, %ymm6 {%k7} |
| # INTEL: vfnmsub213ph ymm6 {k7}, ymm5, ymmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf6,0x55,0x2f,0xae,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vfnmsub213ph (%ecx){1to16}, %ymm5, %ymm6 |
| # INTEL: vfnmsub213ph ymm6, ymm5, word ptr [ecx]{1to16} |
| 0x62,0xf6,0x55,0x38,0xae,0x31 |
| |
| # ATT: vfnmsub213ph 4064(%ecx), %ymm5, %ymm6 |
| # INTEL: vfnmsub213ph ymm6, ymm5, ymmword ptr [ecx + 4064] |
| 0x62,0xf6,0x55,0x28,0xae,0x71,0x7f |
| |
| # ATT: vfnmsub213ph -256(%edx){1to16}, %ymm5, %ymm6 {%k7} {z} |
| # INTEL: vfnmsub213ph ymm6 {k7} {z}, ymm5, word ptr [edx - 256]{1to16} |
| 0x62,0xf6,0x55,0xbf,0xae,0x72,0x80 |
| |
| # ATT: vfnmsub213ph 268435456(%esp,%esi,8), %xmm5, %xmm6 {%k7} |
| # INTEL: vfnmsub213ph xmm6 {k7}, xmm5, xmmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf6,0x55,0x0f,0xae,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vfnmsub213ph (%ecx){1to8}, %xmm5, %xmm6 |
| # INTEL: vfnmsub213ph xmm6, xmm5, word ptr [ecx]{1to8} |
| 0x62,0xf6,0x55,0x18,0xae,0x31 |
| |
| # ATT: vfnmsub213ph 2032(%ecx), %xmm5, %xmm6 |
| # INTEL: vfnmsub213ph xmm6, xmm5, xmmword ptr [ecx + 2032] |
| 0x62,0xf6,0x55,0x08,0xae,0x71,0x7f |
| |
| # ATT: vfnmsub213ph -256(%edx){1to8}, %xmm5, %xmm6 {%k7} {z} |
| # INTEL: vfnmsub213ph xmm6 {k7} {z}, xmm5, word ptr [edx - 256]{1to8} |
| 0x62,0xf6,0x55,0x9f,0xae,0x72,0x80 |
| |
| # ATT: vfnmsub231ph %ymm4, %ymm5, %ymm6 |
| # INTEL: vfnmsub231ph ymm6, ymm5, ymm4 |
| 0x62,0xf6,0x55,0x28,0xbe,0xf4 |
| |
| # ATT: vfnmsub231ph %xmm4, %xmm5, %xmm6 |
| # INTEL: vfnmsub231ph xmm6, xmm5, xmm4 |
| 0x62,0xf6,0x55,0x08,0xbe,0xf4 |
| |
| # ATT: vfnmsub231ph 268435456(%esp,%esi,8), %ymm5, %ymm6 {%k7} |
| # INTEL: vfnmsub231ph ymm6 {k7}, ymm5, ymmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf6,0x55,0x2f,0xbe,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vfnmsub231ph (%ecx){1to16}, %ymm5, %ymm6 |
| # INTEL: vfnmsub231ph ymm6, ymm5, word ptr [ecx]{1to16} |
| 0x62,0xf6,0x55,0x38,0xbe,0x31 |
| |
| # ATT: vfnmsub231ph 4064(%ecx), %ymm5, %ymm6 |
| # INTEL: vfnmsub231ph ymm6, ymm5, ymmword ptr [ecx + 4064] |
| 0x62,0xf6,0x55,0x28,0xbe,0x71,0x7f |
| |
| # ATT: vfnmsub231ph -256(%edx){1to16}, %ymm5, %ymm6 {%k7} {z} |
| # INTEL: vfnmsub231ph ymm6 {k7} {z}, ymm5, word ptr [edx - 256]{1to16} |
| 0x62,0xf6,0x55,0xbf,0xbe,0x72,0x80 |
| |
| # ATT: vfnmsub231ph 268435456(%esp,%esi,8), %xmm5, %xmm6 {%k7} |
| # INTEL: vfnmsub231ph xmm6 {k7}, xmm5, xmmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf6,0x55,0x0f,0xbe,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vfnmsub231ph (%ecx){1to8}, %xmm5, %xmm6 |
| # INTEL: vfnmsub231ph xmm6, xmm5, word ptr [ecx]{1to8} |
| 0x62,0xf6,0x55,0x18,0xbe,0x31 |
| |
| # ATT: vfnmsub231ph 2032(%ecx), %xmm5, %xmm6 |
| # INTEL: vfnmsub231ph xmm6, xmm5, xmmword ptr [ecx + 2032] |
| 0x62,0xf6,0x55,0x08,0xbe,0x71,0x7f |
| |
| # ATT: vfnmsub231ph -256(%edx){1to8}, %xmm5, %xmm6 {%k7} {z} |
| # INTEL: vfnmsub231ph xmm6 {k7} {z}, xmm5, word ptr [edx - 256]{1to8} |
| 0x62,0xf6,0x55,0x9f,0xbe,0x72,0x80 |
| |
| # ATT: vfcmaddcph %ymm4, %ymm5, %ymm6 |
| # INTEL: vfcmaddcph ymm6, ymm5, ymm4 |
| 0x62,0xf6,0x57,0x28,0x56,0xf4 |
| |
| # ATT: vfcmaddcph %xmm4, %xmm5, %xmm6 |
| # INTEL: vfcmaddcph xmm6, xmm5, xmm4 |
| 0x62,0xf6,0x57,0x08,0x56,0xf4 |
| |
| # ATT: vfcmaddcph 268435456(%esp,%esi,8), %ymm5, %ymm6 {%k7} |
| # INTEL: vfcmaddcph ymm6 {k7}, ymm5, ymmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf6,0x57,0x2f,0x56,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vfcmaddcph (%ecx){1to8}, %ymm5, %ymm6 |
| # INTEL: vfcmaddcph ymm6, ymm5, dword ptr [ecx]{1to8} |
| 0x62,0xf6,0x57,0x38,0x56,0x31 |
| |
| # ATT: vfcmaddcph 4064(%ecx), %ymm5, %ymm6 |
| # INTEL: vfcmaddcph ymm6, ymm5, ymmword ptr [ecx + 4064] |
| 0x62,0xf6,0x57,0x28,0x56,0x71,0x7f |
| |
| # ATT: vfcmaddcph -512(%edx){1to8}, %ymm5, %ymm6 {%k7} {z} |
| # INTEL: vfcmaddcph ymm6 {k7} {z}, ymm5, dword ptr [edx - 512]{1to8} |
| 0x62,0xf6,0x57,0xbf,0x56,0x72,0x80 |
| |
| # ATT: vfcmaddcph 268435456(%esp,%esi,8), %xmm5, %xmm6 {%k7} |
| # INTEL: vfcmaddcph xmm6 {k7}, xmm5, xmmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf6,0x57,0x0f,0x56,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vfcmaddcph (%ecx){1to4}, %xmm5, %xmm6 |
| # INTEL: vfcmaddcph xmm6, xmm5, dword ptr [ecx]{1to4} |
| 0x62,0xf6,0x57,0x18,0x56,0x31 |
| |
| # ATT: vfcmaddcph 2032(%ecx), %xmm5, %xmm6 |
| # INTEL: vfcmaddcph xmm6, xmm5, xmmword ptr [ecx + 2032] |
| 0x62,0xf6,0x57,0x08,0x56,0x71,0x7f |
| |
| # ATT: vfcmaddcph -512(%edx){1to4}, %xmm5, %xmm6 {%k7} {z} |
| # INTEL: vfcmaddcph xmm6 {k7} {z}, xmm5, dword ptr [edx - 512]{1to4} |
| 0x62,0xf6,0x57,0x9f,0x56,0x72,0x80 |
| |
| # ATT: vfcmulcph %ymm4, %ymm5, %ymm6 |
| # INTEL: vfcmulcph ymm6, ymm5, ymm4 |
| 0x62,0xf6,0x57,0x28,0xd6,0xf4 |
| |
| # ATT: vfcmulcph %xmm4, %xmm5, %xmm6 |
| # INTEL: vfcmulcph xmm6, xmm5, xmm4 |
| 0x62,0xf6,0x57,0x08,0xd6,0xf4 |
| |
| # ATT: vfcmulcph 268435456(%esp,%esi,8), %ymm5, %ymm6 {%k7} |
| # INTEL: vfcmulcph ymm6 {k7}, ymm5, ymmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf6,0x57,0x2f,0xd6,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vfcmulcph (%ecx){1to8}, %ymm5, %ymm6 |
| # INTEL: vfcmulcph ymm6, ymm5, dword ptr [ecx]{1to8} |
| 0x62,0xf6,0x57,0x38,0xd6,0x31 |
| |
| # ATT: vfcmulcph 4064(%ecx), %ymm5, %ymm6 |
| # INTEL: vfcmulcph ymm6, ymm5, ymmword ptr [ecx + 4064] |
| 0x62,0xf6,0x57,0x28,0xd6,0x71,0x7f |
| |
| # ATT: vfcmulcph -512(%edx){1to8}, %ymm5, %ymm6 {%k7} {z} |
| # INTEL: vfcmulcph ymm6 {k7} {z}, ymm5, dword ptr [edx - 512]{1to8} |
| 0x62,0xf6,0x57,0xbf,0xd6,0x72,0x80 |
| |
| # ATT: vfcmulcph 268435456(%esp,%esi,8), %xmm5, %xmm6 {%k7} |
| # INTEL: vfcmulcph xmm6 {k7}, xmm5, xmmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf6,0x57,0x0f,0xd6,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vfcmulcph (%ecx){1to4}, %xmm5, %xmm6 |
| # INTEL: vfcmulcph xmm6, xmm5, dword ptr [ecx]{1to4} |
| 0x62,0xf6,0x57,0x18,0xd6,0x31 |
| |
| # ATT: vfcmulcph 2032(%ecx), %xmm5, %xmm6 |
| # INTEL: vfcmulcph xmm6, xmm5, xmmword ptr [ecx + 2032] |
| 0x62,0xf6,0x57,0x08,0xd6,0x71,0x7f |
| |
| # ATT: vfcmulcph -512(%edx){1to4}, %xmm5, %xmm6 {%k7} {z} |
| # INTEL: vfcmulcph xmm6 {k7} {z}, xmm5, dword ptr [edx - 512]{1to4} |
| 0x62,0xf6,0x57,0x9f,0xd6,0x72,0x80 |
| |
| # ATT: vfmaddcph %ymm4, %ymm5, %ymm6 |
| # INTEL: vfmaddcph ymm6, ymm5, ymm4 |
| 0x62,0xf6,0x56,0x28,0x56,0xf4 |
| |
| # ATT: vfmaddcph %xmm4, %xmm5, %xmm6 |
| # INTEL: vfmaddcph xmm6, xmm5, xmm4 |
| 0x62,0xf6,0x56,0x08,0x56,0xf4 |
| |
| # ATT: vfmaddcph 268435456(%esp,%esi,8), %ymm5, %ymm6 {%k7} |
| # INTEL: vfmaddcph ymm6 {k7}, ymm5, ymmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf6,0x56,0x2f,0x56,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vfmaddcph (%ecx){1to8}, %ymm5, %ymm6 |
| # INTEL: vfmaddcph ymm6, ymm5, dword ptr [ecx]{1to8} |
| 0x62,0xf6,0x56,0x38,0x56,0x31 |
| |
| # ATT: vfmaddcph 4064(%ecx), %ymm5, %ymm6 |
| # INTEL: vfmaddcph ymm6, ymm5, ymmword ptr [ecx + 4064] |
| 0x62,0xf6,0x56,0x28,0x56,0x71,0x7f |
| |
| # ATT: vfmaddcph -512(%edx){1to8}, %ymm5, %ymm6 {%k7} {z} |
| # INTEL: vfmaddcph ymm6 {k7} {z}, ymm5, dword ptr [edx - 512]{1to8} |
| 0x62,0xf6,0x56,0xbf,0x56,0x72,0x80 |
| |
| # ATT: vfmaddcph 268435456(%esp,%esi,8), %xmm5, %xmm6 {%k7} |
| # INTEL: vfmaddcph xmm6 {k7}, xmm5, xmmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf6,0x56,0x0f,0x56,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vfmaddcph (%ecx){1to4}, %xmm5, %xmm6 |
| # INTEL: vfmaddcph xmm6, xmm5, dword ptr [ecx]{1to4} |
| 0x62,0xf6,0x56,0x18,0x56,0x31 |
| |
| # ATT: vfmaddcph 2032(%ecx), %xmm5, %xmm6 |
| # INTEL: vfmaddcph xmm6, xmm5, xmmword ptr [ecx + 2032] |
| 0x62,0xf6,0x56,0x08,0x56,0x71,0x7f |
| |
| # ATT: vfmaddcph -512(%edx){1to4}, %xmm5, %xmm6 {%k7} {z} |
| # INTEL: vfmaddcph xmm6 {k7} {z}, xmm5, dword ptr [edx - 512]{1to4} |
| 0x62,0xf6,0x56,0x9f,0x56,0x72,0x80 |
| |
| # ATT: vfmulcph %ymm4, %ymm5, %ymm6 |
| # INTEL: vfmulcph ymm6, ymm5, ymm4 |
| 0x62,0xf6,0x56,0x28,0xd6,0xf4 |
| |
| # ATT: vfmulcph %xmm4, %xmm5, %xmm6 |
| # INTEL: vfmulcph xmm6, xmm5, xmm4 |
| 0x62,0xf6,0x56,0x08,0xd6,0xf4 |
| |
| # ATT: vfmulcph 268435456(%esp,%esi,8), %ymm5, %ymm6 {%k7} |
| # INTEL: vfmulcph ymm6 {k7}, ymm5, ymmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf6,0x56,0x2f,0xd6,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vfmulcph (%ecx){1to8}, %ymm5, %ymm6 |
| # INTEL: vfmulcph ymm6, ymm5, dword ptr [ecx]{1to8} |
| 0x62,0xf6,0x56,0x38,0xd6,0x31 |
| |
| # ATT: vfmulcph 4064(%ecx), %ymm5, %ymm6 |
| # INTEL: vfmulcph ymm6, ymm5, ymmword ptr [ecx + 4064] |
| 0x62,0xf6,0x56,0x28,0xd6,0x71,0x7f |
| |
| # ATT: vfmulcph -512(%edx){1to8}, %ymm5, %ymm6 {%k7} {z} |
| # INTEL: vfmulcph ymm6 {k7} {z}, ymm5, dword ptr [edx - 512]{1to8} |
| 0x62,0xf6,0x56,0xbf,0xd6,0x72,0x80 |
| |
| # ATT: vfmulcph 268435456(%esp,%esi,8), %xmm5, %xmm6 {%k7} |
| # INTEL: vfmulcph xmm6 {k7}, xmm5, xmmword ptr [esp + 8*esi + 268435456] |
| 0x62,0xf6,0x56,0x0f,0xd6,0xb4,0xf4,0x00,0x00,0x00,0x10 |
| |
| # ATT: vfmulcph (%ecx){1to4}, %xmm5, %xmm6 |
| # INTEL: vfmulcph xmm6, xmm5, dword ptr [ecx]{1to4} |
| 0x62,0xf6,0x56,0x18,0xd6,0x31 |
| |
| # ATT: vfmulcph 2032(%ecx), %xmm5, %xmm6 |
| # INTEL: vfmulcph xmm6, xmm5, xmmword ptr [ecx + 2032] |
| 0x62,0xf6,0x56,0x08,0xd6,0x71,0x7f |
| |
| # ATT: vfmulcph -512(%edx){1to4}, %xmm5, %xmm6 {%k7} {z} |
| # INTEL: vfmulcph xmm6 {k7} {z}, xmm5, dword ptr [edx - 512]{1to4} |
| 0x62,0xf6,0x56,0x9f,0xd6,0x72,0x80 |
