| # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py |
| # RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=regbankselect -regbankselect-fast -verify-machineinstrs -o - %s | FileCheck %s |
| # RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=regbankselect -regbankselect-greedy -verify-machineinstrs -o - %s | FileCheck %s |
| |
| --- |
| name: build_vector_trunc_v2s16_s32_ss |
| legalized: true |
| |
| body: | |
| bb.0: |
| liveins: $sgpr0, $sgpr1 |
| ; CHECK-LABEL: name: build_vector_trunc_v2s16_s32_ss |
| ; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0 |
| ; CHECK: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1 |
| ; CHECK: [[BUILD_VECTOR_TRUNC:%[0-9]+]]:sgpr(<2 x s16>) = G_BUILD_VECTOR_TRUNC [[COPY]](s32), [[COPY1]](s32) |
| %0:_(s32) = COPY $sgpr0 |
| %1:_(s32) = COPY $sgpr1 |
| %2:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC %0, %1 |
| ... |
| |
| --- |
| name: build_vector_trunc_v2s16_s32_sv |
| legalized: true |
| |
| body: | |
| bb.0: |
| liveins: $sgpr0, $vgpr0 |
| |
| ; CHECK-LABEL: name: build_vector_trunc_v2s16_s32_sv |
| ; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0 |
| ; CHECK: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0 |
| ; CHECK: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 65535 |
| ; CHECK: [[C1:%[0-9]+]]:vgpr(s32) = G_CONSTANT i32 16 |
| ; CHECK: [[SHL:%[0-9]+]]:vgpr(s32) = G_SHL [[COPY1]], [[C1]](s32) |
| ; CHECK: [[AND:%[0-9]+]]:sgpr(s32) = G_AND [[COPY]], [[C]] |
| ; CHECK: [[OR:%[0-9]+]]:vgpr(s32) = G_OR [[AND]], [[SHL]] |
| ; CHECK: [[BITCAST:%[0-9]+]]:vgpr(<2 x s16>) = G_BITCAST [[OR]](s32) |
| %0:_(s32) = COPY $sgpr0 |
| %1:_(s32) = COPY $vgpr0 |
| %2:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC %0, %1 |
| ... |
| |
| --- |
| name: build_vector_trunc_v2s16_s32_vs |
| legalized: true |
| |
| body: | |
| bb.0: |
| liveins: $vgpr0, $sgpr0 |
| ; CHECK-LABEL: name: build_vector_trunc_v2s16_s32_vs |
| ; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0 |
| ; CHECK: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr0 |
| ; CHECK: [[C:%[0-9]+]]:vgpr(s32) = G_CONSTANT i32 65535 |
| ; CHECK: [[C1:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 16 |
| ; CHECK: [[SHL:%[0-9]+]]:sgpr(s32) = G_SHL [[COPY1]], [[C1]](s32) |
| ; CHECK: [[AND:%[0-9]+]]:vgpr(s32) = G_AND [[COPY]], [[C]] |
| ; CHECK: [[OR:%[0-9]+]]:vgpr(s32) = G_OR [[AND]], [[SHL]] |
| ; CHECK: [[BITCAST:%[0-9]+]]:vgpr(<2 x s16>) = G_BITCAST [[OR]](s32) |
| %0:_(s32) = COPY $vgpr0 |
| %1:_(s32) = COPY $sgpr0 |
| %2:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC %0, %1 |
| ... |
| |
| --- |
| name: build_vector_trunc_v2s16_s32_vv |
| legalized: true |
| |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1 |
| ; CHECK-LABEL: name: build_vector_trunc_v2s16_s32_vv |
| ; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0 |
| ; CHECK: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1 |
| ; CHECK: [[C:%[0-9]+]]:vgpr(s32) = G_CONSTANT i32 65535 |
| ; CHECK: [[C1:%[0-9]+]]:vgpr(s32) = G_CONSTANT i32 16 |
| ; CHECK: [[SHL:%[0-9]+]]:vgpr(s32) = G_SHL [[COPY1]], [[C1]](s32) |
| ; CHECK: [[AND:%[0-9]+]]:vgpr(s32) = G_AND [[COPY]], [[C]] |
| ; CHECK: [[OR:%[0-9]+]]:vgpr(s32) = G_OR [[AND]], [[SHL]] |
| ; CHECK: [[BITCAST:%[0-9]+]]:vgpr(<2 x s16>) = G_BITCAST [[OR]](s32) |
| %0:_(s32) = COPY $vgpr0 |
| %1:_(s32) = COPY $vgpr1 |
| %2:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC %0, %1 |
| ... |