| # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py |
| # RUN: llc -march=amdgcn -mcpu=fiji -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck %s |
| |
| # The only simple instruction selection for G_SBFX/G_UBFX are the 64-bit |
| # vector versions. All other versions are expanded during register bank |
| # selection. |
| |
| --- |
| name: ubfx_s32_vii |
| legalized: true |
| regBankSelected: true |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0 |
| ; WAVE64-LABEL: name: ubfx_s32_vii |
| ; WAVE64: liveins: $vgpr0 |
| ; WAVE64: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; WAVE64: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 2, implicit $exec |
| ; WAVE64: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 10, implicit $exec |
| ; WAVE64: [[V_BFE_U32_e64_:%[0-9]+]]:vgpr_32 = V_BFE_U32_e64 [[COPY]], [[V_MOV_B32_e32_]], [[V_MOV_B32_e32_1]], implicit $exec |
| ; WAVE64: S_ENDPGM 0, implicit [[V_BFE_U32_e64_]] |
| ; WAVE32-LABEL: name: ubfx_s32_vii |
| ; WAVE32: liveins: $vgpr0 |
| ; WAVE32: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; WAVE32: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 2, implicit $exec |
| ; WAVE32: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 10, implicit $exec |
| ; WAVE32: [[V_BFE_U32_e64_:%[0-9]+]]:vgpr_32 = V_BFE_U32_e64 [[COPY]], [[V_MOV_B32_e32_]], [[V_MOV_B32_e32_1]], implicit $exec |
| ; WAVE32: S_ENDPGM 0, implicit [[V_BFE_U32_e64_]] |
| ; CHECK-LABEL: name: ubfx_s32_vii |
| ; CHECK: liveins: $vgpr0 |
| ; CHECK: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; CHECK: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 2, implicit $exec |
| ; CHECK: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 10, implicit $exec |
| ; CHECK: [[V_BFE_U32_e64_:%[0-9]+]]:vgpr_32 = V_BFE_U32_e64 [[COPY]], [[V_MOV_B32_e32_]], [[V_MOV_B32_e32_1]], implicit $exec |
| ; CHECK: S_ENDPGM 0, implicit [[V_BFE_U32_e64_]] |
| %0:vgpr(s32) = COPY $vgpr0 |
| %1:vgpr(s32) = G_CONSTANT i32 2 |
| %2:vgpr(s32) = G_CONSTANT i32 10 |
| %3:vgpr(s32) = G_UBFX %0, %1(s32), %2 |
| S_ENDPGM 0, implicit %3 |
| ... |
| |
| --- |
| name: ubfx_s32_vvv |
| legalized: true |
| regBankSelected: true |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1, $vgpr2 |
| ; WAVE64-LABEL: name: ubfx_s32_vvv |
| ; WAVE64: liveins: $vgpr0, $vgpr1, $vgpr2 |
| ; WAVE64: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; WAVE64: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1 |
| ; WAVE64: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2 |
| ; WAVE64: [[V_BFE_U32_e64_:%[0-9]+]]:vgpr_32 = V_BFE_U32_e64 [[COPY]], [[COPY1]], [[COPY2]], implicit $exec |
| ; WAVE64: S_ENDPGM 0, implicit [[V_BFE_U32_e64_]] |
| ; WAVE32-LABEL: name: ubfx_s32_vvv |
| ; WAVE32: liveins: $vgpr0, $vgpr1, $vgpr2 |
| ; WAVE32: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; WAVE32: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1 |
| ; WAVE32: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2 |
| ; WAVE32: [[V_BFE_U32_e64_:%[0-9]+]]:vgpr_32 = V_BFE_U32_e64 [[COPY]], [[COPY1]], [[COPY2]], implicit $exec |
| ; WAVE32: S_ENDPGM 0, implicit [[V_BFE_U32_e64_]] |
| ; CHECK-LABEL: name: ubfx_s32_vvv |
| ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2 |
| ; CHECK: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1 |
| ; CHECK: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2 |
| ; CHECK: [[V_BFE_U32_e64_:%[0-9]+]]:vgpr_32 = V_BFE_U32_e64 [[COPY]], [[COPY1]], [[COPY2]], implicit $exec |
| ; CHECK: S_ENDPGM 0, implicit [[V_BFE_U32_e64_]] |
| %0:vgpr(s32) = COPY $vgpr0 |
| %1:vgpr(s32) = COPY $vgpr1 |
| %2:vgpr(s32) = COPY $vgpr2 |
| %3:vgpr(s32) = G_UBFX %0, %1(s32), %2 |
| S_ENDPGM 0, implicit %3 |
| ... |