| ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals all --version 5 |
| ; RUN: opt < %s -passes=amdgpu-sw-lower-lds -amdgpu-asan-instrument-lds=false -S -mtriple=amdgcn-amd-amdhsa | FileCheck %s |
| |
| ; Test to check if static LDS is lowered correctly when a non-kernel with LDS accesses is called from kernel. |
| ; Also checks if amdgpu-no-lds-kernel-id attribute is removed from the list of attributes |
| @lds_1 = internal addrspace(3) global [1 x i8] poison, align 1 |
| @lds_2 = internal addrspace(3) global [1 x i32] poison, align 2 |
| @lds_3 = external addrspace(3) global [3 x i8], align 4 |
| @lds_4 = external addrspace(3) global [4 x i8], align 8 |
| |
| ;. |
| ; CHECK: @llvm.amdgcn.sw.lds.k0 = internal addrspace(3) global ptr poison, no_sanitize_address, align 8, !absolute_symbol [[META0:![0-9]+]] |
| ; CHECK: @llvm.amdgcn.sw.lds.k0.md = internal addrspace(1) global %llvm.amdgcn.sw.lds.k0.md.type { %llvm.amdgcn.sw.lds.k0.md.item { i32 0, i32 8, i32 32 }, %llvm.amdgcn.sw.lds.k0.md.item { i32 32, i32 1, i32 32 }, %llvm.amdgcn.sw.lds.k0.md.item { i32 64, i32 4, i32 32 }, %llvm.amdgcn.sw.lds.k0.md.item { i32 96, i32 3, i32 32 }, %llvm.amdgcn.sw.lds.k0.md.item { i32 128, i32 4, i32 32 } }, no_sanitize_address |
| ; @llvm.amdgcn.sw.lds.base.table = internal addrspace(1) constant [1 x ptr addrspace(3)] [ptr addrspace(3) @llvm.amdgcn.sw.lds.k0], no_sanitize_address |
| ; @llvm.amdgcn.sw.lds.offset.table = internal addrspace(1) constant [1 x [2 x ptr addrspace(1)]] [[2 x ptr addrspace(1)] [ptr addrspace(1) getelementptr inbounds (%llvm.amdgcn.sw.lds.k0.md.type, ptr addrspace(1) @llvm.amdgcn.sw.lds.k0.md, i32 0, i32 3, i32 0), ptr addrspace(1) getelementptr inbounds (%llvm.amdgcn.sw.lds.k0.md.type, ptr addrspace(1) @llvm.amdgcn.sw.lds.k0.md, i32 0, i32 4, i32 0)]], no_sanitize_address |
| ;. |
| define void @use_variables() sanitize_address { |
| ; CHECK-LABEL: define void @use_variables( |
| ; CHECK-SAME: ) #[[ATTR0:[0-9]+]] { |
| ; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.amdgcn.lds.kernel.id() |
| ; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr addrspace(3)], ptr addrspace(1) @llvm.amdgcn.sw.lds.base.table, i32 0, i32 [[TMP1]] |
| ; CHECK-NEXT: [[TMP3:%.*]] = load ptr addrspace(3), ptr addrspace(1) [[TMP2]], align 4 |
| ; CHECK-NEXT: [[TMP4:%.*]] = load ptr addrspace(1), ptr addrspace(3) [[TMP3]], align 8 |
| ; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x [2 x ptr addrspace(1)]], ptr addrspace(1) @llvm.amdgcn.sw.lds.offset.table, i32 0, i32 [[TMP1]], i32 0 |
| ; CHECK-NEXT: [[TMP6:%.*]] = load ptr addrspace(1), ptr addrspace(1) [[TMP5]], align 8 |
| ; CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr addrspace(1) [[TMP6]], align 4 |
| ; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds i8, ptr addrspace(3) [[TMP3]], i32 [[TMP7]] |
| ; CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x [2 x ptr addrspace(1)]], ptr addrspace(1) @llvm.amdgcn.sw.lds.offset.table, i32 0, i32 [[TMP1]], i32 1 |
| ; CHECK-NEXT: [[TMP10:%.*]] = load ptr addrspace(1), ptr addrspace(1) [[TMP9]], align 8 |
| ; CHECK-NEXT: [[TMP11:%.*]] = load i32, ptr addrspace(1) [[TMP10]], align 4 |
| ; CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds i8, ptr addrspace(3) [[TMP3]], i32 [[TMP11]] |
| ; CHECK-NEXT: [[TMP18:%.*]] = ptrtoint ptr addrspace(3) [[TMP8]] to i32 |
| ; CHECK-NEXT: [[TMP19:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[TMP4]], i32 [[TMP18]] |
| ; CHECK-NEXT: [[TMP20:%.*]] = addrspacecast ptr addrspace(1) [[TMP19]] to ptr |
| ; CHECK-NEXT: [[TMP16:%.*]] = ptrtoint ptr addrspace(3) [[TMP8]] to i32 |
| ; CHECK-NEXT: [[TMP17:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[TMP4]], i32 [[TMP16]] |
| ; CHECK-NEXT: [[TMP13:%.*]] = addrspacecast ptr addrspace(1) [[TMP17]] to ptr |
| ; CHECK-NEXT: store i8 3, ptr [[TMP13]], align 4 |
| ; CHECK-NEXT: [[TMP14:%.*]] = ptrtoint ptr addrspace(3) [[TMP12]] to i32 |
| ; CHECK-NEXT: [[TMP15:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[TMP4]], i32 [[TMP14]] |
| ; CHECK-NEXT: store i8 3, ptr addrspace(1) [[TMP15]], align 8 |
| ; CHECK-NEXT: ret void |
| ; |
| %X = addrspacecast ptr addrspace(3) @lds_3 to ptr |
| store i8 3, ptr addrspacecast( ptr addrspace(3) @lds_3 to ptr), align 4 |
| store i8 3, ptr addrspace(3) @lds_4, align 8 |
| ret void |
| } |
| |
| define amdgpu_kernel void @k0() sanitize_address #1 { |
| ; CHECK-LABEL: define amdgpu_kernel void @k0( |
| ; CHECK-SAME: ) #[[ATTR1:[0-9]+]] !llvm.amdgcn.lds.kernel.id [[META2:![0-9]+]] { |
| ; CHECK-NEXT: [[WID:.*]]: |
| ; CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.amdgcn.workitem.id.x() |
| ; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.amdgcn.workitem.id.y() |
| ; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.amdgcn.workitem.id.z() |
| ; CHECK-NEXT: [[TMP3:%.*]] = or i32 [[TMP0]], [[TMP1]] |
| ; CHECK-NEXT: [[TMP4:%.*]] = or i32 [[TMP3]], [[TMP2]] |
| ; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[TMP4]], 0 |
| ; CHECK-NEXT: br i1 [[TMP5]], label %[[MALLOC:.*]], label %[[BB24:.*]] |
| ; CHECK: [[MALLOC]]: |
| ; CHECK-NEXT: [[TMP6:%.*]] = load i32, ptr addrspace(1) getelementptr inbounds ([[LLVM_AMDGCN_SW_LDS_K0_MD_TYPE:%.*]], ptr addrspace(1) @llvm.amdgcn.sw.lds.k0.md, i32 0, i32 4, i32 0), align 4 |
| ; CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr addrspace(1) getelementptr inbounds ([[LLVM_AMDGCN_SW_LDS_K0_MD_TYPE]], ptr addrspace(1) @llvm.amdgcn.sw.lds.k0.md, i32 0, i32 4, i32 2), align 4 |
| ; CHECK-NEXT: [[TMP8:%.*]] = add i32 [[TMP6]], [[TMP7]] |
| ; CHECK-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 |
| ; CHECK-NEXT: [[TMP10:%.*]] = call ptr @llvm.returnaddress(i32 0) |
| ; CHECK-NEXT: [[TMP11:%.*]] = ptrtoint ptr [[TMP10]] to i64 |
| ; CHECK-NEXT: [[TMP12:%.*]] = call i64 @__asan_malloc_impl(i64 [[TMP9]], i64 [[TMP11]]) |
| ; CHECK-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP12]] to ptr addrspace(1) |
| ; CHECK-NEXT: store ptr addrspace(1) [[TMP13]], ptr addrspace(3) @llvm.amdgcn.sw.lds.k0, align 8 |
| ; CHECK-NEXT: [[TMP14:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[TMP13]], i64 8 |
| ; CHECK-NEXT: [[TMP15:%.*]] = ptrtoint ptr addrspace(1) [[TMP14]] to i64 |
| ; CHECK-NEXT: call void @__asan_poison_region(i64 [[TMP15]], i64 24) |
| ; CHECK-NEXT: [[TMP16:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[TMP13]], i64 33 |
| ; CHECK-NEXT: [[TMP17:%.*]] = ptrtoint ptr addrspace(1) [[TMP16]] to i64 |
| ; CHECK-NEXT: call void @__asan_poison_region(i64 [[TMP17]], i64 31) |
| ; CHECK-NEXT: [[TMP18:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[TMP13]], i64 68 |
| ; CHECK-NEXT: [[TMP19:%.*]] = ptrtoint ptr addrspace(1) [[TMP18]] to i64 |
| ; CHECK-NEXT: call void @__asan_poison_region(i64 [[TMP19]], i64 28) |
| ; CHECK-NEXT: [[TMP20:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[TMP13]], i64 99 |
| ; CHECK-NEXT: [[TMP21:%.*]] = ptrtoint ptr addrspace(1) [[TMP20]] to i64 |
| ; CHECK-NEXT: call void @__asan_poison_region(i64 [[TMP21]], i64 29) |
| ; CHECK-NEXT: [[TMP22:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[TMP13]], i64 132 |
| ; CHECK-NEXT: [[TMP23:%.*]] = ptrtoint ptr addrspace(1) [[TMP22]] to i64 |
| ; CHECK-NEXT: call void @__asan_poison_region(i64 [[TMP23]], i64 28) |
| ; CHECK-NEXT: br label %[[BB24]] |
| ; CHECK: [[BB24]]: |
| ; CHECK-NEXT: [[XYZCOND:%.*]] = phi i1 [ false, %[[WID]] ], [ true, %[[MALLOC]] ] |
| ; CHECK-NEXT: call void @llvm.amdgcn.s.barrier() |
| ; CHECK-NEXT: [[TMP25:%.*]] = load ptr addrspace(1), ptr addrspace(3) @llvm.amdgcn.sw.lds.k0, align 8 |
| ; CHECK-NEXT: [[TMP26:%.*]] = load i32, ptr addrspace(1) getelementptr inbounds ([[LLVM_AMDGCN_SW_LDS_K0_MD_TYPE]], ptr addrspace(1) @llvm.amdgcn.sw.lds.k0.md, i32 0, i32 1, i32 0), align 4 |
| ; CHECK-NEXT: [[TMP27:%.*]] = getelementptr inbounds i8, ptr addrspace(3) @llvm.amdgcn.sw.lds.k0, i32 [[TMP26]] |
| ; CHECK-NEXT: [[TMP28:%.*]] = load i32, ptr addrspace(1) getelementptr inbounds ([[LLVM_AMDGCN_SW_LDS_K0_MD_TYPE]], ptr addrspace(1) @llvm.amdgcn.sw.lds.k0.md, i32 0, i32 2, i32 0), align 4 |
| ; CHECK-NEXT: [[TMP29:%.*]] = getelementptr inbounds i8, ptr addrspace(3) @llvm.amdgcn.sw.lds.k0, i32 [[TMP28]] |
| ; CHECK-NEXT: call void @use_variables() |
| ; CHECK-NEXT: [[TMP30:%.*]] = ptrtoint ptr addrspace(3) [[TMP27]] to i32 |
| ; CHECK-NEXT: [[TMP31:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[TMP25]], i32 [[TMP30]] |
| ; CHECK-NEXT: store i8 7, ptr addrspace(1) [[TMP31]], align 1 |
| ; CHECK-NEXT: [[TMP32:%.*]] = ptrtoint ptr addrspace(3) [[TMP29]] to i32 |
| ; CHECK-NEXT: [[TMP33:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[TMP25]], i32 [[TMP32]] |
| ; CHECK-NEXT: store i32 8, ptr addrspace(1) [[TMP33]], align 2 |
| ; CHECK-NEXT: br label %[[CONDFREE:.*]] |
| ; CHECK: [[CONDFREE]]: |
| ; CHECK-NEXT: call void @llvm.amdgcn.s.barrier() |
| ; CHECK-NEXT: br i1 [[XYZCOND]], label %[[FREE:.*]], label %[[END:.*]] |
| ; CHECK: [[FREE]]: |
| ; CHECK-NEXT: [[TMP34:%.*]] = call ptr @llvm.returnaddress(i32 0) |
| ; CHECK-NEXT: [[TMP35:%.*]] = ptrtoint ptr [[TMP34]] to i64 |
| ; CHECK-NEXT: [[TMP36:%.*]] = ptrtoint ptr addrspace(1) [[TMP25]] to i64 |
| ; CHECK-NEXT: call void @__asan_free_impl(i64 [[TMP36]], i64 [[TMP35]]) |
| ; CHECK-NEXT: br label %[[END]] |
| ; CHECK: [[END]]: |
| ; CHECK-NEXT: ret void |
| ; |
| call void @use_variables() |
| store i8 7, ptr addrspace(3) @lds_1, align 1 |
| store i32 8, ptr addrspace(3) @lds_2, align 2 |
| ret void |
| } |
| |
| !llvm.module.flags = !{!0} |
| !0 = !{i32 4, !"nosanitize_address", i32 1} |
| attributes #1 = { "amdgpu-no-lds-kernel-id" } |
| ;. |
| ; CHECK: attributes #[[ATTR0]] = { sanitize_address } |
| ; CHECK: attributes #[[ATTR1]] = { sanitize_address "amdgpu-lds-size"="8" } |
| ; CHECK: attributes #[[ATTR2:[0-9]+]] = { nocallback nofree nosync nounwind speculatable willreturn memory(none) } |
| ; CHECK: attributes #[[ATTR3:[0-9]+]] = { nocallback nofree nosync nounwind willreturn memory(none) } |
| ; CHECK: attributes #[[ATTR4:[0-9]+]] = { convergent nocallback nofree nounwind willreturn } |
| ;. |
| ; CHECK: [[META0]] = !{i32 0, i32 1} |
| ; CHECK: [[META1:![0-9]+]] = !{i32 4, !"nosanitize_address", i32 1} |
| ; CHECK: [[META2]] = !{i32 0} |
| ;. |
