llvm/test/CodeGen/AMDGPU/large-avgpr-assign-last.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx950 -verify-regalloc -greedy-regclass-priority-trumps-globalness=1 -start-after=machine-scheduler -stop-after=virtregrewriter,2 -o - %s | FileCheck %s

--- |
  define void @temp_vgpr_to_agpr_should_not_undo_split_with_remat() #0 {
  entry:
    unreachable
  }

  attributes #0 = { "amdgpu-agpr-alloc"="0,0" }
...


---
name:            temp_vgpr_to_agpr_should_not_undo_split_with_remat
tracksRegLiveness: true
machineFunctionInfo:
  isEntryFunction: true
  scratchRSrcReg:  '$sgpr96_sgpr97_sgpr98_sgpr99'
  stackPtrOffsetReg: '$sgpr32'
  argumentInfo:
    privateSegmentBuffer: { reg: '$sgpr0_sgpr1_sgpr2_sgpr3' }
    kernargSegmentPtr: { reg: '$sgpr4_sgpr5' }
    workGroupIDX:    { reg: '$sgpr6' }
    privateSegmentWaveByteOffset: { reg: '$sgpr7' }
    workItemIDX:     { reg: '$vgpr0' }
  sgprForEXECCopy: '$sgpr100_sgpr101'
body:             |
  bb.0:
   liveins: $vgpr0, $sgpr4_sgpr5
    ; CHECK-LABEL: name: temp_vgpr_to_agpr_should_not_undo_split_with_remat
    ; CHECK: liveins: $vgpr0, $sgpr4_sgpr5
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: renamable $vgpr0 = IMPLICIT_DEF
    ; CHECK-NEXT: dead renamable $vgpr1 = IMPLICIT_DEF
    ; CHECK-NEXT: renamable $vgpr1 = IMPLICIT_DEF
    ; CHECK-NEXT: renamable $vgpr2 = IMPLICIT_DEF
    ; CHECK-NEXT: renamable $vgpr3 = IMPLICIT_DEF
    ; CHECK-NEXT: renamable $vgpr4 = IMPLICIT_DEF
    ; CHECK-NEXT: renamable $vgpr5 = IMPLICIT_DEF
    ; CHECK-NEXT: renamable $vgpr6 = IMPLICIT_DEF
    ; CHECK-NEXT: renamable $vgpr7 = IMPLICIT_DEF
    ; CHECK-NEXT: renamable $vgpr8 = IMPLICIT_DEF
    ; CHECK-NEXT: renamable $vgpr9 = IMPLICIT_DEF
    ; CHECK-NEXT: renamable $vgpr10 = IMPLICIT_DEF
    ; CHECK-NEXT: renamable $vgpr11 = IMPLICIT_DEF
    ; CHECK-NEXT: renamable $vgpr12 = IMPLICIT_DEF
    ; CHECK-NEXT: renamable $vgpr13 = IMPLICIT_DEF
    ; CHECK-NEXT: renamable $vgpr14 = IMPLICIT_DEF
    ; CHECK-NEXT: renamable $vgpr15 = IMPLICIT_DEF
    ; CHECK-NEXT: renamable $vgpr16 = IMPLICIT_DEF
    ; CHECK-NEXT: renamable $vgpr17 = IMPLICIT_DEF
    ; CHECK-NEXT: renamable $vgpr18 = IMPLICIT_DEF
    ; CHECK-NEXT: renamable $vgpr19 = IMPLICIT_DEF
    ; CHECK-NEXT: renamable $vgpr20 = IMPLICIT_DEF
    ; CHECK-NEXT: renamable $vgpr21 = IMPLICIT_DEF
    ; CHECK-NEXT: renamable $vgpr22 = IMPLICIT_DEF
    ; CHECK-NEXT: KILL killed renamable $vgpr2, killed renamable $vgpr3, killed renamable $vgpr4, killed renamable $vgpr5, killed renamable $vgpr6, killed renamable $vgpr7, killed renamable $vgpr8, killed renamable $vgpr9, killed renamable $vgpr10, killed renamable $vgpr11, killed renamable $vgpr12, killed renamable $vgpr13, killed renamable $vgpr14, killed renamable $vgpr15, killed renamable $vgpr16
    ; CHECK-NEXT: S_NOP 0, implicit-def renamable $vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31_vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38
    ; CHECK-NEXT: S_NOP 0, implicit-def renamable $vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54
    ; CHECK-NEXT: KILL killed renamable $vgpr0, killed renamable $vgpr1, killed renamable $vgpr17, killed renamable $vgpr18, killed renamable $vgpr19, killed renamable $vgpr20, killed renamable $vgpr21, killed renamable $vgpr22
    ; CHECK-NEXT: S_NOP 0, implicit killed renamable $vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31_vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38, implicit killed renamable $vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54
    ; CHECK-NEXT: S_ENDPGM 0
    %1:vgpr_32 = IMPLICIT_DEF
    %2:vgpr_32 = IMPLICIT_DEF
    %2:vgpr_32 = IMPLICIT_DEF
    %3:vgpr_32 = IMPLICIT_DEF
    %4:vgpr_32 = IMPLICIT_DEF
    %5:vgpr_32 = IMPLICIT_DEF
    %6:vgpr_32 = IMPLICIT_DEF
    %7:vgpr_32 = IMPLICIT_DEF
    %8:vgpr_32 = IMPLICIT_DEF
    %9:vgpr_32 = IMPLICIT_DEF
    %10:vgpr_32 = IMPLICIT_DEF
    %11:vgpr_32 = IMPLICIT_DEF
    %12:vgpr_32 = IMPLICIT_DEF
    %13:vgpr_32 = IMPLICIT_DEF
    %14:vgpr_32 = IMPLICIT_DEF
    %15:vgpr_32 = IMPLICIT_DEF
    %16:vgpr_32 = IMPLICIT_DEF
    %17:vgpr_32 = IMPLICIT_DEF
    %18:vgpr_32 = IMPLICIT_DEF
    %19:vgpr_32 = IMPLICIT_DEF
    %20:vgpr_32 = IMPLICIT_DEF
    %21:vgpr_32 = IMPLICIT_DEF
    %22:vgpr_32 = IMPLICIT_DEF
    %23:vgpr_32 = IMPLICIT_DEF
    KILL %3, %4, %5, %6, %7, %8, %9, %10, %11, %12, %13, %14, %15, %16, %17
    S_NOP 0, implicit-def %50:av_512
    S_NOP 0, implicit-def %51:av_512
    KILL %1, %2, %18, %19, %20, %21, %22, %23
    S_NOP 0, implicit %50, implicit %51
    S_ENDPGM 0
...