| ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2 |
| ; RUN: llc -verify-machineinstrs -ppc-asm-full-reg-names -mtriple=powerpc \ |
| ; RUN: -mcpu=pwr7 < %s | FileCheck %s |
| ; RUN: llc -verify-machineinstrs -ppc-asm-full-reg-names -mtriple=powerpc \ |
| ; RUN: -mcpu=pwr8 < %s | FileCheck %s --check-prefix=PWR8 |
| |
| define void @foo(ptr %a, i32 %x) { |
| ; CHECK-LABEL: foo: |
| ; CHECK: # %bb.0: |
| ; CHECK-NEXT: rlwinm r5, r3, 3, 27, 28 |
| ; CHECK-NEXT: li r6, 255 |
| ; CHECK-NEXT: extsb r4, r4 |
| ; CHECK-NEXT: sync |
| ; CHECK-NEXT: xori r5, r5, 24 |
| ; CHECK-NEXT: rlwinm r3, r3, 0, 0, 29 |
| ; CHECK-NEXT: slw r7, r4, r5 |
| ; CHECK-NEXT: slw r6, r6, r5 |
| ; CHECK-NEXT: and r7, r7, r6 |
| ; CHECK-NEXT: .LBB0_1: |
| ; CHECK-NEXT: lwarx r8, 0, r3 |
| ; CHECK-NEXT: and r9, r8, r6 |
| ; CHECK-NEXT: srw r9, r9, r5 |
| ; CHECK-NEXT: extsb r9, r9 |
| ; CHECK-NEXT: cmpw r9, r4 |
| ; CHECK-NEXT: bgt cr0, .LBB0_3 |
| ; CHECK-NEXT: # %bb.2: |
| ; CHECK-NEXT: andc r8, r8, r6 |
| ; CHECK-NEXT: or r8, r7, r8 |
| ; CHECK-NEXT: stwcx. r8, 0, r3 |
| ; CHECK-NEXT: bne cr0, .LBB0_1 |
| ; CHECK-NEXT: .LBB0_3: |
| ; CHECK-NEXT: lwsync |
| ; CHECK-NEXT: blr |
| ; |
| ; PWR8-LABEL: foo: |
| ; PWR8: # %bb.0: |
| ; PWR8-NEXT: extsb r4, r4 |
| ; PWR8-NEXT: sync |
| ; PWR8-NEXT: .LBB0_1: |
| ; PWR8-NEXT: lbarx r5, 0, r3 |
| ; PWR8-NEXT: extsb r5, r5 |
| ; PWR8-NEXT: cmpw r5, r4 |
| ; PWR8-NEXT: bgt cr0, .LBB0_3 |
| ; PWR8-NEXT: # %bb.2: |
| ; PWR8-NEXT: stbcx. r4, 0, r3 |
| ; PWR8-NEXT: bne cr0, .LBB0_1 |
| ; PWR8-NEXT: .LBB0_3: |
| ; PWR8-NEXT: lwsync |
| ; PWR8-NEXT: blr |
| %val = trunc i32 %x to i8 |
| %1 = atomicrmw max ptr %a, i8 %val seq_cst |
| ret void |
| } |
