llvm/test/Transforms/SLPVectorizer/AMDGPU/inst-count-heuristic.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
; RUN: opt -S -mtriple=amdgpu9.50-amd-amdhsa -passes=slp-vectorizer \
; RUN:     < %s | FileCheck -check-prefix=GFX950 %s
; RUN: opt -S -mtriple=amdgpu9.50-amd-amdhsa -passes=slp-vectorizer \
; RUN:     -slp-inst-count-check=true < %s | FileCheck -check-prefix=GFX950 %s
; RUN: opt -S -mtriple=amdgpu9.42-amd-amdhsa -passes=slp-vectorizer \
; RUN:     < %s | FileCheck -check-prefix=GFX942 %s
; RUN: opt -S -mtriple=amdgpu9.06-amd-amdhsa -passes=slp-vectorizer \
; RUN:     < %s | FileCheck -check-prefix=GFX906 %s
; RUN: opt -S -mtriple=amdgpu9.06-amd-amdhsa -passes=slp-vectorizer \
; RUN:     -slp-inst-count-check=false < %s | FileCheck -check-prefix=GFX906NOCOUNT %s

define amdgpu_kernel void @phi5_rotate(
; GFX950-LABEL: define amdgpu_kernel void @phi5_rotate(
; GFX950-SAME: ptr addrspace(1) captures(none) [[OUT:%.*]], i32 [[N:%.*]], i16 [[S0:%.*]], i16 [[S1:%.*]], i16 [[S2:%.*]], i16 [[S3:%.*]], i16 [[S4:%.*]]) {
; GFX950-NEXT:  [[ENTRY:.*]]:
; GFX950-NEXT:    br label %[[LOOP:.*]]
; GFX950:       [[LOOP]]:
; GFX950-NEXT:    [[I:%.*]] = phi i32 [ 0, %[[ENTRY]] ], [ [[I_NEXT:%.*]], %[[LOOP]] ]
; GFX950-NEXT:    [[X0:%.*]] = phi i16 [ [[S0]], %[[ENTRY]] ], [ [[X4:%.*]], %[[LOOP]] ]
; GFX950-NEXT:    [[X1:%.*]] = phi i16 [ [[S1]], %[[ENTRY]] ], [ [[X0]], %[[LOOP]] ]
; GFX950-NEXT:    [[X2:%.*]] = phi i16 [ [[S2]], %[[ENTRY]] ], [ [[X1]], %[[LOOP]] ]
; GFX950-NEXT:    [[X3:%.*]] = phi i16 [ [[S3]], %[[ENTRY]] ], [ [[X2]], %[[LOOP]] ]
; GFX950-NEXT:    [[X4]] = phi i16 [ [[S4]], %[[ENTRY]] ], [ [[X3]], %[[LOOP]] ]
; GFX950-NEXT:    [[GEP0:%.*]] = getelementptr i16, ptr addrspace(1) [[OUT]], i32 [[I]]
; GFX950-NEXT:    [[TMP0:%.*]] = insertelement <2 x i16> poison, i16 [[X0]], i64 0
; GFX950-NEXT:    [[TMP1:%.*]] = insertelement <2 x i16> [[TMP0]], i16 [[X1]], i64 1
; GFX950-NEXT:    store <2 x i16> [[TMP1]], ptr addrspace(1) [[GEP0]], align 2
; GFX950-NEXT:    [[I_NEXT]] = add nuw i32 [[I]], 2
; GFX950-NEXT:    [[CMP:%.*]] = icmp ult i32 [[I_NEXT]], [[N]]
; GFX950-NEXT:    br i1 [[CMP]], label %[[LOOP]], label %[[EXIT:.*]]
; GFX950:       [[EXIT]]:
; GFX950-NEXT:    ret void
;
; GFX942-LABEL: define amdgpu_kernel void @phi5_rotate(
; GFX942-SAME: ptr addrspace(1) captures(none) [[OUT:%.*]], i32 [[N:%.*]], i16 [[S0:%.*]], i16 [[S1:%.*]], i16 [[S2:%.*]], i16 [[S3:%.*]], i16 [[S4:%.*]]) {
; GFX942-NEXT:  [[ENTRY:.*]]:
; GFX942-NEXT:    br label %[[LOOP:.*]]
; GFX942:       [[LOOP]]:
; GFX942-NEXT:    [[I:%.*]] = phi i32 [ 0, %[[ENTRY]] ], [ [[I_NEXT:%.*]], %[[LOOP]] ]
; GFX942-NEXT:    [[X0:%.*]] = phi i16 [ [[S0]], %[[ENTRY]] ], [ [[X4:%.*]], %[[LOOP]] ]
; GFX942-NEXT:    [[X1:%.*]] = phi i16 [ [[S1]], %[[ENTRY]] ], [ [[X0]], %[[LOOP]] ]
; GFX942-NEXT:    [[X2:%.*]] = phi i16 [ [[S2]], %[[ENTRY]] ], [ [[X1]], %[[LOOP]] ]
; GFX942-NEXT:    [[X3:%.*]] = phi i16 [ [[S3]], %[[ENTRY]] ], [ [[X2]], %[[LOOP]] ]
; GFX942-NEXT:    [[X4]] = phi i16 [ [[S4]], %[[ENTRY]] ], [ [[X3]], %[[LOOP]] ]
; GFX942-NEXT:    [[GEP0:%.*]] = getelementptr i16, ptr addrspace(1) [[OUT]], i32 [[I]]
; GFX942-NEXT:    [[TMP0:%.*]] = insertelement <2 x i16> poison, i16 [[X0]], i64 0
; GFX942-NEXT:    [[TMP1:%.*]] = insertelement <2 x i16> [[TMP0]], i16 [[X1]], i64 1
; GFX942-NEXT:    store <2 x i16> [[TMP1]], ptr addrspace(1) [[GEP0]], align 2
; GFX942-NEXT:    [[I_NEXT]] = add nuw i32 [[I]], 2
; GFX942-NEXT:    [[CMP:%.*]] = icmp ult i32 [[I_NEXT]], [[N]]
; GFX942-NEXT:    br i1 [[CMP]], label %[[LOOP]], label %[[EXIT:.*]]
; GFX942:       [[EXIT]]:
; GFX942-NEXT:    ret void
;
; GFX906-LABEL: define amdgpu_kernel void @phi5_rotate(
; GFX906-SAME: ptr addrspace(1) captures(none) [[OUT:%.*]], i32 [[N:%.*]], i16 [[S0:%.*]], i16 [[S1:%.*]], i16 [[S2:%.*]], i16 [[S3:%.*]], i16 [[S4:%.*]]) {
; GFX906-NEXT:  [[ENTRY:.*]]:
; GFX906-NEXT:    br label %[[LOOP:.*]]
; GFX906:       [[LOOP]]:
; GFX906-NEXT:    [[I:%.*]] = phi i32 [ 0, %[[ENTRY]] ], [ [[I_NEXT:%.*]], %[[LOOP]] ]
; GFX906-NEXT:    [[X0:%.*]] = phi i16 [ [[S0]], %[[ENTRY]] ], [ [[X4:%.*]], %[[LOOP]] ]
; GFX906-NEXT:    [[X1:%.*]] = phi i16 [ [[S1]], %[[ENTRY]] ], [ [[X0]], %[[LOOP]] ]
; GFX906-NEXT:    [[X2:%.*]] = phi i16 [ [[S2]], %[[ENTRY]] ], [ [[X1]], %[[LOOP]] ]
; GFX906-NEXT:    [[X3:%.*]] = phi i16 [ [[S3]], %[[ENTRY]] ], [ [[X2]], %[[LOOP]] ]
; GFX906-NEXT:    [[X4]] = phi i16 [ [[S4]], %[[ENTRY]] ], [ [[X3]], %[[LOOP]] ]
; GFX906-NEXT:    [[GEP0:%.*]] = getelementptr i16, ptr addrspace(1) [[OUT]], i32 [[I]]
; GFX906-NEXT:    store i16 [[X0]], ptr addrspace(1) [[GEP0]], align 2
; GFX906-NEXT:    [[I1:%.*]] = or disjoint i32 [[I]], 1
; GFX906-NEXT:    [[GEP1:%.*]] = getelementptr i16, ptr addrspace(1) [[OUT]], i32 [[I1]]
; GFX906-NEXT:    store i16 [[X1]], ptr addrspace(1) [[GEP1]], align 2
; GFX906-NEXT:    [[I_NEXT]] = add nuw i32 [[I]], 2
; GFX906-NEXT:    [[CMP:%.*]] = icmp ult i32 [[I_NEXT]], [[N]]
; GFX906-NEXT:    br i1 [[CMP]], label %[[LOOP]], label %[[EXIT:.*]]
; GFX906:       [[EXIT]]:
; GFX906-NEXT:    ret void
;
; GFX906NOCOUNT-LABEL: define amdgpu_kernel void @phi5_rotate(
; GFX906NOCOUNT-SAME: ptr addrspace(1) captures(none) [[OUT:%.*]], i32 [[N:%.*]], i16 [[S0:%.*]], i16 [[S1:%.*]], i16 [[S2:%.*]], i16 [[S3:%.*]], i16 [[S4:%.*]]) {
; GFX906NOCOUNT-NEXT:  [[ENTRY:.*]]:
; GFX906NOCOUNT-NEXT:    br label %[[LOOP:.*]]
; GFX906NOCOUNT:       [[LOOP]]:
; GFX906NOCOUNT-NEXT:    [[I:%.*]] = phi i32 [ 0, %[[ENTRY]] ], [ [[I_NEXT:%.*]], %[[LOOP]] ]
; GFX906NOCOUNT-NEXT:    [[X0:%.*]] = phi i16 [ [[S0]], %[[ENTRY]] ], [ [[X4:%.*]], %[[LOOP]] ]
; GFX906NOCOUNT-NEXT:    [[X1:%.*]] = phi i16 [ [[S1]], %[[ENTRY]] ], [ [[X0]], %[[LOOP]] ]
; GFX906NOCOUNT-NEXT:    [[X2:%.*]] = phi i16 [ [[S2]], %[[ENTRY]] ], [ [[X1]], %[[LOOP]] ]
; GFX906NOCOUNT-NEXT:    [[X3:%.*]] = phi i16 [ [[S3]], %[[ENTRY]] ], [ [[X2]], %[[LOOP]] ]
; GFX906NOCOUNT-NEXT:    [[X4]] = phi i16 [ [[S4]], %[[ENTRY]] ], [ [[X3]], %[[LOOP]] ]
; GFX906NOCOUNT-NEXT:    [[GEP0:%.*]] = getelementptr i16, ptr addrspace(1) [[OUT]], i32 [[I]]
; GFX906NOCOUNT-NEXT:    [[TMP0:%.*]] = insertelement <2 x i16> poison, i16 [[X0]], i64 0
; GFX906NOCOUNT-NEXT:    [[TMP1:%.*]] = insertelement <2 x i16> [[TMP0]], i16 [[X1]], i64 1
; GFX906NOCOUNT-NEXT:    store <2 x i16> [[TMP1]], ptr addrspace(1) [[GEP0]], align 2
; GFX906NOCOUNT-NEXT:    [[I_NEXT]] = add nuw i32 [[I]], 2
; GFX906NOCOUNT-NEXT:    [[CMP:%.*]] = icmp ult i32 [[I_NEXT]], [[N]]
; GFX906NOCOUNT-NEXT:    br i1 [[CMP]], label %[[LOOP]], label %[[EXIT:.*]]
; GFX906NOCOUNT:       [[EXIT]]:
; GFX906NOCOUNT-NEXT:    ret void
;
  ptr addrspace(1) nocapture %out,
  i32 %n,
  i16 %s0, i16 %s1, i16 %s2, i16 %s3, i16 %s4) {
entry:
  br label %loop

loop:
  %i   = phi i32 [ 0,   %entry ], [ %i.next, %loop ]
  %x0  = phi i16 [ %s0, %entry ], [ %x4,     %loop ]
  %x1  = phi i16 [ %s1, %entry ], [ %x0,     %loop ]
  %x2  = phi i16 [ %s2, %entry ], [ %x1,     %loop ]
  %x3  = phi i16 [ %s3, %entry ], [ %x2,     %loop ]
  %x4  = phi i16 [ %s4, %entry ], [ %x3,     %loop ]
  %gep0 = getelementptr i16, ptr addrspace(1) %out, i32 %i
  store i16 %x0, ptr addrspace(1) %gep0, align 2
  %i1   = or disjoint i32 %i, 1
  %gep1 = getelementptr i16, ptr addrspace(1) %out, i32 %i1
  store i16 %x1, ptr addrspace(1) %gep1, align 2
  %i.next = add nuw i32 %i, 2
  %cmp  = icmp ult i32 %i.next, %n
  br i1 %cmp, label %loop, label %exit

exit:
  ret void
}