| ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6 |
| ; RUN: opt -S < %s -p loop-vectorize | FileCheck %s |
| |
| target triple = "aarch64-unknown-linux-gnu" |
| |
| declare void @init_mem(ptr, i64) nofree |
| |
| define i64 @same_exit_block_pre_inc_use1() #1 { |
| ; CHECK-LABEL: define i64 @same_exit_block_pre_inc_use1( |
| ; CHECK-SAME: ) #[[ATTR1:[0-9]+]] { |
| ; CHECK-NEXT: [[ENTRY:.*]]: |
| ; CHECK-NEXT: [[P1:%.*]] = alloca [1024 x i8], align 4 |
| ; CHECK-NEXT: [[P2:%.*]] = alloca [1024 x i8], align 4 |
| ; CHECK-NEXT: call void @init_mem(ptr [[P1]], i64 1024) |
| ; CHECK-NEXT: call void @init_mem(ptr [[P2]], i64 1024) |
| ; CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() |
| ; CHECK-NEXT: [[TMP1:%.*]] = shl nuw i64 [[TMP0]], 4 |
| ; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 64, [[TMP1]] |
| ; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]] |
| ; CHECK: [[VECTOR_PH]]: |
| ; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 64, [[TMP1]] |
| ; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 64, [[N_MOD_VF]] |
| ; CHECK-NEXT: [[TMP3:%.*]] = add i64 3, [[N_VEC]] |
| ; CHECK-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; CHECK: [[VECTOR_BODY]]: |
| ; CHECK-NEXT: [[INDEX1:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT3:%.*]], %[[VECTOR_BODY_INTERIM:.*]] ] |
| ; CHECK-NEXT: [[TMP4:%.*]] = add i64 3, [[INDEX1]] |
| ; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds i8, ptr [[P1]], i64 [[TMP4]] |
| ; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <vscale x 16 x i8>, ptr [[TMP5]], align 1 |
| ; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds i8, ptr [[P2]], i64 [[TMP4]] |
| ; CHECK-NEXT: [[WIDE_LOAD2:%.*]] = load <vscale x 16 x i8>, ptr [[TMP6]], align 1 |
| ; CHECK-NEXT: [[TMP7:%.*]] = icmp ne <vscale x 16 x i8> [[WIDE_LOAD]], [[WIDE_LOAD2]] |
| ; CHECK-NEXT: [[TMP8:%.*]] = freeze <vscale x 16 x i1> [[TMP7]] |
| ; CHECK-NEXT: [[TMP9:%.*]] = call i1 @llvm.vector.reduce.or.nxv16i1(<vscale x 16 x i1> [[TMP8]]) |
| ; CHECK-NEXT: [[INDEX_NEXT3]] = add nuw i64 [[INDEX1]], [[TMP1]] |
| ; CHECK-NEXT: [[TMP10:%.*]] = icmp eq i64 [[INDEX_NEXT3]], [[N_VEC]] |
| ; CHECK-NEXT: br i1 [[TMP9]], label %[[VECTOR_EARLY_EXIT:.*]], label %[[VECTOR_BODY_INTERIM]] |
| ; CHECK: [[VECTOR_BODY_INTERIM]]: |
| ; CHECK-NEXT: br i1 [[TMP10]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]] |
| ; CHECK: [[MIDDLE_BLOCK]]: |
| ; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 64, [[N_VEC]] |
| ; CHECK-NEXT: br i1 [[CMP_N]], label %[[LOOP_END:.*]], label %[[SCALAR_PH]] |
| ; CHECK: [[VECTOR_EARLY_EXIT]]: |
| ; CHECK-NEXT: [[TMP11:%.*]] = call i64 @llvm.experimental.cttz.elts.i64.nxv16i1(<vscale x 16 x i1> [[TMP8]], i1 false) |
| ; CHECK-NEXT: [[TMP12:%.*]] = add i64 [[INDEX1]], [[TMP11]] |
| ; CHECK-NEXT: [[TMP13:%.*]] = add i64 3, [[TMP12]] |
| ; CHECK-NEXT: br label %[[LOOP_END]] |
| ; CHECK: [[SCALAR_PH]]: |
| ; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[TMP3]], %[[MIDDLE_BLOCK]] ], [ 3, %[[ENTRY]] ] |
| ; CHECK-NEXT: br label %[[LOOP:.*]] |
| ; CHECK: [[LOOP]]: |
| ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ [[INDEX_NEXT:%.*]], %[[LOOP_INC:.*]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ] |
| ; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[P1]], i64 [[INDEX]] |
| ; CHECK-NEXT: [[LD1:%.*]] = load i8, ptr [[ARRAYIDX]], align 1 |
| ; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i8, ptr [[P2]], i64 [[INDEX]] |
| ; CHECK-NEXT: [[LD2:%.*]] = load i8, ptr [[ARRAYIDX1]], align 1 |
| ; CHECK-NEXT: [[CMP3:%.*]] = icmp eq i8 [[LD1]], [[LD2]] |
| ; CHECK-NEXT: br i1 [[CMP3]], label %[[LOOP_INC]], label %[[LOOP_END]] |
| ; CHECK: [[LOOP_INC]]: |
| ; CHECK-NEXT: [[INDEX_NEXT]] = add i64 [[INDEX]], 1 |
| ; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDEX_NEXT]], 67 |
| ; CHECK-NEXT: br i1 [[EXITCOND]], label %[[LOOP]], label %[[LOOP_END]], !llvm.loop [[LOOP3:![0-9]+]] |
| ; CHECK: [[LOOP_END]]: |
| ; CHECK-NEXT: [[RETVAL:%.*]] = phi i64 [ [[INDEX]], %[[LOOP]] ], [ 67, %[[LOOP_INC]] ], [ 67, %[[MIDDLE_BLOCK]] ], [ [[TMP13]], %[[VECTOR_EARLY_EXIT]] ] |
| ; CHECK-NEXT: ret i64 [[RETVAL]] |
| ; |
| entry: |
| %p1 = alloca [1024 x i8] |
| %p2 = alloca [1024 x i8] |
| call void @init_mem(ptr %p1, i64 1024) |
| call void @init_mem(ptr %p2, i64 1024) |
| br label %loop |
| |
| loop: |
| %index = phi i64 [ %index.next, %loop.inc ], [ 3, %entry ] |
| %arrayidx = getelementptr inbounds i8, ptr %p1, i64 %index |
| %ld1 = load i8, ptr %arrayidx, align 1 |
| %arrayidx1 = getelementptr inbounds i8, ptr %p2, i64 %index |
| %ld2 = load i8, ptr %arrayidx1, align 1 |
| %cmp3 = icmp eq i8 %ld1, %ld2 |
| br i1 %cmp3, label %loop.inc, label %loop.end |
| |
| loop.inc: |
| %index.next = add i64 %index, 1 |
| %exitcond = icmp ne i64 %index.next, 67 |
| br i1 %exitcond, label %loop, label %loop.end |
| |
| loop.end: |
| %retval = phi i64 [ %index, %loop ], [ 67, %loop.inc ] |
| ret i64 %retval |
| } |
| |
| |
| ; In this example the early exit block appears in the list of ExitNotTaken |
| ; SCEVs, but is not computable. |
| define i64 @same_exit_block_pre_inc_use4() { |
| ; CHECK-LABEL: define i64 @same_exit_block_pre_inc_use4() { |
| ; CHECK-NEXT: [[ENTRY:.*:]] |
| ; CHECK-NEXT: [[P1:%.*]] = alloca [1024 x i64], align 8 |
| ; CHECK-NEXT: [[P2:%.*]] = alloca [1024 x i64], align 8 |
| ; CHECK-NEXT: call void @init_mem(ptr [[P1]], i64 1024) |
| ; CHECK-NEXT: call void @init_mem(ptr [[P2]], i64 1024) |
| ; CHECK-NEXT: br label %[[VECTOR_PH:.*]] |
| ; CHECK: [[VECTOR_PH]]: |
| ; CHECK-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; CHECK: [[VECTOR_BODY]]: |
| ; CHECK-NEXT: [[INDEX1:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT2:%.*]], %[[VECTOR_BODY_INTERIM:.*]] ] |
| ; CHECK-NEXT: [[VEC_IND:%.*]] = phi <2 x i64> [ <i64 3, i64 4>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY_INTERIM]] ] |
| ; CHECK-NEXT: [[TMP0:%.*]] = add i64 3, [[INDEX1]] |
| ; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds i64, ptr [[P1]], i64 [[TMP0]] |
| ; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i64>, ptr [[TMP1]], align 1 |
| ; CHECK-NEXT: [[TMP2:%.*]] = icmp uge <2 x i64> [[VEC_IND]], [[WIDE_LOAD]] |
| ; CHECK-NEXT: [[TMP3:%.*]] = freeze <2 x i1> [[TMP2]] |
| ; CHECK-NEXT: [[TMP4:%.*]] = call i1 @llvm.vector.reduce.or.v2i1(<2 x i1> [[TMP3]]) |
| ; CHECK-NEXT: [[INDEX_NEXT2]] = add nuw i64 [[INDEX1]], 2 |
| ; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT2]], 64 |
| ; CHECK-NEXT: [[VEC_IND_NEXT]] = add <2 x i64> [[VEC_IND]], splat (i64 2) |
| ; CHECK-NEXT: br i1 [[TMP4]], label %[[VECTOR_EARLY_EXIT:.*]], label %[[VECTOR_BODY_INTERIM]] |
| ; CHECK: [[VECTOR_BODY_INTERIM]]: |
| ; CHECK-NEXT: br i1 [[TMP5]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]] |
| ; CHECK: [[MIDDLE_BLOCK]]: |
| ; CHECK-NEXT: br label %[[LOOP_END:.*]] |
| ; CHECK: [[VECTOR_EARLY_EXIT]]: |
| ; CHECK-NEXT: [[TMP6:%.*]] = call i64 @llvm.experimental.cttz.elts.i64.v2i1(<2 x i1> [[TMP3]], i1 false) |
| ; CHECK-NEXT: [[TMP7:%.*]] = add i64 [[INDEX1]], [[TMP6]] |
| ; CHECK-NEXT: [[TMP8:%.*]] = add i64 3, [[TMP7]] |
| ; CHECK-NEXT: br label %[[LOOP_END]] |
| ; CHECK: [[LOOP_END]]: |
| ; CHECK-NEXT: [[RETVAL:%.*]] = phi i64 [ [[TMP8]], %[[VECTOR_EARLY_EXIT]] ], [ 67, %[[MIDDLE_BLOCK]] ] |
| ; CHECK-NEXT: ret i64 [[RETVAL]] |
| ; |
| entry: |
| %p1 = alloca [1024 x i64] |
| %p2 = alloca [1024 x i64] |
| call void @init_mem(ptr %p1, i64 1024) |
| call void @init_mem(ptr %p2, i64 1024) |
| br label %loop |
| |
| loop: |
| %index = phi i64 [ %index.next, %loop.inc ], [ 3, %entry ] |
| %arrayidx = getelementptr inbounds i64, ptr %p1, i64 %index |
| %ld1 = load i64, ptr %arrayidx, align 1 |
| %cmp3 = icmp ult i64 %index, %ld1 |
| br i1 %cmp3, label %loop.inc, label %loop.end |
| |
| loop.inc: |
| %index.next = add i64 %index, 1 |
| %exitcond = icmp ne i64 %index.next, 67 |
| br i1 %exitcond, label %loop, label %loop.end |
| |
| loop.end: |
| %retval = phi i64 [ %index, %loop ], [ 67, %loop.inc ] |
| ret i64 %retval |
| } |
| |
| |
| define i64 @loop_contains_safe_call() #1 { |
| ; CHECK-LABEL: define i64 @loop_contains_safe_call( |
| ; CHECK-SAME: ) #[[ATTR1]] { |
| ; CHECK-NEXT: [[ENTRY:.*:]] |
| ; CHECK-NEXT: [[P1:%.*]] = alloca [1024 x i8], align 4 |
| ; CHECK-NEXT: [[P2:%.*]] = alloca [1024 x i8], align 4 |
| ; CHECK-NEXT: call void @init_mem(ptr [[P1]], i64 1024) |
| ; CHECK-NEXT: call void @init_mem(ptr [[P2]], i64 1024) |
| ; CHECK-NEXT: br label %[[VECTOR_PH:.*]] |
| ; CHECK: [[VECTOR_PH]]: |
| ; CHECK-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; CHECK: [[VECTOR_BODY]]: |
| ; CHECK-NEXT: [[INDEX1:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT2:%.*]], %[[VECTOR_BODY_INTERIM:.*]] ] |
| ; CHECK-NEXT: [[TMP0:%.*]] = add i64 3, [[INDEX1]] |
| ; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds float, ptr [[P1]], i64 [[TMP0]] |
| ; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x float>, ptr [[TMP1]], align 1 |
| ; CHECK-NEXT: [[TMP2:%.*]] = call fast <4 x float> @llvm.sqrt.v4f32(<4 x float> [[WIDE_LOAD]]) |
| ; CHECK-NEXT: [[TMP3:%.*]] = fcmp fast oge <4 x float> [[TMP2]], splat (float 3.000000e+00) |
| ; CHECK-NEXT: [[TMP4:%.*]] = freeze <4 x i1> [[TMP3]] |
| ; CHECK-NEXT: [[TMP5:%.*]] = call i1 @llvm.vector.reduce.or.v4i1(<4 x i1> [[TMP4]]) |
| ; CHECK-NEXT: [[INDEX_NEXT2]] = add nuw i64 [[INDEX1]], 4 |
| ; CHECK-NEXT: [[TMP6:%.*]] = icmp eq i64 [[INDEX_NEXT2]], 64 |
| ; CHECK-NEXT: br i1 [[TMP5]], label %[[VECTOR_EARLY_EXIT:.*]], label %[[VECTOR_BODY_INTERIM]] |
| ; CHECK: [[VECTOR_BODY_INTERIM]]: |
| ; CHECK-NEXT: br i1 [[TMP6]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]] |
| ; CHECK: [[MIDDLE_BLOCK]]: |
| ; CHECK-NEXT: br label %[[LOOP_END:.*]] |
| ; CHECK: [[VECTOR_EARLY_EXIT]]: |
| ; CHECK-NEXT: [[TMP7:%.*]] = call i64 @llvm.experimental.cttz.elts.i64.v4i1(<4 x i1> [[TMP4]], i1 false) |
| ; CHECK-NEXT: [[TMP8:%.*]] = add i64 [[INDEX1]], [[TMP7]] |
| ; CHECK-NEXT: [[TMP9:%.*]] = add i64 3, [[TMP8]] |
| ; CHECK-NEXT: br label %[[LOOP_END]] |
| ; CHECK: [[LOOP_END]]: |
| ; CHECK-NEXT: [[RETVAL:%.*]] = phi i64 [ [[TMP9]], %[[VECTOR_EARLY_EXIT]] ], [ 67, %[[MIDDLE_BLOCK]] ] |
| ; CHECK-NEXT: ret i64 [[RETVAL]] |
| ; |
| entry: |
| %p1 = alloca [1024 x i8] |
| %p2 = alloca [1024 x i8] |
| call void @init_mem(ptr %p1, i64 1024) |
| call void @init_mem(ptr %p2, i64 1024) |
| br label %loop |
| |
| loop: |
| %index = phi i64 [ %index.next, %loop.inc ], [ 3, %entry ] |
| %arrayidx = getelementptr inbounds float, ptr %p1, i64 %index |
| %ld1 = load float, ptr %arrayidx, align 1 |
| %sqrt = tail call fast float @llvm.sqrt.f32(float %ld1) |
| %cmp = fcmp fast ult float %sqrt, 3.0e+00 |
| br i1 %cmp, label %loop.inc, label %loop.end |
| |
| loop.inc: |
| %index.next = add i64 %index, 1 |
| %exitcond = icmp ne i64 %index.next, 67 |
| br i1 %exitcond, label %loop, label %loop.end |
| |
| loop.end: |
| %retval = phi i64 [ %index, %loop ], [ 67, %loop.inc ] |
| ret i64 %retval |
| } |
| |
| |
| define i64 @loop_contains_safe_div() #1 { |
| ; CHECK-LABEL: define i64 @loop_contains_safe_div( |
| ; CHECK-SAME: ) #[[ATTR1]] { |
| ; CHECK-NEXT: [[ENTRY:.*:]] |
| ; CHECK-NEXT: [[P1:%.*]] = alloca [1024 x i8], align 4 |
| ; CHECK-NEXT: [[P2:%.*]] = alloca [1024 x i8], align 4 |
| ; CHECK-NEXT: call void @init_mem(ptr [[P1]], i64 1024) |
| ; CHECK-NEXT: call void @init_mem(ptr [[P2]], i64 1024) |
| ; CHECK-NEXT: br label %[[VECTOR_PH:.*]] |
| ; CHECK: [[VECTOR_PH]]: |
| ; CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() |
| ; CHECK-NEXT: [[TMP1:%.*]] = shl nuw i64 [[TMP0]], 2 |
| ; CHECK-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; CHECK: [[VECTOR_BODY]]: |
| ; CHECK-NEXT: [[INDEX1:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT2:%.*]], %[[VECTOR_BODY_INTERIM:.*]] ] |
| ; CHECK-NEXT: [[TMP2:%.*]] = add i64 3, [[INDEX1]] |
| ; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds i32, ptr [[P1]], i64 [[TMP2]] |
| ; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <vscale x 4 x i32>, ptr [[TMP3]], align 1 |
| ; CHECK-NEXT: [[TMP4:%.*]] = udiv <vscale x 4 x i32> [[WIDE_LOAD]], splat (i32 20000) |
| ; CHECK-NEXT: [[TMP5:%.*]] = icmp ne <vscale x 4 x i32> [[TMP4]], splat (i32 1) |
| ; CHECK-NEXT: [[TMP6:%.*]] = freeze <vscale x 4 x i1> [[TMP5]] |
| ; CHECK-NEXT: [[TMP7:%.*]] = call i1 @llvm.vector.reduce.or.nxv4i1(<vscale x 4 x i1> [[TMP6]]) |
| ; CHECK-NEXT: [[INDEX_NEXT2]] = add nuw i64 [[INDEX1]], [[TMP1]] |
| ; CHECK-NEXT: [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT2]], 64 |
| ; CHECK-NEXT: br i1 [[TMP7]], label %[[VECTOR_EARLY_EXIT:.*]], label %[[VECTOR_BODY_INTERIM]] |
| ; CHECK: [[VECTOR_BODY_INTERIM]]: |
| ; CHECK-NEXT: br i1 [[TMP8]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]] |
| ; CHECK: [[MIDDLE_BLOCK]]: |
| ; CHECK-NEXT: br label %[[LOOP_END:.*]] |
| ; CHECK: [[VECTOR_EARLY_EXIT]]: |
| ; CHECK-NEXT: [[TMP9:%.*]] = call i64 @llvm.experimental.cttz.elts.i64.nxv4i1(<vscale x 4 x i1> [[TMP6]], i1 false) |
| ; CHECK-NEXT: [[TMP10:%.*]] = add i64 [[INDEX1]], [[TMP9]] |
| ; CHECK-NEXT: [[TMP11:%.*]] = add i64 3, [[TMP10]] |
| ; CHECK-NEXT: br label %[[LOOP_END]] |
| ; CHECK: [[LOOP_END]]: |
| ; CHECK-NEXT: [[RETVAL:%.*]] = phi i64 [ [[TMP11]], %[[VECTOR_EARLY_EXIT]] ], [ 67, %[[MIDDLE_BLOCK]] ] |
| ; CHECK-NEXT: ret i64 [[RETVAL]] |
| ; |
| entry: |
| %p1 = alloca [1024 x i8] |
| %p2 = alloca [1024 x i8] |
| call void @init_mem(ptr %p1, i64 1024) |
| call void @init_mem(ptr %p2, i64 1024) |
| br label %loop |
| |
| loop: |
| %index = phi i64 [ %index.next, %loop.inc ], [ 3, %entry ] |
| %arrayidx = getelementptr inbounds i32, ptr %p1, i64 %index |
| %ld1 = load i32, ptr %arrayidx, align 1 |
| %div = udiv i32 %ld1, 20000 |
| %cmp = icmp eq i32 %div, 1 |
| br i1 %cmp, label %loop.inc, label %loop.end |
| |
| loop.inc: |
| %index.next = add i64 %index, 1 |
| %exitcond = icmp ne i64 %index.next, 67 |
| br i1 %exitcond, label %loop, label %loop.end |
| |
| loop.end: |
| %retval = phi i64 [ %index, %loop ], [ 67, %loop.inc ] |
| ret i64 %retval |
| } |
| |
| |
| define i64 @loop_contains_load_after_early_exit(ptr dereferenceable(1024) align(8) %p2) { |
| ; DEBUG-LABEL: LV: Checking a loop in 'loop_contains_load_after_early_exit' |
| ; DEBUG: LV: Found an early exit loop with symbolic max backedge taken count: 63 |
| ; DEBUG-NEXT: LV: We can vectorize this loop! |
| ; DEBUG-NEXT: LV: Not vectorizing: Auto-vectorization of loops with uncountable early exit is not yet supported. |
| ; CHECK-LABEL: define i64 @loop_contains_load_after_early_exit( |
| ; CHECK-SAME: ptr align 8 dereferenceable(1024) [[P2:%.*]]) { |
| ; CHECK-NEXT: [[ENTRY:.*:]] |
| ; CHECK-NEXT: [[P1:%.*]] = alloca [1024 x i8], align 4 |
| ; CHECK-NEXT: call void @init_mem(ptr [[P1]], i64 1024) |
| ; CHECK-NEXT: br label %[[VECTOR_PH:.*]] |
| ; CHECK: [[VECTOR_PH]]: |
| ; CHECK-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; CHECK: [[VECTOR_BODY]]: |
| ; CHECK-NEXT: [[INDEX1:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT3:%.*]], %[[VECTOR_BODY_INTERIM:.*]] ] |
| ; CHECK-NEXT: [[TMP0:%.*]] = add i64 3, [[INDEX1]] |
| ; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds i32, ptr [[P1]], i64 [[TMP0]] |
| ; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, ptr [[TMP1]], align 1 |
| ; CHECK-NEXT: [[TMP2:%.*]] = icmp ne <4 x i32> [[WIDE_LOAD]], splat (i32 1) |
| ; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds i64, ptr [[P2]], i64 [[TMP0]] |
| ; CHECK-NEXT: [[WIDE_LOAD2:%.*]] = load <4 x i64>, ptr [[TMP3]], align 8 |
| ; CHECK-NEXT: [[TMP4:%.*]] = freeze <4 x i1> [[TMP2]] |
| ; CHECK-NEXT: [[TMP5:%.*]] = call i1 @llvm.vector.reduce.or.v4i1(<4 x i1> [[TMP4]]) |
| ; CHECK-NEXT: [[INDEX_NEXT3]] = add nuw i64 [[INDEX1]], 4 |
| ; CHECK-NEXT: [[TMP6:%.*]] = icmp eq i64 [[INDEX_NEXT3]], 64 |
| ; CHECK-NEXT: br i1 [[TMP5]], label %[[VECTOR_EARLY_EXIT:.*]], label %[[VECTOR_BODY_INTERIM]] |
| ; CHECK: [[VECTOR_BODY_INTERIM]]: |
| ; CHECK-NEXT: br i1 [[TMP6]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP7:![0-9]+]] |
| ; CHECK: [[MIDDLE_BLOCK]]: |
| ; CHECK-NEXT: [[TMP7:%.*]] = extractelement <4 x i64> [[WIDE_LOAD2]], i64 3 |
| ; CHECK-NEXT: br label %[[LOOP_END:.*]] |
| ; CHECK: [[VECTOR_EARLY_EXIT]]: |
| ; CHECK-NEXT: [[TMP8:%.*]] = call i64 @llvm.experimental.cttz.elts.i64.v4i1(<4 x i1> [[TMP4]], i1 false) |
| ; CHECK-NEXT: [[TMP9:%.*]] = add i64 [[INDEX1]], [[TMP8]] |
| ; CHECK-NEXT: [[TMP10:%.*]] = add i64 3, [[TMP9]] |
| ; CHECK-NEXT: br label %[[LOOP_END]] |
| ; CHECK: [[LOOP_END]]: |
| ; CHECK-NEXT: [[RETVAL:%.*]] = phi i64 [ [[TMP10]], %[[VECTOR_EARLY_EXIT]] ], [ [[TMP7]], %[[MIDDLE_BLOCK]] ] |
| ; CHECK-NEXT: ret i64 [[RETVAL]] |
| ; |
| entry: |
| %p1 = alloca [1024 x i8] |
| call void @init_mem(ptr %p1, i64 1024) |
| br label %loop |
| |
| loop: |
| %index = phi i64 [ %index.next, %loop.inc ], [ 3, %entry ] |
| %arrayidx = getelementptr inbounds i32, ptr %p1, i64 %index |
| %ld1 = load i32, ptr %arrayidx, align 1 |
| %cmp = icmp eq i32 %ld1, 1 |
| br i1 %cmp, label %loop.inc, label %loop.end |
| |
| loop.inc: |
| %arrayidx2 = getelementptr inbounds i64, ptr %p2, i64 %index |
| %ld2 = load i64, ptr %arrayidx2, align 8 |
| %index.next = add i64 %index, 1 |
| %exitcond = icmp ne i64 %index.next, 67 |
| br i1 %exitcond, label %loop, label %loop.end |
| |
| loop.end: |
| %retval = phi i64 [ %index, %loop ], [ %ld2, %loop.inc ] |
| ret i64 %retval |
| } |
| |
| |
| ; The form of the induction variables requires SCEV predicates. |
| define i32 @diff_exit_block_needs_scev_check(i32 %end) { |
| ; DEBUG-LABEL: LV: Checking a loop in 'diff_exit_block_needs_scev_check' |
| ; DEBUG: Found an early exit loop with symbolic max backedge taken count: (-1 + (1 umax (zext i10 (trunc i32 %end to i10) to i32)))<nsw> |
| ; DEBUG-NEXT: LV: We can vectorize this loop! |
| ; DEBUG-NEXT: LV: Not vectorizing: Auto-vectorization of loops with uncountable early exit is not yet supported. |
| ; CHECK-LABEL: define i32 @diff_exit_block_needs_scev_check( |
| ; CHECK-SAME: i32 [[END:%.*]]) { |
| ; CHECK-NEXT: [[ENTRY:.*]]: |
| ; CHECK-NEXT: [[P1:%.*]] = alloca [1024 x i32], align 4 |
| ; CHECK-NEXT: [[P2:%.*]] = alloca [1024 x i32], align 4 |
| ; CHECK-NEXT: call void @init_mem(ptr [[P1]], i64 1024) |
| ; CHECK-NEXT: call void @init_mem(ptr [[P2]], i64 1024) |
| ; CHECK-NEXT: [[END_CLAMPED:%.*]] = and i32 [[END]], 1023 |
| ; CHECK-NEXT: [[TMP0:%.*]] = trunc i32 [[END]] to i10 |
| ; CHECK-NEXT: [[TMP1:%.*]] = zext i10 [[TMP0]] to i64 |
| ; CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.umax.i64(i64 [[TMP1]], i64 1) |
| ; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP2]], 8 |
| ; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_SCEVCHECK:.*]] |
| ; CHECK: [[VECTOR_SCEVCHECK]]: |
| ; CHECK-NEXT: [[TMP3:%.*]] = call i32 @llvm.usub.sat.i32(i32 [[END_CLAMPED]], i32 1) |
| ; CHECK-NEXT: [[TMP4:%.*]] = trunc i32 [[TMP3]] to i8 |
| ; CHECK-NEXT: [[TMP5:%.*]] = add i8 1, [[TMP4]] |
| ; CHECK-NEXT: [[TMP6:%.*]] = icmp ult i8 [[TMP5]], 1 |
| ; CHECK-NEXT: [[TMP7:%.*]] = icmp ugt i32 [[TMP3]], 255 |
| ; CHECK-NEXT: [[TMP8:%.*]] = or i1 [[TMP6]], [[TMP7]] |
| ; CHECK-NEXT: br i1 [[TMP8]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]] |
| ; CHECK: [[VECTOR_PH]]: |
| ; CHECK-NEXT: [[N_MOD_VF:%.*]] = and i64 [[TMP2]], 3 |
| ; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP2]], [[N_MOD_VF]] |
| ; CHECK-NEXT: [[TMP9:%.*]] = trunc i64 [[N_VEC]] to i8 |
| ; CHECK-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; CHECK: [[VECTOR_BODY]]: |
| ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY_INTERIM:.*]] ] |
| ; CHECK-NEXT: [[TMP10:%.*]] = getelementptr inbounds i32, ptr [[P1]], i64 [[INDEX]] |
| ; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, ptr [[TMP10]], align 4 |
| ; CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds i32, ptr [[P2]], i64 [[INDEX]] |
| ; CHECK-NEXT: [[WIDE_LOAD1:%.*]] = load <4 x i32>, ptr [[TMP11]], align 4 |
| ; CHECK-NEXT: [[TMP12:%.*]] = icmp eq <4 x i32> [[WIDE_LOAD]], [[WIDE_LOAD1]] |
| ; CHECK-NEXT: [[TMP13:%.*]] = freeze <4 x i1> [[TMP12]] |
| ; CHECK-NEXT: [[TMP14:%.*]] = call i1 @llvm.vector.reduce.or.v4i1(<4 x i1> [[TMP13]]) |
| ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4 |
| ; CHECK-NEXT: [[TMP15:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] |
| ; CHECK-NEXT: br i1 [[TMP14]], label %[[VECTOR_EARLY_EXIT:.*]], label %[[VECTOR_BODY_INTERIM]] |
| ; CHECK: [[VECTOR_BODY_INTERIM]]: |
| ; CHECK-NEXT: br i1 [[TMP15]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]] |
| ; CHECK: [[MIDDLE_BLOCK]]: |
| ; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP2]], [[N_VEC]] |
| ; CHECK-NEXT: br i1 [[CMP_N]], label %[[EXIT:.*]], label %[[SCALAR_PH]] |
| ; CHECK: [[VECTOR_EARLY_EXIT]]: |
| ; CHECK-NEXT: br label %[[FOUND:.*]] |
| ; CHECK: [[SCALAR_PH]]: |
| ; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i8 [ [[TMP9]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ], [ 0, %[[VECTOR_SCEVCHECK]] ] |
| ; CHECK-NEXT: [[BC_RESUME_VAL2:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ], [ 0, %[[VECTOR_SCEVCHECK]] ] |
| ; CHECK-NEXT: br label %[[FOR_BODY:.*]] |
| ; CHECK: [[FOR_BODY]]: |
| ; CHECK-NEXT: [[IND:%.*]] = phi i8 [ [[IND_NEXT:%.*]], %[[FOR_INC:.*]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ] |
| ; CHECK-NEXT: [[GEP_IND:%.*]] = phi i64 [ [[GEP_IND_NEXT:%.*]], %[[FOR_INC]] ], [ [[BC_RESUME_VAL2]], %[[SCALAR_PH]] ] |
| ; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, ptr [[P1]], i64 [[GEP_IND]] |
| ; CHECK-NEXT: [[TMP16:%.*]] = load i32, ptr [[ARRAYIDX1]], align 4 |
| ; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i32, ptr [[P2]], i64 [[GEP_IND]] |
| ; CHECK-NEXT: [[TMP17:%.*]] = load i32, ptr [[ARRAYIDX2]], align 4 |
| ; CHECK-NEXT: [[CMP_EARLY:%.*]] = icmp eq i32 [[TMP16]], [[TMP17]] |
| ; CHECK-NEXT: br i1 [[CMP_EARLY]], label %[[FOUND]], label %[[FOR_INC]] |
| ; CHECK: [[FOR_INC]]: |
| ; CHECK-NEXT: [[IND_NEXT]] = add i8 [[IND]], 1 |
| ; CHECK-NEXT: [[CONV:%.*]] = zext i8 [[IND_NEXT]] to i32 |
| ; CHECK-NEXT: [[GEP_IND_NEXT]] = add i64 [[GEP_IND]], 1 |
| ; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[CONV]], [[END_CLAMPED]] |
| ; CHECK-NEXT: br i1 [[CMP]], label %[[FOR_BODY]], label %[[EXIT]], !llvm.loop [[LOOP9:![0-9]+]] |
| ; CHECK: [[FOUND]]: |
| ; CHECK-NEXT: ret i32 1 |
| ; CHECK: [[EXIT]]: |
| ; CHECK-NEXT: ret i32 0 |
| ; |
| entry: |
| %p1 = alloca [1024 x i32] |
| %p2 = alloca [1024 x i32] |
| call void @init_mem(ptr %p1, i64 1024) |
| call void @init_mem(ptr %p2, i64 1024) |
| %end.clamped = and i32 %end, 1023 |
| br label %for.body |
| |
| for.body: |
| %ind = phi i8 [ %ind.next, %for.inc ], [ 0, %entry ] |
| %gep.ind = phi i64 [ %gep.ind.next, %for.inc ], [ 0, %entry ] |
| %arrayidx1 = getelementptr inbounds i32, ptr %p1, i64 %gep.ind |
| %0 = load i32, ptr %arrayidx1, align 4 |
| %arrayidx2 = getelementptr inbounds i32, ptr %p2, i64 %gep.ind |
| %1 = load i32, ptr %arrayidx2, align 4 |
| %cmp.early = icmp eq i32 %0, %1 |
| br i1 %cmp.early, label %found, label %for.inc |
| |
| for.inc: |
| %ind.next = add i8 %ind, 1 |
| %conv = zext i8 %ind.next to i32 |
| %gep.ind.next = add i64 %gep.ind, 1 |
| %cmp = icmp ult i32 %conv, %end.clamped |
| br i1 %cmp, label %for.body, label %exit |
| |
| found: |
| ret i32 1 |
| |
| exit: |
| ret i32 0 |
| } |
| |
| %my.struct = type { i8, i8 } |
| |
| define i64 @same_exit_block_requires_interleaving() { |
| ; CHECK-LABEL: define i64 @same_exit_block_requires_interleaving() { |
| ; CHECK-NEXT: [[ENTRY:.*]]: |
| ; CHECK-NEXT: [[P1:%.*]] = alloca [128 x [[MY_STRUCT:%.*]]], align 8 |
| ; CHECK-NEXT: call void @init_mem(ptr [[P1]], i64 256) |
| ; CHECK-NEXT: br label %[[LOOP:.*]] |
| ; CHECK: [[LOOP]]: |
| ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ [[INDEX_NEXT:%.*]], %[[LOOP_LATCH:.*]] ], [ 3, %[[ENTRY]] ] |
| ; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [128 x [[MY_STRUCT]]], ptr [[P1]], i64 0, i64 [[INDEX]] |
| ; CHECK-NEXT: [[LD1:%.*]] = load i8, ptr [[ARRAYIDX]], align 1 |
| ; CHECK-NEXT: [[CMP3:%.*]] = icmp eq i8 [[LD1]], 3 |
| ; CHECK-NEXT: br i1 [[CMP3]], label %[[LOOP_LATCH]], label %[[LOOP_END:.*]] |
| ; CHECK: [[LOOP_LATCH]]: |
| ; CHECK-NEXT: [[INDEX_NEXT]] = add i64 [[INDEX]], 1 |
| ; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDEX_NEXT]], 69 |
| ; CHECK-NEXT: br i1 [[EXITCOND]], label %[[LOOP]], label %[[LOOP_END]] |
| ; CHECK: [[LOOP_END]]: |
| ; CHECK-NEXT: [[RETVAL:%.*]] = phi i64 [ 0, %[[LOOP_LATCH]] ], [ 1, %[[LOOP]] ] |
| ; CHECK-NEXT: ret i64 [[RETVAL]] |
| ; |
| entry: |
| %p1 = alloca [128 x %my.struct] |
| call void @init_mem(ptr %p1, i64 256) |
| br label %loop |
| |
| loop: |
| %index = phi i64 [ %index.next, %loop.latch ], [ 3, %entry ] |
| %arrayidx = getelementptr inbounds [128 x %my.struct], ptr %p1, i64 0, i64 %index |
| %ld1 = load i8, ptr %arrayidx, align 1 |
| %cmp3 = icmp eq i8 %ld1, 3 |
| br i1 %cmp3, label %loop.latch, label %loop.end |
| |
| loop.latch: |
| %index.next = add i64 %index, 1 |
| %exitcond = icmp ne i64 %index.next, 69 |
| br i1 %exitcond, label %loop, label %loop.end |
| |
| loop.end: |
| %retval = phi i64 [ 0, %loop.latch ], [ 1, %loop ] |
| ret i64 %retval |
| } |
| |
| declare i32 @foo(i32) readonly |
| declare <vscale x 4 x i32> @foo_vec(<vscale x 4 x i32>) |
| |
| attributes #0 = { "vector-function-abi-variant"="_ZGVsNxv_foo(foo_vec)" } |
| attributes #1 = { "target-features"="+sve" vscale_range(1,16) } |
| ;. |
| ; CHECK: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]} |
| ; CHECK: [[META1]] = !{!"llvm.loop.isvectorized", i32 1} |
| ; CHECK: [[META2]] = !{!"llvm.loop.unroll.runtime.disable"} |
| ; CHECK: [[LOOP3]] = distinct !{[[LOOP3]], [[META2]], [[META1]]} |
| ; CHECK: [[LOOP4]] = distinct !{[[LOOP4]], [[META1]], [[META2]]} |
| ; CHECK: [[LOOP5]] = distinct !{[[LOOP5]], [[META1]], [[META2]]} |
| ; CHECK: [[LOOP6]] = distinct !{[[LOOP6]], [[META1]], [[META2]]} |
| ; CHECK: [[LOOP7]] = distinct !{[[LOOP7]], [[META1]], [[META2]]} |
| ; CHECK: [[LOOP8]] = distinct !{[[LOOP8]], [[META1]], [[META2]]} |
| ; CHECK: [[LOOP9]] = distinct !{[[LOOP9]], [[META1]]} |
| ;. |
