llvm/test/Transforms/DFAJumpThreading/single-block-defs.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
; RUN: opt -S -passes=dfa-jump-threading %s | FileCheck %s

define i64 @multiple-phi-def() {
; CHECK-LABEL: define i64 @multiple-phi-def() {
; CHECK-NEXT:  [[ENTRY:.*]]:
; CHECK-NEXT:    br label %[[LBL_ENTRY:.*]]
; CHECK:       [[LBL_ENTRY]]:
; CHECK-NEXT:    [[PHI3:%.*]] = phi i16 [ 0, %[[ENTRY]] ], [ [[PHI1:%.*]], %[[CASE2:.*]] ]
; CHECK-NEXT:    br i1 true, label %[[THEN:.*]], label %[[SWITCH_BB:.*]]
; CHECK:       [[THEN]]:
; CHECK-NEXT:    br label %[[CASE2]]
; CHECK:       [[CASE2]]:
; CHECK-NEXT:    [[PHI1]] = phi i16 [ 0, %[[THEN]] ], [ 0, %[[SWITCH_BB]] ]
; CHECK-NEXT:    [[PHI2:%.*]] = phi i16 [ 1, %[[THEN]] ], [ 0, %[[SWITCH_BB]] ]
; CHECK-NEXT:    br i1 true, label %[[SWITCH_BB]], label %[[LBL_ENTRY]]
; CHECK:       [[SWITCH_BB]]:
; CHECK-NEXT:    [[PHI_OF_SWITCH:%.*]] = phi i16 [ [[PHI3]], %[[LBL_ENTRY]] ], [ [[PHI2]], %[[CASE2]] ]
; CHECK-NEXT:    switch i16 [[PHI_OF_SWITCH]], label %[[DEFAULT_BB:.*]] [
; CHECK-NEXT:      i16 1, label %[[CASE1:.*]]
; CHECK-NEXT:      i16 2, label %[[CASE2]]
; CHECK-NEXT:    ]
; CHECK:       [[CASE1]]:
; CHECK-NEXT:    ret i64 1
; CHECK:       [[DEFAULT_BB]]:
; CHECK-NEXT:    ret i64 0
;
entry:
  br label %lbl_entry

lbl_entry:                                        ; preds = %case2, %entry
  %phi3 = phi i16 [ 0, %entry ], [ %phi1, %case2 ]
  br i1 true, label %then, label %switch_bb

then:                                 ; preds = %lbl_entry
  br label %case2

case2:                                    ; preds = %switch_bb, %then
  %phi1 = phi i16 [ 0, %then ], [ 0, %switch_bb ]
  %phi2 = phi i16 [ 1, %then ], [ 0, %switch_bb ]
  br i1 true, label %switch_bb, label %lbl_entry

switch_bb:                                     ; preds = %case2, %lbl_entry
  %phi_of_switch = phi i16 [ %phi3, %lbl_entry ], [ %phi2, %case2 ]
  switch i16 %phi_of_switch, label %default_bb [
  i16 1, label %case1
  i16 2, label %case2
  ]

case1:                                         ; preds = %switch_bb
  ret i64 1

default_bb:                ; preds = %switch_bb
  ret i64 0
}