llvm/test/Transforms/CodeGenPrepare/X86/split-store-alignment.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -passes='require<profile-summary>,function(codegenprepare)' -mtriple=x86_64-unknown-unknown -force-split-store -S < %s | FileCheck %s

target datalayout = "e-m:x-p:32:32-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:32-n8:16:32-a:0:32-S32"
target triple = "i686-w64-windows-gnu"

define void @split_store_align1(float %x, ptr %p) {
; CHECK-LABEL: @split_store_align1(
; CHECK-NEXT:    [[B:%.*]] = bitcast float [[X:%.*]] to i32
; CHECK-NEXT:    [[Z:%.*]] = zext i32 0 to i64
; CHECK-NEXT:    [[S:%.*]] = shl nuw nsw i64 [[Z]], 32
; CHECK-NEXT:    [[Z2:%.*]] = zext i32 [[B]] to i64
; CHECK-NEXT:    [[O:%.*]] = or i64 [[S]], [[Z2]]
; CHECK-NEXT:    store i32 [[B]], ptr [[P:%.*]], align 1
; CHECK-NEXT:    [[TMP3:%.*]] = getelementptr i32, ptr [[P]], i32 1
; CHECK-NEXT:    store i32 0, ptr [[TMP3]], align 1
; CHECK-NEXT:    ret void
;
  %b = bitcast float %x to i32
  %z = zext i32 0 to i64
  %s = shl nuw nsw i64 %z, 32
  %z2 = zext i32 %b to i64
  %o = or i64 %s, %z2
  store i64 %o, ptr %p, align 1
  ret void
}

define void @split_store_align2(float %x, ptr %p) {
; CHECK-LABEL: @split_store_align2(
; CHECK-NEXT:    [[B:%.*]] = bitcast float [[X:%.*]] to i32
; CHECK-NEXT:    [[Z:%.*]] = zext i32 0 to i64
; CHECK-NEXT:    [[S:%.*]] = shl nuw nsw i64 [[Z]], 32
; CHECK-NEXT:    [[Z2:%.*]] = zext i32 [[B]] to i64
; CHECK-NEXT:    [[O:%.*]] = or i64 [[S]], [[Z2]]
; CHECK-NEXT:    store i32 [[B]], ptr [[P:%.*]], align 2
; CHECK-NEXT:    [[TMP3:%.*]] = getelementptr i32, ptr [[P]], i32 1
; CHECK-NEXT:    store i32 0, ptr [[TMP3]], align 2
; CHECK-NEXT:    ret void
;
  %b = bitcast float %x to i32
  %z = zext i32 0 to i64
  %s = shl nuw nsw i64 %z, 32
  %z2 = zext i32 %b to i64
  %o = or i64 %s, %z2
  store i64 %o, ptr %p, align 2
  ret void
}

define void @split_store_align8(float %x, ptr %p) {
; CHECK-LABEL: @split_store_align8(
; CHECK-NEXT:    [[B:%.*]] = bitcast float [[X:%.*]] to i32
; CHECK-NEXT:    [[Z:%.*]] = zext i32 0 to i64
; CHECK-NEXT:    [[S:%.*]] = shl nuw nsw i64 [[Z]], 32
; CHECK-NEXT:    [[Z2:%.*]] = zext i32 [[B]] to i64
; CHECK-NEXT:    [[O:%.*]] = or i64 [[S]], [[Z2]]
; CHECK-NEXT:    store i32 [[B]], ptr [[P:%.*]], align 8
; CHECK-NEXT:    [[TMP3:%.*]] = getelementptr i32, ptr [[P]], i32 1
; CHECK-NEXT:    store i32 0, ptr [[TMP3]], align 4
; CHECK-NEXT:    ret void
;
  %b = bitcast float %x to i32
  %z = zext i32 0 to i64
  %s = shl nuw nsw i64 %z, 32
  %z2 = zext i32 %b to i64
  %o = or i64 %s, %z2
  store i64 %o, ptr %p, align 8
  ret void
}

; Atomic and volatile stores are observable and must not be split.

define void @atomic_store_no_split(ptr %p, i32 %lo, float %hi) {
; CHECK-LABEL: @atomic_store_no_split(
; CHECK-NEXT:    [[HI_I:%.*]] = bitcast float [[HI:%.*]] to i32
; CHECK-NEXT:    [[LO64:%.*]] = zext i32 [[LO:%.*]] to i64
; CHECK-NEXT:    [[HI64:%.*]] = zext i32 [[HI_I]] to i64
; CHECK-NEXT:    [[HISHL:%.*]] = shl i64 [[HI64]], 32
; CHECK-NEXT:    [[MERGED:%.*]] = or i64 [[LO64]], [[HISHL]]
; CHECK-NEXT:    store atomic i64 [[MERGED]], ptr [[P:%.*]] seq_cst, align 8
; CHECK-NEXT:    ret void
;
  %hi_i = bitcast float %hi to i32
  %lo64 = zext i32 %lo to i64
  %hi64 = zext i32 %hi_i to i64
  %hishl = shl i64 %hi64, 32
  %merged = or i64 %lo64, %hishl
  store atomic i64 %merged, ptr %p seq_cst, align 8
  ret void
}

define void @atomic_store_unordered_no_split(ptr %p, i32 %lo, float %hi) {
; CHECK-LABEL: @atomic_store_unordered_no_split(
; CHECK-NEXT:    [[HI_I:%.*]] = bitcast float [[HI:%.*]] to i32
; CHECK-NEXT:    [[LO64:%.*]] = zext i32 [[LO:%.*]] to i64
; CHECK-NEXT:    [[HI64:%.*]] = zext i32 [[HI_I]] to i64
; CHECK-NEXT:    [[HISHL:%.*]] = shl i64 [[HI64]], 32
; CHECK-NEXT:    [[MERGED:%.*]] = or i64 [[LO64]], [[HISHL]]
; CHECK-NEXT:    store atomic i64 [[MERGED]], ptr [[P:%.*]] unordered, align 8
; CHECK-NEXT:    ret void
;
  %hi_i = bitcast float %hi to i32
  %lo64 = zext i32 %lo to i64
  %hi64 = zext i32 %hi_i to i64
  %hishl = shl i64 %hi64, 32
  %merged = or i64 %lo64, %hishl
  store atomic i64 %merged, ptr %p unordered, align 8
  ret void
}

define void @volatile_store_no_split(ptr %p, i32 %lo, float %hi) {
; CHECK-LABEL: @volatile_store_no_split(
; CHECK-NEXT:    [[HI_I:%.*]] = bitcast float [[HI:%.*]] to i32
; CHECK-NEXT:    [[LO64:%.*]] = zext i32 [[LO:%.*]] to i64
; CHECK-NEXT:    [[HI64:%.*]] = zext i32 [[HI_I]] to i64
; CHECK-NEXT:    [[HISHL:%.*]] = shl i64 [[HI64]], 32
; CHECK-NEXT:    [[MERGED:%.*]] = or i64 [[LO64]], [[HISHL]]
; CHECK-NEXT:    store volatile i64 [[MERGED]], ptr [[P:%.*]], align 8
; CHECK-NEXT:    ret void
;
  %hi_i = bitcast float %hi to i32
  %lo64 = zext i32 %lo to i64
  %hi64 = zext i32 %hi_i to i64
  %hishl = shl i64 %hi64, 32
  %merged = or i64 %lo64, %hishl
  store volatile i64 %merged, ptr %p, align 8
  ret void
}