blob: a78887d36cb780781646c2ad6a123211d22b8bc1 [file]
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
define half @test_bitextract_half_full(b16 %src) {
; CHECK-LABEL: test_bitextract_half_full:
; CHECK: # %bb.0:
; CHECK-NEXT: pinsrw $0, %edi, %xmm0
; CHECK-NEXT: retq
%result = bitextract half, b16 %src, i32 0
ret half %result
}
define float @test_bitextract_float_full(b32 %src) {
; CHECK-LABEL: test_bitextract_float_full:
; CHECK: # %bb.0:
; CHECK-NEXT: movd %edi, %xmm0
; CHECK-NEXT: retq
%result = bitextract float, b32 %src, i32 0
ret float %result
}
define float @test_bitextract_float_const(b64 %src) {
; CHECK-LABEL: test_bitextract_float_const:
; CHECK: # %bb.0:
; CHECK-NEXT: shrq $32, %rdi
; CHECK-NEXT: movd %edi, %xmm0
; CHECK-NEXT: retq
%result = bitextract float, b64 %src, i32 32
ret float %result
}
define float @test_bitextract_float_var(b64 %src, i32 %off) {
; CHECK-LABEL: test_bitextract_float_var:
; CHECK: # %bb.0:
; CHECK-NEXT: movl %esi, %ecx
; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
; CHECK-NEXT: shrq %cl, %rdi
; CHECK-NEXT: movd %edi, %xmm0
; CHECK-NEXT: retq
%result = bitextract float, b64 %src, i32 %off
ret float %result
}
define float @test_bitextract_float_b87_var(b87 %src, i32 %off) {
; CHECK-LABEL: test_bitextract_float_b87_var:
; CHECK: # %bb.0:
; CHECK-NEXT: movl %edx, %ecx
; CHECK-NEXT: andl $8388607, %esi # imm = 0x7FFFFF
; CHECK-NEXT: shrdq %cl, %rsi, %rdi
; CHECK-NEXT: shrq %cl, %rsi
; CHECK-NEXT: testb $64, %cl
; CHECK-NEXT: cmoveq %rdi, %rsi
; CHECK-NEXT: movd %esi, %xmm0
; CHECK-NEXT: retq
%result = bitextract float, b87 %src, i32 %off
ret float %result
}
define float @test_bitextract_float_b87_crossword(b87 %src) {
; CHECK-LABEL: test_bitextract_float_b87_crossword:
; CHECK: # %bb.0:
; CHECK-NEXT: shrdq $55, %rsi, %rdi
; CHECK-NEXT: movd %edi, %xmm0
; CHECK-NEXT: retq
%result = bitextract float, b87 %src, i32 55
ret float %result
}
define double @test_bitextract_double_full(b64 %src) {
; CHECK-LABEL: test_bitextract_double_full:
; CHECK: # %bb.0:
; CHECK-NEXT: movq %rdi, %xmm0
; CHECK-NEXT: retq
%result = bitextract double, b64 %src, i32 0
ret double %result
}
define double @test_bitextract_double_const(b128 %src) {
; CHECK-LABEL: test_bitextract_double_const:
; CHECK: # %bb.0:
; CHECK-NEXT: movq %rsi, %xmm0
; CHECK-NEXT: retq
%result = bitextract double, b128 %src, i32 64
ret double %result
}
define double @test_bitextract_double_var(b128 %src, i32 %off) {
; CHECK-LABEL: test_bitextract_double_var:
; CHECK: # %bb.0:
; CHECK-NEXT: movl %edx, %ecx
; CHECK-NEXT: shrdq %cl, %rsi, %rdi
; CHECK-NEXT: shrq %cl, %rsi
; CHECK-NEXT: testb $64, %cl
; CHECK-NEXT: cmoveq %rdi, %rsi
; CHECK-NEXT: movq %rsi, %xmm0
; CHECK-NEXT: retq
%result = bitextract double, b128 %src, i32 %off
ret double %result
}
define double @test_bitextract_double_b231_var(b231 %src, i32 %off) {
; CHECK-LABEL: test_bitextract_double_b231_var:
; CHECK: # %bb.0:
; CHECK-NEXT: movabsq $549755813887, %rax # imm = 0x7FFFFFFFFF
; CHECK-NEXT: andq %rcx, %rax
; CHECK-NEXT: xorps %xmm0, %xmm0
; CHECK-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp)
; CHECK-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp)
; CHECK-NEXT: movq %rdx, -{{[0-9]+}}(%rsp)
; CHECK-NEXT: movq %rsi, -{{[0-9]+}}(%rsp)
; CHECK-NEXT: movq %rdi, -{{[0-9]+}}(%rsp)
; CHECK-NEXT: movq %rax, -{{[0-9]+}}(%rsp)
; CHECK-NEXT: movl %r8d, %eax
; CHECK-NEXT: shrb $6, %al
; CHECK-NEXT: movzbl %al, %eax
; CHECK-NEXT: movq -72(%rsp,%rax,8), %rdx
; CHECK-NEXT: movq -64(%rsp,%rax,8), %rax
; CHECK-NEXT: movl %r8d, %ecx
; CHECK-NEXT: shrdq %cl, %rax, %rdx
; CHECK-NEXT: movq %rdx, %xmm0
; CHECK-NEXT: retq
%result = bitextract double, b231 %src, i32 %off
ret double %result
}
define b16 @test_bitinsert_half_full(b16 %base, half %val) {
; CHECK-LABEL: test_bitinsert_half_full:
; CHECK: # %bb.0:
; CHECK-NEXT: pextrw $0, %xmm0, %eax
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq
%result = bitinsert b16 %base, half %val, i32 0
ret b16 %result
}
define b32 @test_bitinsert_half_var(b32 %base, half %val, i32 %off) {
; CHECK-LABEL: test_bitinsert_half_var:
; CHECK: # %bb.0:
; CHECK-NEXT: movl %esi, %ecx
; CHECK-NEXT: pextrw $0, %xmm0, %eax
; CHECK-NEXT: movl $65535, %edx # imm = 0xFFFF
; CHECK-NEXT: shll %cl, %edx
; CHECK-NEXT: notl %edx
; CHECK-NEXT: andl %edi, %edx
; CHECK-NEXT: movzwl %ax, %eax
; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
; CHECK-NEXT: shll %cl, %eax
; CHECK-NEXT: orl %edx, %eax
; CHECK-NEXT: retq
%result = bitinsert b32 %base, half %val, i32 %off
ret b32 %result
}
define b32 @test_bitinsert_float_full(b32 %base, float %val) {
; CHECK-LABEL: test_bitinsert_float_full:
; CHECK: # %bb.0:
; CHECK-NEXT: movd %xmm0, %eax
; CHECK-NEXT: retq
%result = bitinsert b32 %base, float %val, i32 0
ret b32 %result
}
define b64 @test_bitinsert_float_const(b64 %base, float %val) {
; CHECK-LABEL: test_bitinsert_float_const:
; CHECK: # %bb.0:
; CHECK-NEXT: movd %xmm0, %ecx
; CHECK-NEXT: shlq $32, %rcx
; CHECK-NEXT: movl %edi, %eax
; CHECK-NEXT: orq %rcx, %rax
; CHECK-NEXT: retq
%result = bitinsert b64 %base, float %val, i32 32
ret b64 %result
}
define b64 @test_bitinsert_float_var(b64 %base, float %val, i32 %off) {
; CHECK-LABEL: test_bitinsert_float_var:
; CHECK: # %bb.0:
; CHECK-NEXT: movl %esi, %ecx
; CHECK-NEXT: movd %xmm0, %edx
; CHECK-NEXT: shlq %cl, %rdx
; CHECK-NEXT: movl $4294967295, %eax # imm = 0xFFFFFFFF
; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
; CHECK-NEXT: shlq %cl, %rax
; CHECK-NEXT: notq %rax
; CHECK-NEXT: andq %rdi, %rax
; CHECK-NEXT: orq %rdx, %rax
; CHECK-NEXT: retq
%result = bitinsert b64 %base, float %val, i32 %off
ret b64 %result
}
define b87 @test_bitinsert_float_b87_var(b87 %base, float %val, i32 %off) {
; CHECK-LABEL: test_bitinsert_float_b87_var:
; CHECK: # %bb.0:
; CHECK-NEXT: movl %edx, %ecx
; CHECK-NEXT: movd %xmm0, %r8d
; CHECK-NEXT: xorl %r9d, %r9d
; CHECK-NEXT: movl $4294967295, %eax # imm = 0xFFFFFFFF
; CHECK-NEXT: xorl %edx, %edx
; CHECK-NEXT: shldq %cl, %rax, %rdx
; CHECK-NEXT: xorl %r10d, %r10d
; CHECK-NEXT: shldq %cl, %r8, %r10
; CHECK-NEXT: shlq %cl, %rax
; CHECK-NEXT: shlq %cl, %r8
; CHECK-NEXT: testb $64, %cl
; CHECK-NEXT: cmovneq %r8, %r10
; CHECK-NEXT: cmovneq %rax, %rdx
; CHECK-NEXT: cmovneq %r9, %r8
; CHECK-NEXT: cmovneq %r9, %rax
; CHECK-NEXT: xorq $8388607, %rdx # imm = 0x7FFFFF
; CHECK-NEXT: andq %rsi, %rdx
; CHECK-NEXT: orq %r10, %rdx
; CHECK-NEXT: notq %rax
; CHECK-NEXT: andq %rdi, %rax
; CHECK-NEXT: orq %r8, %rax
; CHECK-NEXT: retq
%result = bitinsert b87 %base, float %val, i32 %off
ret b87 %result
}
define b64 @test_bitinsert_double_full(b64 %base, double %val) {
; CHECK-LABEL: test_bitinsert_double_full:
; CHECK: # %bb.0:
; CHECK-NEXT: movq %xmm0, %rax
; CHECK-NEXT: retq
%result = bitinsert b64 %base, double %val, i32 0
ret b64 %result
}
define b128 @test_bitinsert_double_const(b128 %base, double %val) {
; CHECK-LABEL: test_bitinsert_double_const:
; CHECK: # %bb.0:
; CHECK-NEXT: movq %rdi, %rax
; CHECK-NEXT: movq %xmm0, %rdx
; CHECK-NEXT: retq
%result = bitinsert b128 %base, double %val, i32 64
ret b128 %result
}
define b128 @test_bitinsert_double_var(b128 %base, double %val, i32 %off) {
; CHECK-LABEL: test_bitinsert_double_var:
; CHECK: # %bb.0:
; CHECK-NEXT: movl %edx, %ecx
; CHECK-NEXT: movq %xmm0, %r8
; CHECK-NEXT: xorl %r9d, %r9d
; CHECK-NEXT: movq $-1, %rax
; CHECK-NEXT: xorl %edx, %edx
; CHECK-NEXT: shldq %cl, %rax, %rdx
; CHECK-NEXT: xorl %r10d, %r10d
; CHECK-NEXT: shldq %cl, %r8, %r10
; CHECK-NEXT: shlq %cl, %rax
; CHECK-NEXT: shlq %cl, %r8
; CHECK-NEXT: testb $64, %cl
; CHECK-NEXT: cmovneq %r8, %r10
; CHECK-NEXT: cmovneq %rax, %rdx
; CHECK-NEXT: notq %rdx
; CHECK-NEXT: cmovneq %r9, %r8
; CHECK-NEXT: cmovneq %r9, %rax
; CHECK-NEXT: andq %rsi, %rdx
; CHECK-NEXT: orq %r10, %rdx
; CHECK-NEXT: notq %rax
; CHECK-NEXT: andq %rdi, %rax
; CHECK-NEXT: orq %r8, %rax
; CHECK-NEXT: retq
%result = bitinsert b128 %base, double %val, i32 %off
ret b128 %result
}
define b231 @test_bitinsert_double_b231_var(b231 %base, double %val, i32 %off) {
; CHECK-LABEL: test_bitinsert_double_b231_var:
; CHECK: # %bb.0:
; CHECK-NEXT: pushq %r15
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: pushq %r14
; CHECK-NEXT: .cfi_def_cfa_offset 24
; CHECK-NEXT: pushq %r12
; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: pushq %rbx
; CHECK-NEXT: .cfi_def_cfa_offset 40
; CHECK-NEXT: pushq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 48
; CHECK-NEXT: .cfi_offset %rbx, -40
; CHECK-NEXT: .cfi_offset %r12, -32
; CHECK-NEXT: .cfi_offset %r14, -24
; CHECK-NEXT: .cfi_offset %r15, -16
; CHECK-NEXT: movq %rcx, %r10
; CHECK-NEXT: movq %rdi, %rax
; CHECK-NEXT: xorps %xmm1, %xmm1
; CHECK-NEXT: movaps %xmm1, -{{[0-9]+}}(%rsp)
; CHECK-NEXT: movsd %xmm0, -{{[0-9]+}}(%rsp)
; CHECK-NEXT: movaps %xmm1, -{{[0-9]+}}(%rsp)
; CHECK-NEXT: movaps %xmm1, -{{[0-9]+}}(%rsp)
; CHECK-NEXT: movaps %xmm1, -{{[0-9]+}}(%rsp)
; CHECK-NEXT: movaps %xmm1, -{{[0-9]+}}(%rsp)
; CHECK-NEXT: movaps %xmm1, -{{[0-9]+}}(%rsp)
; CHECK-NEXT: movq $0, -{{[0-9]+}}(%rsp)
; CHECK-NEXT: movl %r9d, %ecx
; CHECK-NEXT: shrb $3, %cl
; CHECK-NEXT: andb $24, %cl
; CHECK-NEXT: negb %cl
; CHECK-NEXT: movsbq %cl, %rbx
; CHECK-NEXT: movq -80(%rsp,%rbx), %r14
; CHECK-NEXT: movq -72(%rsp,%rbx), %r15
; CHECK-NEXT: movl %r9d, %ecx
; CHECK-NEXT: shldq %cl, %r14, %r15
; CHECK-NEXT: movq $0, -{{[0-9]+}}(%rsp)
; CHECK-NEXT: movq $-1, -{{[0-9]+}}(%rsp)
; CHECK-NEXT: movq -16(%rsp,%rbx), %r11
; CHECK-NEXT: movq -8(%rsp,%rbx), %rdi
; CHECK-NEXT: shldq %cl, %r11, %rdi
; CHECK-NEXT: notq %rdi
; CHECK-NEXT: andq %r8, %rdi
; CHECK-NEXT: orq %r15, %rdi
; CHECK-NEXT: movq -96(%rsp,%rbx), %r15
; CHECK-NEXT: movq -88(%rsp,%rbx), %r8
; CHECK-NEXT: shldq %cl, %r8, %r14
; CHECK-NEXT: movq -32(%rsp,%rbx), %r12
; CHECK-NEXT: movq -24(%rsp,%rbx), %rbx
; CHECK-NEXT: shldq %cl, %rbx, %r11
; CHECK-NEXT: notq %r11
; CHECK-NEXT: andq %r10, %r11
; CHECK-NEXT: orq %r14, %r11
; CHECK-NEXT: movq %r15, %r10
; CHECK-NEXT: shlq %cl, %r10
; CHECK-NEXT: movq %r12, %r14
; CHECK-NEXT: shlq %cl, %r14
; CHECK-NEXT: notq %r14
; CHECK-NEXT: andq %rsi, %r14
; CHECK-NEXT: orq %r10, %r14
; CHECK-NEXT: shldq %cl, %r15, %r8
; CHECK-NEXT: shldq %cl, %r12, %rbx
; CHECK-NEXT: notq %rbx
; CHECK-NEXT: andq %rdx, %rbx
; CHECK-NEXT: orq %r8, %rbx
; CHECK-NEXT: movq %r11, 16(%rax)
; CHECK-NEXT: movq %rbx, 8(%rax)
; CHECK-NEXT: movq %r14, (%rax)
; CHECK-NEXT: movl %edi, 24(%rax)
; CHECK-NEXT: shrq $32, %rdi
; CHECK-NEXT: andl $127, %edi
; CHECK-NEXT: movb %dil, 28(%rax)
; CHECK-NEXT: addq $8, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 40
; CHECK-NEXT: popq %rbx
; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: popq %r12
; CHECK-NEXT: .cfi_def_cfa_offset 24
; CHECK-NEXT: popq %r14
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: popq %r15
; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq
%result = bitinsert b231 %base, double %val, i32 %off
ret b231 %result
}