| ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4 |
| ; RUN: llc -mtriple=amdgpu11.00 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX11,GFX11-TRUE16 %s |
| ; RUN: llc -mtriple=amdgpu11.00 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX11,GFX11-FAKE16 %s |
| ; RUN: llc -mtriple=amdgpu12.00 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX12PLUS,GFX12PLUS-TRUE16,GFX12 %s |
| ; RUN: llc -mtriple=amdgpu12.00 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX12PLUS,GFX12PLUS-FAKE16,GFX12 %s |
| ; RUN: llc -mtriple=amdgpu13.10 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX12PLUS,GFX12PLUS-TRUE16,GFX13 %s |
| ; RUN: llc -mtriple=amdgpu13.10 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX12PLUS,GFX12PLUS-FAKE16,GFX13 %s |
| |
| define amdgpu_ps <4 x float> @load_2dmsaa(<8 x i32> inreg %rsrc, i32 %s, i32 %t, i32 %fragid) { |
| ; GFX11-LABEL: load_2dmsaa: |
| ; GFX11: ; %bb.0: ; %main_body |
| ; GFX11-NEXT: image_msaa_load v[0:3], v[0:2], s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_2D_MSAA unorm |
| ; GFX11-NEXT: s_waitcnt vmcnt(0) |
| ; GFX11-NEXT: ; return to shader part epilog |
| ; |
| ; GFX12PLUS-LABEL: load_2dmsaa: |
| ; GFX12PLUS: ; %bb.0: ; %main_body |
| ; GFX12PLUS-NEXT: image_msaa_load v[0:3], [v0, v1, v2], s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_2D_MSAA unorm |
| ; GFX12PLUS-NEXT: s_wait_samplecnt 0x0 |
| ; GFX12PLUS-NEXT: ; return to shader part epilog |
| main_body: |
| %v = call <4 x float> @llvm.amdgcn.image.msaa.load.2dmsaa.v4f32.i32(i32 1, i32 %s, i32 %t, i32 %fragid, <8 x i32> %rsrc, i32 0, i32 0) |
| ret <4 x float> %v |
| } |
| |
| define amdgpu_ps <4 x float> @load_2dmsaa_both(<8 x i32> inreg %rsrc, ptr addrspace(1) inreg %out, i32 %s, i32 %t, i32 %fragid) { |
| ; GFX11-LABEL: load_2dmsaa_both: |
| ; GFX11: ; %bb.0: ; %main_body |
| ; GFX11-NEXT: v_dual_mov_b32 v5, v0 :: v_dual_mov_b32 v8, 0 |
| ; GFX11-NEXT: v_dual_mov_b32 v7, v2 :: v_dual_mov_b32 v6, v1 |
| ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4) |
| ; GFX11-NEXT: v_mov_b32_e32 v9, v8 |
| ; GFX11-NEXT: v_mov_b32_e32 v10, v8 |
| ; GFX11-NEXT: v_mov_b32_e32 v11, v8 |
| ; GFX11-NEXT: v_mov_b32_e32 v12, v8 |
| ; GFX11-NEXT: v_dual_mov_b32 v0, v8 :: v_dual_mov_b32 v1, v9 |
| ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) |
| ; GFX11-NEXT: v_dual_mov_b32 v2, v10 :: v_dual_mov_b32 v3, v11 |
| ; GFX11-NEXT: v_mov_b32_e32 v4, v12 |
| ; GFX11-NEXT: image_msaa_load v[0:4], v[5:7], s[0:7] dmask:0x2 dim:SQ_RSRC_IMG_2D_MSAA unorm tfe lwe |
| ; GFX11-NEXT: s_waitcnt vmcnt(0) |
| ; GFX11-NEXT: global_store_b32 v8, v4, s[8:9] |
| ; GFX11-NEXT: ; return to shader part epilog |
| ; |
| ; GFX12PLUS-LABEL: load_2dmsaa_both: |
| ; GFX12PLUS: ; %bb.0: ; %main_body |
| ; GFX12PLUS-NEXT: v_dual_mov_b32 v7, v0 :: v_dual_mov_b32 v8, 0 |
| ; GFX12PLUS-NEXT: v_dual_mov_b32 v5, v2 :: v_dual_mov_b32 v6, v1 |
| ; GFX12PLUS-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) |
| ; GFX12PLUS-NEXT: v_dual_mov_b32 v9, v8 :: v_dual_mov_b32 v10, v8 |
| ; GFX12PLUS-NEXT: v_dual_mov_b32 v11, v8 :: v_dual_mov_b32 v12, v8 |
| ; GFX12PLUS-NEXT: v_dual_mov_b32 v0, v8 :: v_dual_mov_b32 v1, v9 |
| ; GFX12PLUS-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3) |
| ; GFX12PLUS-NEXT: v_dual_mov_b32 v2, v10 :: v_dual_mov_b32 v3, v11 |
| ; GFX12PLUS-NEXT: v_mov_b32_e32 v4, v12 |
| ; GFX12PLUS-NEXT: image_msaa_load v[0:4], [v7, v6, v5], s[0:7] dmask:0x2 dim:SQ_RSRC_IMG_2D_MSAA unorm tfe lwe |
| ; GFX12PLUS-NEXT: s_wait_samplecnt 0x0 |
| ; GFX12PLUS-NEXT: global_store_b32 v8, v4, s[8:9] |
| ; GFX12PLUS-NEXT: ; return to shader part epilog |
| main_body: |
| %v = call {<4 x float>,i32} @llvm.amdgcn.image.msaa.load.2dmsaa.v4f32i32.i32(i32 2, i32 %s, i32 %t, i32 %fragid, <8 x i32> %rsrc, i32 3, i32 0) |
| %v.vec = extractvalue {<4 x float>, i32} %v, 0 |
| %v.err = extractvalue {<4 x float>, i32} %v, 1 |
| store i32 %v.err, ptr addrspace(1) %out, align 4 |
| ret <4 x float> %v.vec |
| } |
| |
| define amdgpu_ps <4 x float> @load_2darraymsaa(<8 x i32> inreg %rsrc, i32 %s, i32 %t, i32 %slice, i32 %fragid) { |
| ; GFX11-LABEL: load_2darraymsaa: |
| ; GFX11: ; %bb.0: ; %main_body |
| ; GFX11-NEXT: image_msaa_load v[0:3], v[0:3], s[0:7] dmask:0x4 dim:SQ_RSRC_IMG_2D_MSAA_ARRAY unorm |
| ; GFX11-NEXT: s_waitcnt vmcnt(0) |
| ; GFX11-NEXT: ; return to shader part epilog |
| ; |
| ; GFX12PLUS-LABEL: load_2darraymsaa: |
| ; GFX12PLUS: ; %bb.0: ; %main_body |
| ; GFX12PLUS-NEXT: image_msaa_load v[0:3], [v0, v1, v2, v3], s[0:7] dmask:0x4 dim:SQ_RSRC_IMG_2D_MSAA_ARRAY unorm |
| ; GFX12PLUS-NEXT: s_wait_samplecnt 0x0 |
| ; GFX12PLUS-NEXT: ; return to shader part epilog |
| main_body: |
| %v = call <4 x float> @llvm.amdgcn.image.msaa.load.2darraymsaa.v4f32.i32(i32 4, i32 %s, i32 %t, i32 %slice, i32 %fragid, <8 x i32> %rsrc, i32 0, i32 0) |
| ret <4 x float> %v |
| } |
| |
| define amdgpu_ps <4 x float> @load_2darraymsaa_tfe(<8 x i32> inreg %rsrc, ptr addrspace(1) inreg %out, i32 %s, i32 %t, i32 %slice, i32 %fragid) { |
| ; GFX11-LABEL: load_2darraymsaa_tfe: |
| ; GFX11: ; %bb.0: ; %main_body |
| ; GFX11-NEXT: v_dual_mov_b32 v9, 0 :: v_dual_mov_b32 v8, v3 |
| ; GFX11-NEXT: v_dual_mov_b32 v7, v2 :: v_dual_mov_b32 v6, v1 |
| ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4) |
| ; GFX11-NEXT: v_dual_mov_b32 v5, v0 :: v_dual_mov_b32 v10, v9 |
| ; GFX11-NEXT: v_mov_b32_e32 v11, v9 |
| ; GFX11-NEXT: v_mov_b32_e32 v12, v9 |
| ; GFX11-NEXT: v_mov_b32_e32 v13, v9 |
| ; GFX11-NEXT: v_dual_mov_b32 v0, v9 :: v_dual_mov_b32 v1, v10 |
| ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) |
| ; GFX11-NEXT: v_dual_mov_b32 v2, v11 :: v_dual_mov_b32 v3, v12 |
| ; GFX11-NEXT: v_mov_b32_e32 v4, v13 |
| ; GFX11-NEXT: image_msaa_load v[0:4], v[5:8], s[0:7] dmask:0x8 dim:SQ_RSRC_IMG_2D_MSAA_ARRAY unorm tfe |
| ; GFX11-NEXT: s_waitcnt vmcnt(0) |
| ; GFX11-NEXT: global_store_b32 v9, v4, s[8:9] |
| ; GFX11-NEXT: ; return to shader part epilog |
| ; |
| ; GFX12-LABEL: load_2darraymsaa_tfe: |
| ; GFX12: ; %bb.0: ; %main_body |
| ; GFX12-NEXT: v_mov_b32_e32 v9, 0 |
| ; GFX12-NEXT: v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v6, v2 |
| ; GFX12-NEXT: v_dual_mov_b32 v7, v1 :: v_dual_mov_b32 v8, v0 |
| ; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2) |
| ; GFX12-NEXT: v_dual_mov_b32 v10, v9 :: v_dual_mov_b32 v11, v9 |
| ; GFX12-NEXT: v_dual_mov_b32 v12, v9 :: v_dual_mov_b32 v13, v9 |
| ; GFX12-NEXT: v_dual_mov_b32 v0, v9 :: v_dual_mov_b32 v1, v10 |
| ; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3) |
| ; GFX12-NEXT: v_dual_mov_b32 v2, v11 :: v_dual_mov_b32 v3, v12 |
| ; GFX12-NEXT: v_mov_b32_e32 v4, v13 |
| ; GFX12-NEXT: image_msaa_load v[0:4], [v8, v7, v6, v5], s[0:7] dmask:0x8 dim:SQ_RSRC_IMG_2D_MSAA_ARRAY unorm tfe |
| ; GFX12-NEXT: s_wait_samplecnt 0x0 |
| ; GFX12-NEXT: global_store_b32 v9, v4, s[8:9] |
| ; GFX12-NEXT: ; return to shader part epilog |
| ; |
| ; GFX13-LABEL: load_2darraymsaa_tfe: |
| ; GFX13: ; %bb.0: ; %main_body |
| ; GFX13-NEXT: v_dual_mov_b32 v9, 0 :: v_dual_mov_b32 v5, v3 |
| ; GFX13-NEXT: v_dual_mov_b32 v6, v2 :: v_dual_mov_b32 v7, v1 |
| ; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3) |
| ; GFX13-NEXT: v_dual_mov_b32 v8, v0 :: v_dual_mov_b32 v10, v9 |
| ; GFX13-NEXT: v_dual_mov_b32 v11, v9 :: v_dual_mov_b32 v12, v9 |
| ; GFX13-NEXT: v_mov_b32_e32 v13, v9 |
| ; GFX13-NEXT: v_dual_mov_b32 v0, v9 :: v_dual_mov_b32 v1, v10 |
| ; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) |
| ; GFX13-NEXT: v_dual_mov_b32 v2, v11 :: v_dual_mov_b32 v3, v12 |
| ; GFX13-NEXT: v_mov_b32_e32 v4, v13 |
| ; GFX13-NEXT: image_msaa_load v[0:4], [v8, v7, v6, v5], s[0:7] dmask:0x8 dim:SQ_RSRC_IMG_2D_MSAA_ARRAY unorm tfe |
| ; GFX13-NEXT: s_wait_samplecnt 0x0 |
| ; GFX13-NEXT: global_store_b32 v9, v4, s[8:9] |
| ; GFX13-NEXT: ; return to shader part epilog |
| main_body: |
| %v = call {<4 x float>,i32} @llvm.amdgcn.image.msaa.load.2darraymsaa.v4f32i32.i32(i32 8, i32 %s, i32 %t, i32 %slice, i32 %fragid, <8 x i32> %rsrc, i32 1, i32 0) |
| %v.vec = extractvalue {<4 x float>, i32} %v, 0 |
| %v.err = extractvalue {<4 x float>, i32} %v, 1 |
| store i32 %v.err, ptr addrspace(1) %out, align 4 |
| ret <4 x float> %v.vec |
| } |
| |
| define amdgpu_ps <4 x float> @load_2dmsaa_glc(<8 x i32> inreg %rsrc, i32 %s, i32 %t, i32 %fragid) { |
| ; GFX11-LABEL: load_2dmsaa_glc: |
| ; GFX11: ; %bb.0: ; %main_body |
| ; GFX11-NEXT: image_msaa_load v[0:3], v[0:2], s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_2D_MSAA unorm glc |
| ; GFX11-NEXT: s_waitcnt vmcnt(0) |
| ; GFX11-NEXT: ; return to shader part epilog |
| ; |
| ; GFX12PLUS-LABEL: load_2dmsaa_glc: |
| ; GFX12PLUS: ; %bb.0: ; %main_body |
| ; GFX12PLUS-NEXT: image_msaa_load v[0:3], [v0, v1, v2], s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_2D_MSAA unorm th:TH_LOAD_NT |
| ; GFX12PLUS-NEXT: s_wait_samplecnt 0x0 |
| ; GFX12PLUS-NEXT: ; return to shader part epilog |
| main_body: |
| %v = call <4 x float> @llvm.amdgcn.image.msaa.load.2dmsaa.v4f32.i32(i32 1, i32 %s, i32 %t, i32 %fragid, <8 x i32> %rsrc, i32 0, i32 1) |
| ret <4 x float> %v |
| } |
| |
| define amdgpu_ps <4 x float> @load_2dmsaa_slc(<8 x i32> inreg %rsrc, i32 %s, i32 %t, i32 %fragid) { |
| ; GFX11-LABEL: load_2dmsaa_slc: |
| ; GFX11: ; %bb.0: ; %main_body |
| ; GFX11-NEXT: image_msaa_load v[0:3], v[0:2], s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_2D_MSAA unorm slc |
| ; GFX11-NEXT: s_waitcnt vmcnt(0) |
| ; GFX11-NEXT: ; return to shader part epilog |
| ; |
| ; GFX12PLUS-LABEL: load_2dmsaa_slc: |
| ; GFX12PLUS: ; %bb.0: ; %main_body |
| ; GFX12PLUS-NEXT: image_msaa_load v[0:3], [v0, v1, v2], s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_2D_MSAA unorm th:TH_LOAD_HT |
| ; GFX12PLUS-NEXT: s_wait_samplecnt 0x0 |
| ; GFX12PLUS-NEXT: ; return to shader part epilog |
| main_body: |
| %v = call <4 x float> @llvm.amdgcn.image.msaa.load.2dmsaa.v4f32.i32(i32 1, i32 %s, i32 %t, i32 %fragid, <8 x i32> %rsrc, i32 0, i32 2) |
| ret <4 x float> %v |
| } |
| |
| define amdgpu_ps <4 x float> @load_2dmsaa_glc_slc(<8 x i32> inreg %rsrc, i32 %s, i32 %t, i32 %fragid) { |
| ; GFX11-LABEL: load_2dmsaa_glc_slc: |
| ; GFX11: ; %bb.0: ; %main_body |
| ; GFX11-NEXT: image_msaa_load v[0:3], v[0:2], s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_2D_MSAA unorm glc slc |
| ; GFX11-NEXT: s_waitcnt vmcnt(0) |
| ; GFX11-NEXT: ; return to shader part epilog |
| ; |
| ; GFX12PLUS-LABEL: load_2dmsaa_glc_slc: |
| ; GFX12PLUS: ; %bb.0: ; %main_body |
| ; GFX12PLUS-NEXT: image_msaa_load v[0:3], [v0, v1, v2], s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_2D_MSAA unorm th:TH_LOAD_LU |
| ; GFX12PLUS-NEXT: s_wait_samplecnt 0x0 |
| ; GFX12PLUS-NEXT: ; return to shader part epilog |
| main_body: |
| %v = call <4 x float> @llvm.amdgcn.image.msaa.load.2dmsaa.v4f32.i32(i32 1, i32 %s, i32 %t, i32 %fragid, <8 x i32> %rsrc, i32 0, i32 3) |
| ret <4 x float> %v |
| } |
| |
| define amdgpu_ps <4 x half> @load_2dmsaa_d16(<8 x i32> inreg %rsrc, i32 %s, i32 %t, i32 %fragid) { |
| ; GFX11-LABEL: load_2dmsaa_d16: |
| ; GFX11: ; %bb.0: ; %main_body |
| ; GFX11-NEXT: image_msaa_load v[0:1], v[0:2], s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_2D_MSAA unorm d16 |
| ; GFX11-NEXT: s_waitcnt vmcnt(0) |
| ; GFX11-NEXT: ; return to shader part epilog |
| ; |
| ; GFX12PLUS-LABEL: load_2dmsaa_d16: |
| ; GFX12PLUS: ; %bb.0: ; %main_body |
| ; GFX12PLUS-NEXT: image_msaa_load v[0:1], [v0, v1, v2], s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_2D_MSAA unorm d16 |
| ; GFX12PLUS-NEXT: s_wait_samplecnt 0x0 |
| ; GFX12PLUS-NEXT: ; return to shader part epilog |
| main_body: |
| %v = call <4 x half> @llvm.amdgcn.image.msaa.load.2dmsaa.v4f16.i32(i32 1, i32 %s, i32 %t, i32 %fragid, <8 x i32> %rsrc, i32 0, i32 0) |
| ret <4 x half> %v |
| } |
| |
| define amdgpu_ps <4 x half> @load_2dmsaa_tfe_d16(<8 x i32> inreg %rsrc, ptr addrspace(1) inreg %out, i32 %s, i32 %t, i32 %fragid) { |
| ; GFX11-LABEL: load_2dmsaa_tfe_d16: |
| ; GFX11: ; %bb.0: ; %main_body |
| ; GFX11-NEXT: v_dual_mov_b32 v3, v0 :: v_dual_mov_b32 v6, 0 |
| ; GFX11-NEXT: v_dual_mov_b32 v5, v2 :: v_dual_mov_b32 v4, v1 |
| ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) |
| ; GFX11-NEXT: v_mov_b32_e32 v7, v6 |
| ; GFX11-NEXT: v_mov_b32_e32 v8, v6 |
| ; GFX11-NEXT: v_dual_mov_b32 v0, v6 :: v_dual_mov_b32 v1, v7 |
| ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) |
| ; GFX11-NEXT: v_mov_b32_e32 v2, v8 |
| ; GFX11-NEXT: image_msaa_load v[0:2], v[3:5], s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_2D_MSAA unorm tfe d16 |
| ; GFX11-NEXT: s_waitcnt vmcnt(0) |
| ; GFX11-NEXT: global_store_b32 v6, v2, s[8:9] |
| ; GFX11-NEXT: ; return to shader part epilog |
| ; |
| ; GFX12PLUS-LABEL: load_2dmsaa_tfe_d16: |
| ; GFX12PLUS: ; %bb.0: ; %main_body |
| ; GFX12PLUS-NEXT: v_dual_mov_b32 v5, v0 :: v_dual_mov_b32 v6, 0 |
| ; GFX12PLUS-NEXT: v_dual_mov_b32 v3, v2 :: v_dual_mov_b32 v4, v1 |
| ; GFX12PLUS-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) |
| ; GFX12PLUS-NEXT: v_dual_mov_b32 v7, v6 :: v_dual_mov_b32 v8, v6 |
| ; GFX12PLUS-NEXT: v_dual_mov_b32 v0, v6 :: v_dual_mov_b32 v1, v7 |
| ; GFX12PLUS-NEXT: s_delay_alu instid0(VALU_DEP_2) |
| ; GFX12PLUS-NEXT: v_mov_b32_e32 v2, v8 |
| ; GFX12PLUS-NEXT: image_msaa_load v[0:2], [v5, v4, v3], s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_2D_MSAA unorm tfe d16 |
| ; GFX12PLUS-NEXT: s_wait_samplecnt 0x0 |
| ; GFX12PLUS-NEXT: global_store_b32 v6, v2, s[8:9] |
| ; GFX12PLUS-NEXT: ; return to shader part epilog |
| main_body: |
| %v = call {<4 x half>,i32} @llvm.amdgcn.image.msaa.load.2dmsaa.v4f16i32.i32(i32 1, i32 %s, i32 %t, i32 %fragid, <8 x i32> %rsrc, i32 1, i32 0) |
| %v.vec = extractvalue {<4 x half>, i32} %v, 0 |
| %v.err = extractvalue {<4 x half>, i32} %v, 1 |
| store i32 %v.err, ptr addrspace(1) %out, align 4 |
| ret <4 x half> %v.vec |
| } |
| |
| define amdgpu_ps <4 x half> @load_2darraymsaa_d16(<8 x i32> inreg %rsrc, i32 %s, i32 %t, i32 %slice, i32 %fragid) { |
| ; GFX11-LABEL: load_2darraymsaa_d16: |
| ; GFX11: ; %bb.0: ; %main_body |
| ; GFX11-NEXT: image_msaa_load v[0:1], v[0:3], s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_2D_MSAA_ARRAY unorm d16 |
| ; GFX11-NEXT: s_waitcnt vmcnt(0) |
| ; GFX11-NEXT: ; return to shader part epilog |
| ; |
| ; GFX12PLUS-LABEL: load_2darraymsaa_d16: |
| ; GFX12PLUS: ; %bb.0: ; %main_body |
| ; GFX12PLUS-NEXT: image_msaa_load v[0:1], [v0, v1, v2, v3], s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_2D_MSAA_ARRAY unorm d16 |
| ; GFX12PLUS-NEXT: s_wait_samplecnt 0x0 |
| ; GFX12PLUS-NEXT: ; return to shader part epilog |
| main_body: |
| %v = call <4 x half> @llvm.amdgcn.image.msaa.load.2darraymsaa.v4f16.i32(i32 1, i32 %s, i32 %t, i32 %slice, i32 %fragid, <8 x i32> %rsrc, i32 0, i32 0) |
| ret <4 x half> %v |
| } |
| |
| define amdgpu_ps <4 x half> @load_2darraymsaa_tfe_d16(<8 x i32> inreg %rsrc, ptr addrspace(1) inreg %out, i32 %s, i32 %t, i32 %slice, i32 %fragid) { |
| ; GFX11-LABEL: load_2darraymsaa_tfe_d16: |
| ; GFX11: ; %bb.0: ; %main_body |
| ; GFX11-NEXT: v_dual_mov_b32 v6, v0 :: v_dual_mov_b32 v7, 0 |
| ; GFX11-NEXT: v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v5, v1 |
| ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) |
| ; GFX11-NEXT: v_mov_b32_e32 v8, v7 |
| ; GFX11-NEXT: v_mov_b32_e32 v9, v7 |
| ; GFX11-NEXT: v_dual_mov_b32 v0, v7 :: v_dual_mov_b32 v1, v8 |
| ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) |
| ; GFX11-NEXT: v_mov_b32_e32 v2, v9 |
| ; GFX11-NEXT: image_msaa_load v[0:2], [v6, v5, v4, v3], s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_2D_MSAA_ARRAY unorm tfe d16 |
| ; GFX11-NEXT: s_waitcnt vmcnt(0) |
| ; GFX11-NEXT: global_store_b32 v7, v2, s[8:9] |
| ; GFX11-NEXT: ; return to shader part epilog |
| ; |
| ; GFX12PLUS-LABEL: load_2darraymsaa_tfe_d16: |
| ; GFX12PLUS: ; %bb.0: ; %main_body |
| ; GFX12PLUS-NEXT: v_dual_mov_b32 v6, v0 :: v_dual_mov_b32 v7, 0 |
| ; GFX12PLUS-NEXT: v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v5, v1 |
| ; GFX12PLUS-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) |
| ; GFX12PLUS-NEXT: v_dual_mov_b32 v8, v7 :: v_dual_mov_b32 v9, v7 |
| ; GFX12PLUS-NEXT: v_dual_mov_b32 v0, v7 :: v_dual_mov_b32 v1, v8 |
| ; GFX12PLUS-NEXT: s_delay_alu instid0(VALU_DEP_2) |
| ; GFX12PLUS-NEXT: v_mov_b32_e32 v2, v9 |
| ; GFX12PLUS-NEXT: image_msaa_load v[0:2], [v6, v5, v4, v3], s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_2D_MSAA_ARRAY unorm tfe d16 |
| ; GFX12PLUS-NEXT: s_wait_samplecnt 0x0 |
| ; GFX12PLUS-NEXT: global_store_b32 v7, v2, s[8:9] |
| ; GFX12PLUS-NEXT: ; return to shader part epilog |
| main_body: |
| %v = call {<4 x half>,i32} @llvm.amdgcn.image.msaa.load.2darraymsaa.v4f16i32.i32(i32 1, i32 %s, i32 %t, i32 %slice, i32 %fragid, <8 x i32> %rsrc, i32 1, i32 0) |
| %v.vec = extractvalue {<4 x half>, i32} %v, 0 |
| %v.err = extractvalue {<4 x half>, i32} %v, 1 |
| store i32 %v.err, ptr addrspace(1) %out, align 4 |
| ret <4 x half> %v.vec |
| } |
| |
| define amdgpu_ps <4 x float> @load_2dmsaa_a16(<8 x i32> inreg %rsrc, i16 %s, i16 %t, i16 %fragid) { |
| ; GFX11-TRUE16-LABEL: load_2dmsaa_a16: |
| ; GFX11-TRUE16: ; %bb.0: ; %main_body |
| ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v3.l, v2.l |
| ; GFX11-TRUE16-NEXT: v_perm_b32 v2, v1, v0, 0x5040100 |
| ; GFX11-TRUE16-NEXT: image_msaa_load v[0:3], v[2:3], s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_2D_MSAA unorm a16 |
| ; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) |
| ; GFX11-TRUE16-NEXT: ; return to shader part epilog |
| ; |
| ; GFX11-FAKE16-LABEL: load_2dmsaa_a16: |
| ; GFX11-FAKE16: ; %bb.0: ; %main_body |
| ; GFX11-FAKE16-NEXT: v_perm_b32 v0, v1, v0, 0x5040100 |
| ; GFX11-FAKE16-NEXT: image_msaa_load v[0:3], [v0, v2], s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_2D_MSAA unorm a16 |
| ; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) |
| ; GFX11-FAKE16-NEXT: ; return to shader part epilog |
| ; |
| ; GFX12PLUS-TRUE16-LABEL: load_2dmsaa_a16: |
| ; GFX12PLUS-TRUE16: ; %bb.0: ; %main_body |
| ; GFX12PLUS-TRUE16-NEXT: v_mov_b16_e32 v0.h, v1.l |
| ; GFX12PLUS-TRUE16-NEXT: image_msaa_load v[0:3], [v0, v2], s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_2D_MSAA unorm a16 |
| ; GFX12PLUS-TRUE16-NEXT: s_wait_samplecnt 0x0 |
| ; GFX12PLUS-TRUE16-NEXT: ; return to shader part epilog |
| ; |
| ; GFX12PLUS-FAKE16-LABEL: load_2dmsaa_a16: |
| ; GFX12PLUS-FAKE16: ; %bb.0: ; %main_body |
| ; GFX12PLUS-FAKE16-NEXT: v_perm_b32 v0, v1, v0, 0x5040100 |
| ; GFX12PLUS-FAKE16-NEXT: image_msaa_load v[0:3], [v0, v2], s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_2D_MSAA unorm a16 |
| ; GFX12PLUS-FAKE16-NEXT: s_wait_samplecnt 0x0 |
| ; GFX12PLUS-FAKE16-NEXT: ; return to shader part epilog |
| main_body: |
| %v = call <4 x float> @llvm.amdgcn.image.msaa.load.2dmsaa.v4f32.i16(i32 1, i16 %s, i16 %t, i16 %fragid, <8 x i32> %rsrc, i32 0, i32 0) |
| ret <4 x float> %v |
| } |
| |
| define amdgpu_ps <4 x float> @load_2darraymsaa_a16(<8 x i32> inreg %rsrc, i16 %s, i16 %t, i16 %slice, i16 %fragid) { |
| ; GFX11-TRUE16-LABEL: load_2darraymsaa_a16: |
| ; GFX11-TRUE16: ; %bb.0: ; %main_body |
| ; GFX11-TRUE16-NEXT: v_perm_b32 v4, v3, v2, 0x5040100 |
| ; GFX11-TRUE16-NEXT: v_perm_b32 v3, v1, v0, 0x5040100 |
| ; GFX11-TRUE16-NEXT: image_msaa_load v[0:3], v[3:4], s[0:7] dmask:0x4 dim:SQ_RSRC_IMG_2D_MSAA_ARRAY unorm a16 |
| ; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) |
| ; GFX11-TRUE16-NEXT: ; return to shader part epilog |
| ; |
| ; GFX11-FAKE16-LABEL: load_2darraymsaa_a16: |
| ; GFX11-FAKE16: ; %bb.0: ; %main_body |
| ; GFX11-FAKE16-NEXT: v_perm_b32 v2, v3, v2, 0x5040100 |
| ; GFX11-FAKE16-NEXT: v_perm_b32 v1, v1, v0, 0x5040100 |
| ; GFX11-FAKE16-NEXT: image_msaa_load v[0:3], v[1:2], s[0:7] dmask:0x4 dim:SQ_RSRC_IMG_2D_MSAA_ARRAY unorm a16 |
| ; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) |
| ; GFX11-FAKE16-NEXT: ; return to shader part epilog |
| ; |
| ; GFX12PLUS-TRUE16-LABEL: load_2darraymsaa_a16: |
| ; GFX12PLUS-TRUE16: ; %bb.0: ; %main_body |
| ; GFX12PLUS-TRUE16-NEXT: v_mov_b16_e32 v2.h, v3.l |
| ; GFX12PLUS-TRUE16-NEXT: v_mov_b16_e32 v0.h, v1.l |
| ; GFX12PLUS-TRUE16-NEXT: image_msaa_load v[0:3], [v0, v2], s[0:7] dmask:0x4 dim:SQ_RSRC_IMG_2D_MSAA_ARRAY unorm a16 |
| ; GFX12PLUS-TRUE16-NEXT: s_wait_samplecnt 0x0 |
| ; GFX12PLUS-TRUE16-NEXT: ; return to shader part epilog |
| ; |
| ; GFX12PLUS-FAKE16-LABEL: load_2darraymsaa_a16: |
| ; GFX12PLUS-FAKE16: ; %bb.0: ; %main_body |
| ; GFX12PLUS-FAKE16-NEXT: v_perm_b32 v2, v3, v2, 0x5040100 |
| ; GFX12PLUS-FAKE16-NEXT: v_perm_b32 v0, v1, v0, 0x5040100 |
| ; GFX12PLUS-FAKE16-NEXT: image_msaa_load v[0:3], [v0, v2], s[0:7] dmask:0x4 dim:SQ_RSRC_IMG_2D_MSAA_ARRAY unorm a16 |
| ; GFX12PLUS-FAKE16-NEXT: s_wait_samplecnt 0x0 |
| ; GFX12PLUS-FAKE16-NEXT: ; return to shader part epilog |
| main_body: |
| %v = call <4 x float> @llvm.amdgcn.image.msaa.load.2darraymsaa.v4f32.i16(i32 4, i16 %s, i16 %t, i16 %slice, i16 %fragid, <8 x i32> %rsrc, i32 0, i32 0) |
| ret <4 x float> %v |
| } |
| |
| declare <4 x float> @llvm.amdgcn.image.msaa.load.2dmsaa.v4f32.i32(i32, i32, i32, i32, <8 x i32>, i32, i32) #1 |
| declare {<4 x float>,i32} @llvm.amdgcn.image.msaa.load.2dmsaa.v4f32i32.i32(i32, i32, i32, i32, <8 x i32>, i32, i32) #1 |
| declare <4 x float> @llvm.amdgcn.image.msaa.load.2darraymsaa.v4f32.i32(i32, i32, i32, i32, i32, <8 x i32>, i32, i32) #1 |
| declare {<4 x float>,i32} @llvm.amdgcn.image.msaa.load.2darraymsaa.v4f32i32.i32(i32, i32, i32, i32, i32, <8 x i32>, i32, i32) #1 |
| |
| declare <4 x half> @llvm.amdgcn.image.msaa.load.2dmsaa.v4f16.i32(i32, i32, i32, i32, <8 x i32>, i32, i32) #1 |
| declare {<4 x half>,i32} @llvm.amdgcn.image.msaa.load.2dmsaa.v4f16i32.i32(i32, i32, i32, i32, <8 x i32>, i32, i32) #1 |
| declare <4 x half> @llvm.amdgcn.image.msaa.load.2darraymsaa.v4f16.i32(i32, i32, i32, i32, i32, <8 x i32>, i32, i32) #1 |
| declare {<4 x half>,i32} @llvm.amdgcn.image.msaa.load.2darraymsaa.v4f16i32.i32(i32, i32, i32, i32, i32, <8 x i32>, i32, i32) #1 |
| |
| declare <4 x float> @llvm.amdgcn.image.msaa.load.2dmsaa.v4f32.i16(i32, i16, i16, i16, <8 x i32>, i32, i32) #1 |
| declare <4 x float> @llvm.amdgcn.image.msaa.load.2darraymsaa.v4f32.i16(i32, i16, i16, i16, i16, <8 x i32>, i32, i32) #1 |
| |
| attributes #0 = { nounwind } |
| attributes #1 = { nounwind readonly } |
