llvm/test/CodeGen/AMDGPU/call-constant.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
; RUN: llc -global-isel=0 -mtriple=amdgpu7.00-amd-amdhsa < %s | FileCheck -check-prefixes=GCN,SDAG %s
; RUN: llc -global-isel=1 -mtriple=amdgpu7.00-amd-amdhsa < %s | FileCheck -check-prefixes=GCN,GISEL %s

define amdgpu_kernel void @test_call_undef() #0 {
; SDAG-LABEL: test_call_undef:
; SDAG:       ; %bb.0:
; SDAG-NEXT:    s_add_i32 s12, s12, s17
; SDAG-NEXT:    s_mov_b32 flat_scratch_lo, s13
; SDAG-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; SDAG-NEXT:    flat_store_dword v[0:1], v0
; SDAG-NEXT:    s_waitcnt vmcnt(0)
; SDAG-NEXT:    s_endpgm
;
; GISEL-LABEL: test_call_undef:
; GISEL:       ; %bb.0:
; GISEL-NEXT:    s_add_i32 s12, s12, s17
; GISEL-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GISEL-NEXT:    v_lshlrev_b32_e32 v1, 10, v1
; GISEL-NEXT:    s_add_u32 s0, s0, s17
; GISEL-NEXT:    v_or_b32_e32 v0, v0, v1
; GISEL-NEXT:    v_lshlrev_b32_e32 v1, 20, v2
; GISEL-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GISEL-NEXT:    s_addc_u32 s1, s1, 0
; GISEL-NEXT:    s_mov_b32 s13, s15
; GISEL-NEXT:    s_mov_b32 s12, s14
; GISEL-NEXT:    v_or_b32_e32 v31, v0, v1
; GISEL-NEXT:    v_mov_b32_e32 v0, 1
; GISEL-NEXT:    s_mov_b32 s14, s16
; GISEL-NEXT:    s_mov_b32 s32, 0
; GISEL-NEXT:    s_swappc_b64 s[30:31], s[4:5]
; GISEL-NEXT:    flat_store_dword v[0:1], v0
; GISEL-NEXT:    s_waitcnt vmcnt(0)
; GISEL-NEXT:    s_endpgm
  %val = call i32 undef(i32 1)
  %op = add i32 %val, 1
  store volatile i32 %op, ptr addrspace(1) poison
  ret void
}

define i32 @test_tail_call_undef() #0 {
; SDAG-LABEL: test_tail_call_undef:
; SDAG:       ; %bb.0:
; SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
;
; GISEL-LABEL: test_tail_call_undef:
; GISEL:       ; %bb.0:
; GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GISEL-NEXT:    s_mov_b32 s16, s33
; GISEL-NEXT:    s_mov_b32 s33, s32
; GISEL-NEXT:    s_or_saveexec_b64 s[18:19], -1
; GISEL-NEXT:    buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GISEL-NEXT:    s_mov_b64 exec, s[18:19]
; GISEL-NEXT:    v_writelane_b32 v40, s16, 2
; GISEL-NEXT:    v_writelane_b32 v40, s30, 0
; GISEL-NEXT:    s_addk_i32 s32, 0x400
; GISEL-NEXT:    v_writelane_b32 v40, s31, 1
; GISEL-NEXT:    v_mov_b32_e32 v0, 1
; GISEL-NEXT:    s_swappc_b64 s[30:31], s[4:5]
; GISEL-NEXT:    v_readlane_b32 s30, v40, 0
; GISEL-NEXT:    v_readlane_b32 s31, v40, 1
; GISEL-NEXT:    s_mov_b32 s32, s33
; GISEL-NEXT:    v_readlane_b32 s4, v40, 2
; GISEL-NEXT:    s_or_saveexec_b64 s[6:7], -1
; GISEL-NEXT:    buffer_load_dword v40, off, s[0:3], s33 ; 4-byte Folded Reload
; GISEL-NEXT:    s_mov_b64 exec, s[6:7]
; GISEL-NEXT:    s_mov_b32 s33, s4
; GISEL-NEXT:    s_waitcnt vmcnt(0)
; GISEL-NEXT:    s_setpc_b64 s[30:31]
  %call = tail call i32 undef(i32 1)
  ret i32 %call
}

define amdgpu_kernel void @test_call_null() #0 {
; SDAG-LABEL: test_call_null:
; SDAG:       ; %bb.0:
; SDAG-NEXT:    s_add_i32 s12, s12, s17
; SDAG-NEXT:    s_mov_b32 flat_scratch_lo, s13
; SDAG-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; SDAG-NEXT:    v_mov_b32_e32 v0, 0
; SDAG-NEXT:    v_mov_b32_e32 v1, 0
; SDAG-NEXT:    flat_store_dword v[0:1], v0
; SDAG-NEXT:    s_waitcnt vmcnt(0)
; SDAG-NEXT:    s_endpgm
;
; GISEL-LABEL: test_call_null:
; GISEL:       ; %bb.0:
; GISEL-NEXT:    s_add_i32 s12, s12, s17
; GISEL-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GISEL-NEXT:    v_lshlrev_b32_e32 v1, 10, v1
; GISEL-NEXT:    s_add_u32 s0, s0, s17
; GISEL-NEXT:    v_or_b32_e32 v0, v0, v1
; GISEL-NEXT:    v_lshlrev_b32_e32 v1, 20, v2
; GISEL-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GISEL-NEXT:    s_addc_u32 s1, s1, 0
; GISEL-NEXT:    s_mov_b32 s13, s15
; GISEL-NEXT:    s_mov_b32 s12, s14
; GISEL-NEXT:    v_or_b32_e32 v31, v0, v1
; GISEL-NEXT:    v_mov_b32_e32 v0, 1
; GISEL-NEXT:    s_mov_b32 s14, s16
; GISEL-NEXT:    s_mov_b32 s32, 0
; GISEL-NEXT:    s_swappc_b64 s[30:31], 0
; GISEL-NEXT:    v_mov_b32_e32 v0, 0
; GISEL-NEXT:    v_mov_b32_e32 v1, 0
; GISEL-NEXT:    flat_store_dword v[0:1], v0
; GISEL-NEXT:    s_waitcnt vmcnt(0)
; GISEL-NEXT:    s_endpgm
  %val = call i32 null(i32 1)
  %op = add i32 %val, 1
  store volatile i32 %op, ptr addrspace(1) null
  ret void
}

define i32 @test_tail_call_null() #0 {
; SDAG-LABEL: test_tail_call_null:
; SDAG:       ; %bb.0:
; SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
;
; GISEL-LABEL: test_tail_call_null:
; GISEL:       ; %bb.0:
; GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GISEL-NEXT:    s_mov_b32 s16, s33
; GISEL-NEXT:    s_mov_b32 s33, s32
; GISEL-NEXT:    s_or_saveexec_b64 s[18:19], -1
; GISEL-NEXT:    buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GISEL-NEXT:    s_mov_b64 exec, s[18:19]
; GISEL-NEXT:    v_writelane_b32 v40, s16, 2
; GISEL-NEXT:    v_writelane_b32 v40, s30, 0
; GISEL-NEXT:    s_addk_i32 s32, 0x400
; GISEL-NEXT:    v_writelane_b32 v40, s31, 1
; GISEL-NEXT:    v_mov_b32_e32 v0, 1
; GISEL-NEXT:    s_swappc_b64 s[30:31], 0
; GISEL-NEXT:    v_readlane_b32 s30, v40, 0
; GISEL-NEXT:    v_readlane_b32 s31, v40, 1
; GISEL-NEXT:    s_mov_b32 s32, s33
; GISEL-NEXT:    v_readlane_b32 s4, v40, 2
; GISEL-NEXT:    s_or_saveexec_b64 s[6:7], -1
; GISEL-NEXT:    buffer_load_dword v40, off, s[0:3], s33 ; 4-byte Folded Reload
; GISEL-NEXT:    s_mov_b64 exec, s[6:7]
; GISEL-NEXT:    s_mov_b32 s33, s4
; GISEL-NEXT:    s_waitcnt vmcnt(0)
; GISEL-NEXT:    s_setpc_b64 s[30:31]
  %call = tail call i32 null(i32 1)
  ret i32 %call
}
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
; GCN: {{.*}}