llvm/test/CodeGen/AArch64/bitinsert-bitextract-fp.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
; RUN: llc -mtriple=aarch64 < %s | FileCheck %s --check-prefix=AARCH64

define half @test_bitextract_half_full(b16 %src) {
; AARCH64-LABEL: test_bitextract_half_full:
; AARCH64:       // %bb.0:
; AARCH64-NEXT:    fmov s0, w0
; AARCH64-NEXT:    // kill: def $h0 killed $h0 killed $q0
; AARCH64-NEXT:    ret
  %result = bitextract half, b16 %src, i32 0
  ret half %result
}

define float @test_bitextract_float_full(b32 %src) {
; AARCH64-LABEL: test_bitextract_float_full:
; AARCH64:       // %bb.0:
; AARCH64-NEXT:    fmov s0, w0
; AARCH64-NEXT:    ret
  %result = bitextract float, b32 %src, i32 0
  ret float %result
}

define float @test_bitextract_float_const(b64 %src) {
; AARCH64-LABEL: test_bitextract_float_const:
; AARCH64:       // %bb.0:
; AARCH64-NEXT:    lsr x8, x0, #32
; AARCH64-NEXT:    fmov s0, w8
; AARCH64-NEXT:    ret
  %result = bitextract float, b64 %src, i32 32
  ret float %result
}

define float @test_bitextract_float_var(b64 %src, i32 %off) {
; AARCH64-LABEL: test_bitextract_float_var:
; AARCH64:       // %bb.0:
; AARCH64-NEXT:    // kill: def $w1 killed $w1 def $x1
; AARCH64-NEXT:    lsr x8, x0, x1
; AARCH64-NEXT:    fmov s0, w8
; AARCH64-NEXT:    ret
  %result = bitextract float, b64 %src, i32 %off
  ret float %result
}

define float @test_bitextract_float_b87_var(b87 %src, i32 %off) {
; AARCH64-LABEL: test_bitextract_float_b87_var:
; AARCH64:       // %bb.0:
; AARCH64-NEXT:    and x8, x1, #0x7fffff
; AARCH64-NEXT:    mov w10, w2
; AARCH64-NEXT:    mvn w11, w2
; AARCH64-NEXT:    lsl x9, x8, #1
; AARCH64-NEXT:    lsr x12, x0, x10
; AARCH64-NEXT:    lsr x8, x8, x10
; AARCH64-NEXT:    tst x10, #0x40
; AARCH64-NEXT:    lsl x9, x9, x11
; AARCH64-NEXT:    orr x9, x9, x12
; AARCH64-NEXT:    csel x8, x8, x9, ne
; AARCH64-NEXT:    fmov s0, w8
; AARCH64-NEXT:    ret
  %result = bitextract float, b87 %src, i32 %off
  ret float %result
}

define float @test_bitextract_float_b87_crossword(b87 %src) {
; AARCH64-LABEL: test_bitextract_float_b87_crossword:
; AARCH64:       // %bb.0:
; AARCH64-NEXT:    extr x8, x1, x0, #55
; AARCH64-NEXT:    fmov s0, w8
; AARCH64-NEXT:    ret
  %result = bitextract float, b87 %src, i32 55
  ret float %result
}

define double @test_bitextract_double_full(b64 %src) {
; AARCH64-LABEL: test_bitextract_double_full:
; AARCH64:       // %bb.0:
; AARCH64-NEXT:    fmov d0, x0
; AARCH64-NEXT:    ret
  %result = bitextract double, b64 %src, i32 0
  ret double %result
}

define double @test_bitextract_double_const(b128 %src) {
; AARCH64-LABEL: test_bitextract_double_const:
; AARCH64:       // %bb.0:
; AARCH64-NEXT:    fmov d0, x1
; AARCH64-NEXT:    ret
  %result = bitextract double, b128 %src, i32 64
  ret double %result
}

define double @test_bitextract_double_var(b128 %src, i32 %off) {
; AARCH64-LABEL: test_bitextract_double_var:
; AARCH64:       // %bb.0:
; AARCH64-NEXT:    lsl x8, x1, #1
; AARCH64-NEXT:    mov w9, w2
; AARCH64-NEXT:    mvn w10, w2
; AARCH64-NEXT:    lsr x11, x0, x9
; AARCH64-NEXT:    tst x9, #0x40
; AARCH64-NEXT:    lsl x8, x8, x10
; AARCH64-NEXT:    lsr x10, x1, x9
; AARCH64-NEXT:    orr x8, x8, x11
; AARCH64-NEXT:    csel x8, x10, x8, ne
; AARCH64-NEXT:    fmov d0, x8
; AARCH64-NEXT:    ret
  %result = bitextract double, b128 %src, i32 %off
  ret double %result
}

define double @test_bitextract_double_b231_var(b231 %src, i32 %off) {
; AARCH64-LABEL: test_bitextract_double_b231_var:
; AARCH64:       // %bb.0:
; AARCH64-NEXT:    stp x0, x1, [sp, #-64]!
; AARCH64-NEXT:    .cfi_def_cfa_offset 64
; AARCH64-NEXT:    movi v0.2d, #0000000000000000
; AARCH64-NEXT:    mov w8, w4
; AARCH64-NEXT:    and x10, x3, #0x7fffffffff
; AARCH64-NEXT:    lsr x9, x8, #3
; AARCH64-NEXT:    mov x11, sp
; AARCH64-NEXT:    stp x2, x10, [sp, #16]
; AARCH64-NEXT:    and x9, x9, #0x18
; AARCH64-NEXT:    stp q0, q0, [sp, #32]
; AARCH64-NEXT:    add x9, x11, x9
; AARCH64-NEXT:    mvn w11, w4
; AARCH64-NEXT:    ldp x9, x10, [x9]
; AARCH64-NEXT:    lsl x10, x10, #1
; AARCH64-NEXT:    lsr x8, x9, x8
; AARCH64-NEXT:    lsl x10, x10, x11
; AARCH64-NEXT:    orr x8, x10, x8
; AARCH64-NEXT:    fmov d0, x8
; AARCH64-NEXT:    add sp, sp, #64
; AARCH64-NEXT:    ret
  %result = bitextract double, b231 %src, i32 %off
  ret double %result
}


define b16 @test_bitinsert_half_full(b16 %base, half %val) {
; AARCH64-LABEL: test_bitinsert_half_full:
; AARCH64:       // %bb.0:
; AARCH64-NEXT:    // kill: def $h0 killed $h0 def $s0
; AARCH64-NEXT:    fmov w0, s0
; AARCH64-NEXT:    ret
  %result = bitinsert b16 %base, half %val, i32 0
  ret b16 %result
}

define b32 @test_bitinsert_half_var(b32 %base, half %val, i32 %off) {
; AARCH64-LABEL: test_bitinsert_half_var:
; AARCH64:       // %bb.0:
; AARCH64-NEXT:    // kill: def $h0 killed $h0 def $s0
; AARCH64-NEXT:    fmov w8, s0
; AARCH64-NEXT:    mov w9, #65535 // =0xffff
; AARCH64-NEXT:    lsl w9, w9, w1
; AARCH64-NEXT:    and w8, w8, #0xffff
; AARCH64-NEXT:    bic w9, w0, w9
; AARCH64-NEXT:    lsl w8, w8, w1
; AARCH64-NEXT:    orr w0, w9, w8
; AARCH64-NEXT:    ret
  %result = bitinsert b32 %base, half %val, i32 %off
  ret b32 %result
}

define b32 @test_bitinsert_float_full(b32 %base, float %val) {
; AARCH64-LABEL: test_bitinsert_float_full:
; AARCH64:       // %bb.0:
; AARCH64-NEXT:    fmov w0, s0
; AARCH64-NEXT:    ret
  %result = bitinsert b32 %base, float %val, i32 0
  ret b32 %result
}

define b64 @test_bitinsert_float_const(b64 %base, float %val) {
; AARCH64-LABEL: test_bitinsert_float_const:
; AARCH64:       // %bb.0:
; AARCH64-NEXT:    fmov w8, s0
; AARCH64-NEXT:    bfi x0, x8, #32, #32
; AARCH64-NEXT:    ret
  %result = bitinsert b64 %base, float %val, i32 32
  ret b64 %result
}

define b64 @test_bitinsert_float_var(b64 %base, float %val, i32 %off) {
; AARCH64-LABEL: test_bitinsert_float_var:
; AARCH64:       // %bb.0:
; AARCH64-NEXT:    fmov w8, s0
; AARCH64-NEXT:    mov w9, #-1 // =0xffffffff
; AARCH64-NEXT:    // kill: def $w1 killed $w1 def $x1
; AARCH64-NEXT:    lsl x9, x9, x1
; AARCH64-NEXT:    lsl x8, x8, x1
; AARCH64-NEXT:    bic x9, x0, x9
; AARCH64-NEXT:    orr x0, x9, x8
; AARCH64-NEXT:    ret
  %result = bitinsert b64 %base, float %val, i32 %off
  ret b64 %result
}

define b87 @test_bitinsert_float_b87_var(b87 %base, float %val, i32 %off) {
; AARCH64-LABEL: test_bitinsert_float_b87_var:
; AARCH64:       // %bb.0:
; AARCH64-NEXT:    fmov w8, s0
; AARCH64-NEXT:    mov w9, #2147483647 // =0x7fffffff
; AARCH64-NEXT:    mov w10, #-1 // =0xffffffff
; AARCH64-NEXT:    mov w11, w2
; AARCH64-NEXT:    mvn w12, w2
; AARCH64-NEXT:    lsr x9, x9, x12
; AARCH64-NEXT:    lsl x10, x10, x11
; AARCH64-NEXT:    tst x11, #0x40
; AARCH64-NEXT:    lsr x13, x8, #1
; AARCH64-NEXT:    lsl x8, x8, x11
; AARCH64-NEXT:    csel x9, x10, x9, ne
; AARCH64-NEXT:    csel x10, xzr, x10, ne
; AARCH64-NEXT:    lsr x11, x13, x12
; AARCH64-NEXT:    eor x9, x9, #0x7fffff
; AARCH64-NEXT:    bic x10, x0, x10
; AARCH64-NEXT:    and x9, x1, x9
; AARCH64-NEXT:    csel x11, x8, x11, ne
; AARCH64-NEXT:    csel x8, xzr, x8, ne
; AARCH64-NEXT:    orr x0, x10, x8
; AARCH64-NEXT:    orr x1, x9, x11
; AARCH64-NEXT:    ret
  %result = bitinsert b87 %base, float %val, i32 %off
  ret b87 %result
}


define b64 @test_bitinsert_double_full(b64 %base, double %val) {
; AARCH64-LABEL: test_bitinsert_double_full:
; AARCH64:       // %bb.0:
; AARCH64-NEXT:    fmov x0, d0
; AARCH64-NEXT:    ret
  %result = bitinsert b64 %base, double %val, i32 0
  ret b64 %result
}

define b128 @test_bitinsert_double_const(b128 %base, double %val) {
; AARCH64-LABEL: test_bitinsert_double_const:
; AARCH64:       // %bb.0:
; AARCH64-NEXT:    fmov x1, d0
; AARCH64-NEXT:    ret
  %result = bitinsert b128 %base, double %val, i32 64
  ret b128 %result
}

define b128 @test_bitinsert_double_var(b128 %base, double %val, i32 %off) {
; AARCH64-LABEL: test_bitinsert_double_var:
; AARCH64:       // %bb.0:
; AARCH64-NEXT:    fmov x8, d0
; AARCH64-NEXT:    mov x9, #9223372036854775807 // =0x7fffffffffffffff
; AARCH64-NEXT:    mvn w10, w2
; AARCH64-NEXT:    mov x12, #-1 // =0xffffffffffffffff
; AARCH64-NEXT:    mov w13, w2
; AARCH64-NEXT:    lsr x9, x9, x10
; AARCH64-NEXT:    tst x13, #0x40
; AARCH64-NEXT:    lsr x11, x8, #1
; AARCH64-NEXT:    lsl x8, x8, x13
; AARCH64-NEXT:    lsr x10, x11, x10
; AARCH64-NEXT:    lsl x11, x12, x13
; AARCH64-NEXT:    csel x9, x11, x9, ne
; AARCH64-NEXT:    csel x11, xzr, x11, ne
; AARCH64-NEXT:    csel x10, x8, x10, ne
; AARCH64-NEXT:    bic x9, x1, x9
; AARCH64-NEXT:    csel x8, xzr, x8, ne
; AARCH64-NEXT:    bic x11, x0, x11
; AARCH64-NEXT:    orr x0, x11, x8
; AARCH64-NEXT:    orr x1, x9, x10
; AARCH64-NEXT:    ret
  %result = bitinsert b128 %base, double %val, i32 %off
  ret b128 %result
}

define b231 @test_bitinsert_double_b231_var(b231 %base, double %val, i32 %off) {
; AARCH64-LABEL: test_bitinsert_double_b231_var:
; AARCH64:       // %bb.0:
; AARCH64-NEXT:    sub sp, sp, #128
; AARCH64-NEXT:    .cfi_def_cfa_offset 128
; AARCH64-NEXT:    mov w8, w4
; AARCH64-NEXT:    movi v1.2d, #0000000000000000
; AARCH64-NEXT:    mov x9, #-1 // =0xffffffffffffffff
; AARCH64-NEXT:    lsr x11, x8, #3
; AARCH64-NEXT:    mov x10, sp
; AARCH64-NEXT:    str x9, [sp, #96]
; AARCH64-NEXT:    add x10, x10, #32
; AARCH64-NEXT:    str xzr, [sp, #56]
; AARCH64-NEXT:    and x15, x8, #0x3f
; AARCH64-NEXT:    and x9, x11, #0x18
; AARCH64-NEXT:    add x11, sp, #64
; AARCH64-NEXT:    str d0, [sp, #32]
; AARCH64-NEXT:    add x11, x11, #32
; AARCH64-NEXT:    stur q1, [sp, #40]
; AARCH64-NEXT:    sub x10, x10, x9
; AARCH64-NEXT:    stp q1, q1, [sp]
; AARCH64-NEXT:    sub x9, x11, x9
; AARCH64-NEXT:    eor x15, x15, #0x3f
; AARCH64-NEXT:    str xzr, [sp, #120]
; AARCH64-NEXT:    stur q1, [sp, #104]
; AARCH64-NEXT:    stp q1, q1, [sp, #64]
; AARCH64-NEXT:    ldp x11, x16, [x9]
; AARCH64-NEXT:    ldp x12, x13, [x10]
; AARCH64-NEXT:    lsr x17, x11, #1
; AARCH64-NEXT:    lsl x5, x16, x8
; AARCH64-NEXT:    lsr x16, x16, #1
; AARCH64-NEXT:    lsr x14, x12, #1
; AARCH64-NEXT:    lsl x18, x13, x8
; AARCH64-NEXT:    lsr x13, x13, #1
; AARCH64-NEXT:    lsr x17, x17, x15
; AARCH64-NEXT:    lsl x11, x11, x8
; AARCH64-NEXT:    lsr x14, x14, x15
; AARCH64-NEXT:    orr x17, x5, x17
; AARCH64-NEXT:    ldp x5, x9, [x9, #16]
; AARCH64-NEXT:    orr x14, x18, x14
; AARCH64-NEXT:    mvn w18, w4
; AARCH64-NEXT:    bic x17, x1, x17
; AARCH64-NEXT:    ldp x4, x10, [x10, #16]
; AARCH64-NEXT:    lsr x13, x13, x18
; AARCH64-NEXT:    lsr x1, x5, #1
; AARCH64-NEXT:    lsl x9, x9, x8
; AARCH64-NEXT:    lsr x16, x16, x18
; AARCH64-NEXT:    lsl x18, x5, x8
; AARCH64-NEXT:    bic x11, x0, x11
; AARCH64-NEXT:    lsl x6, x4, x8
; AARCH64-NEXT:    lsr x4, x4, #1
; AARCH64-NEXT:    lsr x1, x1, x15
; AARCH64-NEXT:    lsl x10, x10, x8
; AARCH64-NEXT:    orr x16, x18, x16
; AARCH64-NEXT:    lsl x8, x12, x8
; AARCH64-NEXT:    lsr x15, x4, x15
; AARCH64-NEXT:    orr x9, x9, x1
; AARCH64-NEXT:    orr x13, x6, x13
; AARCH64-NEXT:    eor x9, x9, #0x7fffffffff
; AARCH64-NEXT:    bic x12, x2, x16
; AARCH64-NEXT:    orr x0, x11, x8
; AARCH64-NEXT:    orr x10, x10, x15
; AARCH64-NEXT:    and x9, x3, x9
; AARCH64-NEXT:    orr x1, x17, x14
; AARCH64-NEXT:    orr x2, x12, x13
; AARCH64-NEXT:    orr x3, x9, x10
; AARCH64-NEXT:    add sp, sp, #128
; AARCH64-NEXT:    ret
  %result = bitinsert b231 %base, double %val, i32 %off
  ret b231 %result
}