| // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 6 |
| // RUN: %clang_cc1 -triple dxil-pc-shadermodel6.7-library -disable-llvm-passes -emit-llvm -finclude-default-header -fmatrix-memory-layout=row-major -o - %s | FileCheck %s --check-prefixes=CHECK,ROW-CHECK |
| // RUN: %clang_cc1 -triple dxil-pc-shadermodel6.7-library -disable-llvm-passes -emit-llvm -finclude-default-header -fmatrix-memory-layout=column-major -o - %s | FileCheck %s --check-prefixes=CHECK,COL-CHECK |
| |
| // ROW-CHECK-LABEL: define hidden noundef <12 x i32> @_Z10trunc_castu11matrix_typeILm4ELm4EiE( |
| // ROW-CHECK-SAME: <16 x i32> noundef [[I44:%.*]]) #[[ATTR0:[0-9]+]] { |
| // ROW-CHECK-NEXT: [[ENTRY:.*:]] |
| // ROW-CHECK-NEXT: [[TMP0:%.*]] = call token @llvm.experimental.convergence.entry() |
| // ROW-CHECK-NEXT: [[I44_ADDR:%.*]] = alloca [4 x <4 x i32>], align 4 |
| // ROW-CHECK-NEXT: [[I34:%.*]] = alloca [3 x <4 x i32>], align 4 |
| // ROW-CHECK-NEXT: [[TMP1:%.*]] = call <16 x i32> @llvm.matrix.transpose.v16i32(<16 x i32> [[I44]], i32 4, i32 4) |
| // ROW-CHECK-NEXT: store <16 x i32> [[TMP1]], ptr [[I44_ADDR]], align 4 |
| // ROW-CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr [[I44_ADDR]], align 4 |
| // ROW-CHECK-NEXT: [[TMP3:%.*]] = call <16 x i32> @llvm.matrix.transpose.v16i32(<16 x i32> [[TMP2]], i32 4, i32 4) |
| // ROW-CHECK-NEXT: [[TRUNC:%.*]] = shufflevector <16 x i32> [[TMP3]], <16 x i32> poison, <12 x i32> <i32 0, i32 1, i32 2, i32 4, i32 5, i32 6, i32 8, i32 9, i32 10, i32 12, i32 13, i32 14> |
| // ROW-CHECK-NEXT: [[TMP4:%.*]] = call <12 x i32> @llvm.matrix.transpose.v12i32(<12 x i32> [[TRUNC]], i32 3, i32 4) |
| // ROW-CHECK-NEXT: store <12 x i32> [[TMP4]], ptr [[I34]], align 4 |
| // ROW-CHECK-NEXT: [[TMP5:%.*]] = load <12 x i32>, ptr [[I34]], align 4 |
| // ROW-CHECK-NEXT: [[TMP6:%.*]] = call <12 x i32> @llvm.matrix.transpose.v12i32(<12 x i32> [[TMP5]], i32 4, i32 3) |
| // ROW-CHECK-NEXT: ret <12 x i32> [[TMP6]] |
| // |
| // COL-CHECK-LABEL: define hidden noundef <12 x i32> @_Z10trunc_castu11matrix_typeILm4ELm4EiE( |
| // COL-CHECK-SAME: <16 x i32> noundef [[I44:%.*]]) #[[ATTR0:[0-9]+]] { |
| // COL-CHECK-NEXT: [[ENTRY:.*:]] |
| // COL-CHECK-NEXT: [[TMP0:%.*]] = call token @llvm.experimental.convergence.entry() |
| // COL-CHECK-NEXT: [[I44_ADDR:%.*]] = alloca [4 x <4 x i32>], align 4 |
| // COL-CHECK-NEXT: [[I34:%.*]] = alloca [4 x <3 x i32>], align 4 |
| // COL-CHECK-NEXT: store <16 x i32> [[I44]], ptr [[I44_ADDR]], align 4 |
| // COL-CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr [[I44_ADDR]], align 4 |
| // COL-CHECK-NEXT: [[TRUNC:%.*]] = shufflevector <16 x i32> [[TMP1]], <16 x i32> poison, <12 x i32> <i32 0, i32 1, i32 2, i32 4, i32 5, i32 6, i32 8, i32 9, i32 10, i32 12, i32 13, i32 14> |
| // COL-CHECK-NEXT: store <12 x i32> [[TRUNC]], ptr [[I34]], align 4 |
| // COL-CHECK-NEXT: [[TMP2:%.*]] = load <12 x i32>, ptr [[I34]], align 4 |
| // COL-CHECK-NEXT: ret <12 x i32> [[TMP2]] |
| // |
| int3x4 trunc_cast(int4x4 i44) { |
| int3x4 i34 = i44; |
| return i34; |
| } |
| |
| // ROW-CHECK-LABEL: define hidden noundef <12 x i32> @_Z11trunc_cast0u11matrix_typeILm4ELm4EiE( |
| // ROW-CHECK-SAME: <16 x i32> noundef [[I44:%.*]]) #[[ATTR0]] { |
| // ROW-CHECK-NEXT: [[ENTRY:.*:]] |
| // ROW-CHECK-NEXT: [[TMP0:%.*]] = call token @llvm.experimental.convergence.entry() |
| // ROW-CHECK-NEXT: [[I44_ADDR:%.*]] = alloca [4 x <4 x i32>], align 4 |
| // ROW-CHECK-NEXT: [[I43:%.*]] = alloca [4 x <3 x i32>], align 4 |
| // ROW-CHECK-NEXT: [[TMP1:%.*]] = call <16 x i32> @llvm.matrix.transpose.v16i32(<16 x i32> [[I44]], i32 4, i32 4) |
| // ROW-CHECK-NEXT: store <16 x i32> [[TMP1]], ptr [[I44_ADDR]], align 4 |
| // ROW-CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr [[I44_ADDR]], align 4 |
| // ROW-CHECK-NEXT: [[TMP3:%.*]] = call <16 x i32> @llvm.matrix.transpose.v16i32(<16 x i32> [[TMP2]], i32 4, i32 4) |
| // ROW-CHECK-NEXT: [[TRUNC:%.*]] = shufflevector <16 x i32> [[TMP3]], <16 x i32> poison, <12 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11> |
| // ROW-CHECK-NEXT: [[TMP4:%.*]] = call <12 x i32> @llvm.matrix.transpose.v12i32(<12 x i32> [[TRUNC]], i32 4, i32 3) |
| // ROW-CHECK-NEXT: store <12 x i32> [[TMP4]], ptr [[I43]], align 4 |
| // ROW-CHECK-NEXT: [[TMP5:%.*]] = load <12 x i32>, ptr [[I43]], align 4 |
| // ROW-CHECK-NEXT: [[TMP6:%.*]] = call <12 x i32> @llvm.matrix.transpose.v12i32(<12 x i32> [[TMP5]], i32 3, i32 4) |
| // ROW-CHECK-NEXT: ret <12 x i32> [[TMP6]] |
| // |
| // COL-CHECK-LABEL: define hidden noundef <12 x i32> @_Z11trunc_cast0u11matrix_typeILm4ELm4EiE( |
| // COL-CHECK-SAME: <16 x i32> noundef [[I44:%.*]]) #[[ATTR0]] { |
| // COL-CHECK-NEXT: [[ENTRY:.*:]] |
| // COL-CHECK-NEXT: [[TMP0:%.*]] = call token @llvm.experimental.convergence.entry() |
| // COL-CHECK-NEXT: [[I44_ADDR:%.*]] = alloca [4 x <4 x i32>], align 4 |
| // COL-CHECK-NEXT: [[I43:%.*]] = alloca [3 x <4 x i32>], align 4 |
| // COL-CHECK-NEXT: store <16 x i32> [[I44]], ptr [[I44_ADDR]], align 4 |
| // COL-CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr [[I44_ADDR]], align 4 |
| // COL-CHECK-NEXT: [[TRUNC:%.*]] = shufflevector <16 x i32> [[TMP1]], <16 x i32> poison, <12 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11> |
| // COL-CHECK-NEXT: store <12 x i32> [[TRUNC]], ptr [[I43]], align 4 |
| // COL-CHECK-NEXT: [[TMP2:%.*]] = load <12 x i32>, ptr [[I43]], align 4 |
| // COL-CHECK-NEXT: ret <12 x i32> [[TMP2]] |
| // |
| int4x3 trunc_cast0(int4x4 i44) { |
| int4x3 i43 = i44; |
| return i43; |
| } |
| |
| // ROW-CHECK-LABEL: define hidden noundef <9 x i32> @_Z11trunc_cast1u11matrix_typeILm4ELm4EiE( |
| // ROW-CHECK-SAME: <16 x i32> noundef [[I44:%.*]]) #[[ATTR0]] { |
| // ROW-CHECK-NEXT: [[ENTRY:.*:]] |
| // ROW-CHECK-NEXT: [[TMP0:%.*]] = call token @llvm.experimental.convergence.entry() |
| // ROW-CHECK-NEXT: [[I44_ADDR:%.*]] = alloca [4 x <4 x i32>], align 4 |
| // ROW-CHECK-NEXT: [[I33:%.*]] = alloca [3 x <3 x i32>], align 4 |
| // ROW-CHECK-NEXT: [[TMP1:%.*]] = call <16 x i32> @llvm.matrix.transpose.v16i32(<16 x i32> [[I44]], i32 4, i32 4) |
| // ROW-CHECK-NEXT: store <16 x i32> [[TMP1]], ptr [[I44_ADDR]], align 4 |
| // ROW-CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr [[I44_ADDR]], align 4 |
| // ROW-CHECK-NEXT: [[TMP3:%.*]] = call <16 x i32> @llvm.matrix.transpose.v16i32(<16 x i32> [[TMP2]], i32 4, i32 4) |
| // ROW-CHECK-NEXT: [[TRUNC:%.*]] = shufflevector <16 x i32> [[TMP3]], <16 x i32> poison, <9 x i32> <i32 0, i32 1, i32 2, i32 4, i32 5, i32 6, i32 8, i32 9, i32 10> |
| // ROW-CHECK-NEXT: [[TMP4:%.*]] = call <9 x i32> @llvm.matrix.transpose.v9i32(<9 x i32> [[TRUNC]], i32 3, i32 3) |
| // ROW-CHECK-NEXT: store <9 x i32> [[TMP4]], ptr [[I33]], align 4 |
| // ROW-CHECK-NEXT: [[TMP5:%.*]] = load <9 x i32>, ptr [[I33]], align 4 |
| // ROW-CHECK-NEXT: [[TMP6:%.*]] = call <9 x i32> @llvm.matrix.transpose.v9i32(<9 x i32> [[TMP5]], i32 3, i32 3) |
| // ROW-CHECK-NEXT: ret <9 x i32> [[TMP6]] |
| // |
| // COL-CHECK-LABEL: define hidden noundef <9 x i32> @_Z11trunc_cast1u11matrix_typeILm4ELm4EiE( |
| // COL-CHECK-SAME: <16 x i32> noundef [[I44:%.*]]) #[[ATTR0]] { |
| // COL-CHECK-NEXT: [[ENTRY:.*:]] |
| // COL-CHECK-NEXT: [[TMP0:%.*]] = call token @llvm.experimental.convergence.entry() |
| // COL-CHECK-NEXT: [[I44_ADDR:%.*]] = alloca [4 x <4 x i32>], align 4 |
| // COL-CHECK-NEXT: [[I33:%.*]] = alloca [3 x <3 x i32>], align 4 |
| // COL-CHECK-NEXT: store <16 x i32> [[I44]], ptr [[I44_ADDR]], align 4 |
| // COL-CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr [[I44_ADDR]], align 4 |
| // COL-CHECK-NEXT: [[TRUNC:%.*]] = shufflevector <16 x i32> [[TMP1]], <16 x i32> poison, <9 x i32> <i32 0, i32 1, i32 2, i32 4, i32 5, i32 6, i32 8, i32 9, i32 10> |
| // COL-CHECK-NEXT: store <9 x i32> [[TRUNC]], ptr [[I33]], align 4 |
| // COL-CHECK-NEXT: [[TMP2:%.*]] = load <9 x i32>, ptr [[I33]], align 4 |
| // COL-CHECK-NEXT: ret <9 x i32> [[TMP2]] |
| // |
| int3x3 trunc_cast1(int4x4 i44) { |
| int3x3 i33 = i44; |
| return i33; |
| } |
| |
| // ROW-CHECK-LABEL: define hidden noundef <6 x i32> @_Z11trunc_cast2u11matrix_typeILm4ELm4EiE( |
| // ROW-CHECK-SAME: <16 x i32> noundef [[I44:%.*]]) #[[ATTR0]] { |
| // ROW-CHECK-NEXT: [[ENTRY:.*:]] |
| // ROW-CHECK-NEXT: [[TMP0:%.*]] = call token @llvm.experimental.convergence.entry() |
| // ROW-CHECK-NEXT: [[I44_ADDR:%.*]] = alloca [4 x <4 x i32>], align 4 |
| // ROW-CHECK-NEXT: [[I32:%.*]] = alloca [3 x <2 x i32>], align 4 |
| // ROW-CHECK-NEXT: [[TMP1:%.*]] = call <16 x i32> @llvm.matrix.transpose.v16i32(<16 x i32> [[I44]], i32 4, i32 4) |
| // ROW-CHECK-NEXT: store <16 x i32> [[TMP1]], ptr [[I44_ADDR]], align 4 |
| // ROW-CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr [[I44_ADDR]], align 4 |
| // ROW-CHECK-NEXT: [[TMP3:%.*]] = call <16 x i32> @llvm.matrix.transpose.v16i32(<16 x i32> [[TMP2]], i32 4, i32 4) |
| // ROW-CHECK-NEXT: [[TRUNC:%.*]] = shufflevector <16 x i32> [[TMP3]], <16 x i32> poison, <6 x i32> <i32 0, i32 1, i32 2, i32 4, i32 5, i32 6> |
| // ROW-CHECK-NEXT: [[TMP4:%.*]] = call <6 x i32> @llvm.matrix.transpose.v6i32(<6 x i32> [[TRUNC]], i32 3, i32 2) |
| // ROW-CHECK-NEXT: store <6 x i32> [[TMP4]], ptr [[I32]], align 4 |
| // ROW-CHECK-NEXT: [[TMP5:%.*]] = load <6 x i32>, ptr [[I32]], align 4 |
| // ROW-CHECK-NEXT: [[TMP6:%.*]] = call <6 x i32> @llvm.matrix.transpose.v6i32(<6 x i32> [[TMP5]], i32 2, i32 3) |
| // ROW-CHECK-NEXT: ret <6 x i32> [[TMP6]] |
| // |
| // COL-CHECK-LABEL: define hidden noundef <6 x i32> @_Z11trunc_cast2u11matrix_typeILm4ELm4EiE( |
| // COL-CHECK-SAME: <16 x i32> noundef [[I44:%.*]]) #[[ATTR0]] { |
| // COL-CHECK-NEXT: [[ENTRY:.*:]] |
| // COL-CHECK-NEXT: [[TMP0:%.*]] = call token @llvm.experimental.convergence.entry() |
| // COL-CHECK-NEXT: [[I44_ADDR:%.*]] = alloca [4 x <4 x i32>], align 4 |
| // COL-CHECK-NEXT: [[I32:%.*]] = alloca [2 x <3 x i32>], align 4 |
| // COL-CHECK-NEXT: store <16 x i32> [[I44]], ptr [[I44_ADDR]], align 4 |
| // COL-CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr [[I44_ADDR]], align 4 |
| // COL-CHECK-NEXT: [[TRUNC:%.*]] = shufflevector <16 x i32> [[TMP1]], <16 x i32> poison, <6 x i32> <i32 0, i32 1, i32 2, i32 4, i32 5, i32 6> |
| // COL-CHECK-NEXT: store <6 x i32> [[TRUNC]], ptr [[I32]], align 4 |
| // COL-CHECK-NEXT: [[TMP2:%.*]] = load <6 x i32>, ptr [[I32]], align 4 |
| // COL-CHECK-NEXT: ret <6 x i32> [[TMP2]] |
| // |
| int3x2 trunc_cast2(int4x4 i44) { |
| int3x2 i32 = i44; |
| return i32; |
| } |
| |
| // ROW-CHECK-LABEL: define hidden noundef <6 x i32> @_Z11trunc_cast3u11matrix_typeILm4ELm4EiE( |
| // ROW-CHECK-SAME: <16 x i32> noundef [[I44:%.*]]) #[[ATTR0]] { |
| // ROW-CHECK-NEXT: [[ENTRY:.*:]] |
| // ROW-CHECK-NEXT: [[TMP0:%.*]] = call token @llvm.experimental.convergence.entry() |
| // ROW-CHECK-NEXT: [[I44_ADDR:%.*]] = alloca [4 x <4 x i32>], align 4 |
| // ROW-CHECK-NEXT: [[I23:%.*]] = alloca [2 x <3 x i32>], align 4 |
| // ROW-CHECK-NEXT: [[TMP1:%.*]] = call <16 x i32> @llvm.matrix.transpose.v16i32(<16 x i32> [[I44]], i32 4, i32 4) |
| // ROW-CHECK-NEXT: store <16 x i32> [[TMP1]], ptr [[I44_ADDR]], align 4 |
| // ROW-CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr [[I44_ADDR]], align 4 |
| // ROW-CHECK-NEXT: [[TMP3:%.*]] = call <16 x i32> @llvm.matrix.transpose.v16i32(<16 x i32> [[TMP2]], i32 4, i32 4) |
| // ROW-CHECK-NEXT: [[TRUNC:%.*]] = shufflevector <16 x i32> [[TMP3]], <16 x i32> poison, <6 x i32> <i32 0, i32 1, i32 4, i32 5, i32 8, i32 9> |
| // ROW-CHECK-NEXT: [[TMP4:%.*]] = call <6 x i32> @llvm.matrix.transpose.v6i32(<6 x i32> [[TRUNC]], i32 2, i32 3) |
| // ROW-CHECK-NEXT: store <6 x i32> [[TMP4]], ptr [[I23]], align 4 |
| // ROW-CHECK-NEXT: [[TMP5:%.*]] = load <6 x i32>, ptr [[I23]], align 4 |
| // ROW-CHECK-NEXT: [[TMP6:%.*]] = call <6 x i32> @llvm.matrix.transpose.v6i32(<6 x i32> [[TMP5]], i32 3, i32 2) |
| // ROW-CHECK-NEXT: ret <6 x i32> [[TMP6]] |
| // |
| // COL-CHECK-LABEL: define hidden noundef <6 x i32> @_Z11trunc_cast3u11matrix_typeILm4ELm4EiE( |
| // COL-CHECK-SAME: <16 x i32> noundef [[I44:%.*]]) #[[ATTR0]] { |
| // COL-CHECK-NEXT: [[ENTRY:.*:]] |
| // COL-CHECK-NEXT: [[TMP0:%.*]] = call token @llvm.experimental.convergence.entry() |
| // COL-CHECK-NEXT: [[I44_ADDR:%.*]] = alloca [4 x <4 x i32>], align 4 |
| // COL-CHECK-NEXT: [[I23:%.*]] = alloca [3 x <2 x i32>], align 4 |
| // COL-CHECK-NEXT: store <16 x i32> [[I44]], ptr [[I44_ADDR]], align 4 |
| // COL-CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr [[I44_ADDR]], align 4 |
| // COL-CHECK-NEXT: [[TRUNC:%.*]] = shufflevector <16 x i32> [[TMP1]], <16 x i32> poison, <6 x i32> <i32 0, i32 1, i32 4, i32 5, i32 8, i32 9> |
| // COL-CHECK-NEXT: store <6 x i32> [[TRUNC]], ptr [[I23]], align 4 |
| // COL-CHECK-NEXT: [[TMP2:%.*]] = load <6 x i32>, ptr [[I23]], align 4 |
| // COL-CHECK-NEXT: ret <6 x i32> [[TMP2]] |
| // |
| int2x3 trunc_cast3(int4x4 i44) { |
| int2x3 i23 = i44; |
| return i23; |
| } |
| |
| // ROW-CHECK-LABEL: define hidden noundef <4 x i32> @_Z11trunc_cast4u11matrix_typeILm4ELm4EiE( |
| // ROW-CHECK-SAME: <16 x i32> noundef [[I44:%.*]]) #[[ATTR0]] { |
| // ROW-CHECK-NEXT: [[ENTRY:.*:]] |
| // ROW-CHECK-NEXT: [[TMP0:%.*]] = call token @llvm.experimental.convergence.entry() |
| // ROW-CHECK-NEXT: [[I44_ADDR:%.*]] = alloca [4 x <4 x i32>], align 4 |
| // ROW-CHECK-NEXT: [[I22:%.*]] = alloca [2 x <2 x i32>], align 4 |
| // ROW-CHECK-NEXT: [[TMP1:%.*]] = call <16 x i32> @llvm.matrix.transpose.v16i32(<16 x i32> [[I44]], i32 4, i32 4) |
| // ROW-CHECK-NEXT: store <16 x i32> [[TMP1]], ptr [[I44_ADDR]], align 4 |
| // ROW-CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr [[I44_ADDR]], align 4 |
| // ROW-CHECK-NEXT: [[TMP3:%.*]] = call <16 x i32> @llvm.matrix.transpose.v16i32(<16 x i32> [[TMP2]], i32 4, i32 4) |
| // ROW-CHECK-NEXT: [[TRUNC:%.*]] = shufflevector <16 x i32> [[TMP3]], <16 x i32> poison, <4 x i32> <i32 0, i32 1, i32 4, i32 5> |
| // ROW-CHECK-NEXT: [[TMP4:%.*]] = call <4 x i32> @llvm.matrix.transpose.v4i32(<4 x i32> [[TRUNC]], i32 2, i32 2) |
| // ROW-CHECK-NEXT: store <4 x i32> [[TMP4]], ptr [[I22]], align 4 |
| // ROW-CHECK-NEXT: [[TMP5:%.*]] = load <4 x i32>, ptr [[I22]], align 4 |
| // ROW-CHECK-NEXT: [[TMP6:%.*]] = call <4 x i32> @llvm.matrix.transpose.v4i32(<4 x i32> [[TMP5]], i32 2, i32 2) |
| // ROW-CHECK-NEXT: ret <4 x i32> [[TMP6]] |
| // |
| // COL-CHECK-LABEL: define hidden noundef <4 x i32> @_Z11trunc_cast4u11matrix_typeILm4ELm4EiE( |
| // COL-CHECK-SAME: <16 x i32> noundef [[I44:%.*]]) #[[ATTR0]] { |
| // COL-CHECK-NEXT: [[ENTRY:.*:]] |
| // COL-CHECK-NEXT: [[TMP0:%.*]] = call token @llvm.experimental.convergence.entry() |
| // COL-CHECK-NEXT: [[I44_ADDR:%.*]] = alloca [4 x <4 x i32>], align 4 |
| // COL-CHECK-NEXT: [[I22:%.*]] = alloca [2 x <2 x i32>], align 4 |
| // COL-CHECK-NEXT: store <16 x i32> [[I44]], ptr [[I44_ADDR]], align 4 |
| // COL-CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr [[I44_ADDR]], align 4 |
| // COL-CHECK-NEXT: [[TRUNC:%.*]] = shufflevector <16 x i32> [[TMP1]], <16 x i32> poison, <4 x i32> <i32 0, i32 1, i32 4, i32 5> |
| // COL-CHECK-NEXT: store <4 x i32> [[TRUNC]], ptr [[I22]], align 4 |
| // COL-CHECK-NEXT: [[TMP2:%.*]] = load <4 x i32>, ptr [[I22]], align 4 |
| // COL-CHECK-NEXT: ret <4 x i32> [[TMP2]] |
| // |
| int2x2 trunc_cast4(int4x4 i44) { |
| int2x2 i22 = i44; |
| return i22; |
| } |
| |
| // ROW-CHECK-LABEL: define hidden noundef <2 x i32> @_Z11trunc_cast5u11matrix_typeILm4ELm4EiE( |
| // ROW-CHECK-SAME: <16 x i32> noundef [[I44:%.*]]) #[[ATTR0]] { |
| // ROW-CHECK-NEXT: [[ENTRY:.*:]] |
| // ROW-CHECK-NEXT: [[TMP0:%.*]] = call token @llvm.experimental.convergence.entry() |
| // ROW-CHECK-NEXT: [[I44_ADDR:%.*]] = alloca [4 x <4 x i32>], align 4 |
| // ROW-CHECK-NEXT: [[I21:%.*]] = alloca [2 x <1 x i32>], align 4 |
| // ROW-CHECK-NEXT: [[TMP1:%.*]] = call <16 x i32> @llvm.matrix.transpose.v16i32(<16 x i32> [[I44]], i32 4, i32 4) |
| // ROW-CHECK-NEXT: store <16 x i32> [[TMP1]], ptr [[I44_ADDR]], align 4 |
| // ROW-CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr [[I44_ADDR]], align 4 |
| // ROW-CHECK-NEXT: [[TMP3:%.*]] = call <16 x i32> @llvm.matrix.transpose.v16i32(<16 x i32> [[TMP2]], i32 4, i32 4) |
| // ROW-CHECK-NEXT: [[TRUNC:%.*]] = shufflevector <16 x i32> [[TMP3]], <16 x i32> poison, <2 x i32> <i32 0, i32 1> |
| // ROW-CHECK-NEXT: [[TMP4:%.*]] = call <2 x i32> @llvm.matrix.transpose.v2i32(<2 x i32> [[TRUNC]], i32 2, i32 1) |
| // ROW-CHECK-NEXT: store <2 x i32> [[TMP4]], ptr [[I21]], align 4 |
| // ROW-CHECK-NEXT: [[TMP5:%.*]] = load <2 x i32>, ptr [[I21]], align 4 |
| // ROW-CHECK-NEXT: [[TMP6:%.*]] = call <2 x i32> @llvm.matrix.transpose.v2i32(<2 x i32> [[TMP5]], i32 1, i32 2) |
| // ROW-CHECK-NEXT: ret <2 x i32> [[TMP6]] |
| // |
| // COL-CHECK-LABEL: define hidden noundef <2 x i32> @_Z11trunc_cast5u11matrix_typeILm4ELm4EiE( |
| // COL-CHECK-SAME: <16 x i32> noundef [[I44:%.*]]) #[[ATTR0]] { |
| // COL-CHECK-NEXT: [[ENTRY:.*:]] |
| // COL-CHECK-NEXT: [[TMP0:%.*]] = call token @llvm.experimental.convergence.entry() |
| // COL-CHECK-NEXT: [[I44_ADDR:%.*]] = alloca [4 x <4 x i32>], align 4 |
| // COL-CHECK-NEXT: [[I21:%.*]] = alloca [1 x <2 x i32>], align 4 |
| // COL-CHECK-NEXT: store <16 x i32> [[I44]], ptr [[I44_ADDR]], align 4 |
| // COL-CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr [[I44_ADDR]], align 4 |
| // COL-CHECK-NEXT: [[TRUNC:%.*]] = shufflevector <16 x i32> [[TMP1]], <16 x i32> poison, <2 x i32> <i32 0, i32 1> |
| // COL-CHECK-NEXT: store <2 x i32> [[TRUNC]], ptr [[I21]], align 4 |
| // COL-CHECK-NEXT: [[TMP2:%.*]] = load <2 x i32>, ptr [[I21]], align 4 |
| // COL-CHECK-NEXT: ret <2 x i32> [[TMP2]] |
| // |
| int2x1 trunc_cast5(int4x4 i44) { |
| int2x1 i21 = i44; |
| return i21; |
| } |
| |
| // ROW-CHECK-LABEL: define hidden noundef i32 @_Z11trunc_cast6u11matrix_typeILm4ELm4EiE( |
| // ROW-CHECK-SAME: <16 x i32> noundef [[I44:%.*]]) #[[ATTR0]] { |
| // ROW-CHECK-NEXT: [[ENTRY:.*:]] |
| // ROW-CHECK-NEXT: [[TMP0:%.*]] = call token @llvm.experimental.convergence.entry() |
| // ROW-CHECK-NEXT: [[I44_ADDR:%.*]] = alloca [4 x <4 x i32>], align 4 |
| // ROW-CHECK-NEXT: [[I1:%.*]] = alloca i32, align 4 |
| // ROW-CHECK-NEXT: [[TMP1:%.*]] = call <16 x i32> @llvm.matrix.transpose.v16i32(<16 x i32> [[I44]], i32 4, i32 4) |
| // ROW-CHECK-NEXT: store <16 x i32> [[TMP1]], ptr [[I44_ADDR]], align 4 |
| // ROW-CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr [[I44_ADDR]], align 4 |
| // ROW-CHECK-NEXT: [[TMP3:%.*]] = call <16 x i32> @llvm.matrix.transpose.v16i32(<16 x i32> [[TMP2]], i32 4, i32 4) |
| // ROW-CHECK-NEXT: [[CAST_MTRUNC:%.*]] = extractelement <16 x i32> [[TMP3]], i32 0 |
| // ROW-CHECK-NEXT: store i32 [[CAST_MTRUNC]], ptr [[I1]], align 4 |
| // ROW-CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[I1]], align 4 |
| // ROW-CHECK-NEXT: ret i32 [[TMP4]] |
| // |
| // COL-CHECK-LABEL: define hidden noundef i32 @_Z11trunc_cast6u11matrix_typeILm4ELm4EiE( |
| // COL-CHECK-SAME: <16 x i32> noundef [[I44:%.*]]) #[[ATTR0]] { |
| // COL-CHECK-NEXT: [[ENTRY:.*:]] |
| // COL-CHECK-NEXT: [[TMP0:%.*]] = call token @llvm.experimental.convergence.entry() |
| // COL-CHECK-NEXT: [[I44_ADDR:%.*]] = alloca [4 x <4 x i32>], align 4 |
| // COL-CHECK-NEXT: [[I1:%.*]] = alloca i32, align 4 |
| // COL-CHECK-NEXT: store <16 x i32> [[I44]], ptr [[I44_ADDR]], align 4 |
| // COL-CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, ptr [[I44_ADDR]], align 4 |
| // COL-CHECK-NEXT: [[CAST_MTRUNC:%.*]] = extractelement <16 x i32> [[TMP1]], i32 0 |
| // COL-CHECK-NEXT: store i32 [[CAST_MTRUNC]], ptr [[I1]], align 4 |
| // COL-CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[I1]], align 4 |
| // COL-CHECK-NEXT: ret i32 [[TMP2]] |
| // |
| int trunc_cast6(int4x4 i44) { |
| int i1 = i44; |
| return i1; |
| } |
| //// NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line: |
| // CHECK: {{.*}} |
