llvm/test/CodeGen/SystemZ/regcoal-subranges-update-remat.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc  -mcpu=z13 -O3 -misched=ilpmin -systemz-subreg-liveness  -verify-machineinstrs -start-before register-coalescer %s -mtriple s390x-ibm-linux -stop-after machine-scheduler -o - | FileCheck %s

# Check that when the register coalescer rematerializes a register to set
# only a sub register, it sets the subranges of the unused lanes as being dead
# at the definition point.
#
# The way that test exercises that comes in two steps:
# - First, we need the register coalescer to rematerialize something.
#   In that test, %0 is rematerializable and will be rematerialized in
#   %1 since %1 and %0 cannot be directly coalesced (they interfere).
# - Second, we indirectly check that the subranges are valid for %1
#   when, in the machine scheduler, we move the instructions that define %1
#   closer to the return instruction (i.e., we move MSFI and the rematerialized
#   definition of %0 (i.e., %1 = LGHI 25) down). When doing that displacement,
#   the scheduler updates the live-ranges of %1. When the subrange for the
#   unused lane (here the subrange for %1.subreg_h32) was not correct, the
#   scheduler would hit an assertion or access some invalid memory location
#   making the compiler crash.
#
# Bottom line, this test checks what was intended if at the end, both %0 and %1
# are defined with `LGHI 25` and the instructions defining %1 are right before
# the return instruction.
#
# PR41372
---
name:            main
tracksRegLiveness: true
body:             |
  bb.0:

    ; CHECK-LABEL: name: main
    ; CHECK: [[LGHI:%[0-9]+]]:gr64bit = LGHI 25
    ; CHECK-NEXT: CHIMux [[LGHI]].subreg_l32, 0, implicit-def $cc
    ; CHECK-NEXT: [[LGHI1:%[0-9]+]]:gr64bit = LGHI 25
    ; CHECK-NEXT: undef [[LGHI1:%[0-9]+]].subreg_l32:gr64bit = MSFI [[LGHI1]].subreg_l32, -117440512
    ; CHECK-NEXT: Return implicit [[LGHI1]].subreg_l32
    %0:gr64bit = LGHI 25
    %1:gr32bit = COPY %0.subreg_l32
    %1:gr32bit = MSFI %1, -117440512
    %2:grx32bit = COPY %0.subreg_l32
    CHIMux killed %2, 0, implicit-def $cc
    %3:gr32bit = COPY killed %1
    Return implicit %3
...

---
name:            test_dead_at_remat_later_defined
tracksRegLiveness: true
body:             |
  bb.0:
    ; CHECK-LABEL: name: test_dead_at_remat_later_defined
    ; CHECK: undef [[LHI:%[0-9]+]].subreg_l32:gr128bit = LHI 0
    ; CHECK-NEXT: [[LHI:%[0-9]+]].subreg_l64:gr128bit = LGHI 2
    ; CHECK-NEXT: [[LHI1:%[0-9]+]]:gr32bit = LHI 1
    ; CHECK-NEXT: [[LHI:%[0-9]+]].subreg_lh32:gr128bit = COPY [[LHI1]]
    ; CHECK-NEXT: [[LGHI:%[0-9]+]]:gr64bit = LGHI 2
    ; CHECK-NEXT: [[LHI:%[0-9]+]].subreg_h32:gr128bit = COPY [[LGHI]].subreg_l32
    ; CHECK-NEXT: $r0q = COPY [[LHI]]
    ; CHECK-NEXT: $r4d = COPY [[LGHI]].subreg_h32
    %0:gr64bit = LGHI 2
    %1:gr32bit = LHI 0
    %2:gr32bit = LHI 1
    undef %3.subreg_ll32:gr128bit = COPY %0.subreg_l32
    %3.subreg_lh32:gr128bit = COPY %2
    %3.subreg_l32:gr128bit = COPY %1
    %3.subreg_h32:gr128bit = COPY %0.subreg_l32
    $r0q = COPY %3
    $r4d = COPY %0.subreg_h32
...