llvm/test/CodeGen/RISCV/atomic-rmw-minmax.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=riscv32 -mattr=+b,+zalrsc -verify-machineinstrs < %s \
; RUN:   | FileCheck -check-prefixes=RV32IB-COMMON,RV32IB-ZALRSC %s
; RUN: llc -mtriple=riscv32 -mattr=+b,+zalrsc,+permissive-zalrsc -verify-machineinstrs < %s \
; RUN:   | FileCheck -check-prefixes=RV32IB-COMMON,RV32IB-ZALRSC-PERM %s
; RUN: llc -mtriple=riscv32 -mattr=+b,+zalrsc,+permissive-zalrsc,+a -verify-machineinstrs < %s \
; RUN:   | FileCheck -check-prefixes=RV32IB-COMMON,RV32IAB %s
;
; RUN: llc -mtriple=riscv64 -mattr=+b,+zalrsc -verify-machineinstrs < %s \
; RUN:   | FileCheck -check-prefixes=RV64IB-ZALRSC %s
; RUN: llc -mtriple=riscv64 -mattr=+b,+zalrsc,+permissive-zalrsc -verify-machineinstrs < %s \
; RUN:   | FileCheck -check-prefixes=RV64IB-ZALRSC-PERM %s
; RUN: llc -mtriple=riscv64 -mattr=+b,+zalrsc,+permissive-zalrsc,+a -verify-machineinstrs < %s \
; RUN:   | FileCheck -check-prefixes=RV64IAB %s

define i32 @atomicrmw_max_i32_seq_cst(ptr %a, i32 %b) nounwind {
; RV32IB-ZALRSC-LABEL: atomicrmw_max_i32_seq_cst:
; RV32IB-ZALRSC:       # %bb.0:
; RV32IB-ZALRSC-NEXT:  .LBB0_1: # =>This Inner Loop Header: Depth=1
; RV32IB-ZALRSC-NEXT:    lr.w.aqrl a2, (a0)
; RV32IB-ZALRSC-NEXT:    mv a3, a2
; RV32IB-ZALRSC-NEXT:    bge a3, a1, .LBB0_3
; RV32IB-ZALRSC-NEXT:  # %bb.2: # in Loop: Header=BB0_1 Depth=1
; RV32IB-ZALRSC-NEXT:    mv a3, a1
; RV32IB-ZALRSC-NEXT:  .LBB0_3: # in Loop: Header=BB0_1 Depth=1
; RV32IB-ZALRSC-NEXT:    sc.w.rl a3, a3, (a0)
; RV32IB-ZALRSC-NEXT:    bnez a3, .LBB0_1
; RV32IB-ZALRSC-NEXT:  # %bb.4:
; RV32IB-ZALRSC-NEXT:    mv a0, a2
; RV32IB-ZALRSC-NEXT:    ret
;
; RV32IB-ZALRSC-PERM-LABEL: atomicrmw_max_i32_seq_cst:
; RV32IB-ZALRSC-PERM:       # %bb.0:
; RV32IB-ZALRSC-PERM-NEXT:  .LBB0_1: # =>This Inner Loop Header: Depth=1
; RV32IB-ZALRSC-PERM-NEXT:    lr.w.aqrl a2, (a0)
; RV32IB-ZALRSC-PERM-NEXT:    max a3, a2, a1
; RV32IB-ZALRSC-PERM-NEXT:    sc.w.rl a3, a3, (a0)
; RV32IB-ZALRSC-PERM-NEXT:    bnez a3, .LBB0_1
; RV32IB-ZALRSC-PERM-NEXT:  # %bb.2:
; RV32IB-ZALRSC-PERM-NEXT:    mv a0, a2
; RV32IB-ZALRSC-PERM-NEXT:    ret
;
; RV32IAB-LABEL: atomicrmw_max_i32_seq_cst:
; RV32IAB:       # %bb.0:
; RV32IAB-NEXT:    amomax.w.aqrl a0, a1, (a0)
; RV32IAB-NEXT:    ret
;
; RV64IB-ZALRSC-LABEL: atomicrmw_max_i32_seq_cst:
; RV64IB-ZALRSC:       # %bb.0:
; RV64IB-ZALRSC-NEXT:    sext.w a2, a1
; RV64IB-ZALRSC-NEXT:  .LBB0_1: # =>This Inner Loop Header: Depth=1
; RV64IB-ZALRSC-NEXT:    lr.w.aqrl a1, (a0)
; RV64IB-ZALRSC-NEXT:    mv a3, a1
; RV64IB-ZALRSC-NEXT:    bge a3, a2, .LBB0_3
; RV64IB-ZALRSC-NEXT:  # %bb.2: # in Loop: Header=BB0_1 Depth=1
; RV64IB-ZALRSC-NEXT:    mv a3, a2
; RV64IB-ZALRSC-NEXT:  .LBB0_3: # in Loop: Header=BB0_1 Depth=1
; RV64IB-ZALRSC-NEXT:    sc.w.rl a3, a3, (a0)
; RV64IB-ZALRSC-NEXT:    bnez a3, .LBB0_1
; RV64IB-ZALRSC-NEXT:  # %bb.4:
; RV64IB-ZALRSC-NEXT:    mv a0, a1
; RV64IB-ZALRSC-NEXT:    ret
;
; RV64IB-ZALRSC-PERM-LABEL: atomicrmw_max_i32_seq_cst:
; RV64IB-ZALRSC-PERM:       # %bb.0:
; RV64IB-ZALRSC-PERM-NEXT:    sext.w a2, a1
; RV64IB-ZALRSC-PERM-NEXT:  .LBB0_1: # =>This Inner Loop Header: Depth=1
; RV64IB-ZALRSC-PERM-NEXT:    lr.w.aqrl a1, (a0)
; RV64IB-ZALRSC-PERM-NEXT:    max a3, a1, a2
; RV64IB-ZALRSC-PERM-NEXT:    sc.w.rl a3, a3, (a0)
; RV64IB-ZALRSC-PERM-NEXT:    bnez a3, .LBB0_1
; RV64IB-ZALRSC-PERM-NEXT:  # %bb.2:
; RV64IB-ZALRSC-PERM-NEXT:    mv a0, a1
; RV64IB-ZALRSC-PERM-NEXT:    ret
;
; RV64IAB-LABEL: atomicrmw_max_i32_seq_cst:
; RV64IAB:       # %bb.0:
; RV64IAB-NEXT:    amomax.w.aqrl a0, a1, (a0)
; RV64IAB-NEXT:    ret
  %1 = atomicrmw max ptr %a, i32 %b seq_cst
  ret i32 %1
}

define i32 @atomicrmw_min_i32_seq_cst(ptr %a, i32 %b) nounwind {
; RV32IB-ZALRSC-LABEL: atomicrmw_min_i32_seq_cst:
; RV32IB-ZALRSC:       # %bb.0:
; RV32IB-ZALRSC-NEXT:  .LBB1_1: # =>This Inner Loop Header: Depth=1
; RV32IB-ZALRSC-NEXT:    lr.w.aqrl a2, (a0)
; RV32IB-ZALRSC-NEXT:    mv a3, a2
; RV32IB-ZALRSC-NEXT:    bge a1, a3, .LBB1_3
; RV32IB-ZALRSC-NEXT:  # %bb.2: # in Loop: Header=BB1_1 Depth=1
; RV32IB-ZALRSC-NEXT:    mv a3, a1
; RV32IB-ZALRSC-NEXT:  .LBB1_3: # in Loop: Header=BB1_1 Depth=1
; RV32IB-ZALRSC-NEXT:    sc.w.rl a3, a3, (a0)
; RV32IB-ZALRSC-NEXT:    bnez a3, .LBB1_1
; RV32IB-ZALRSC-NEXT:  # %bb.4:
; RV32IB-ZALRSC-NEXT:    mv a0, a2
; RV32IB-ZALRSC-NEXT:    ret
;
; RV32IB-ZALRSC-PERM-LABEL: atomicrmw_min_i32_seq_cst:
; RV32IB-ZALRSC-PERM:       # %bb.0:
; RV32IB-ZALRSC-PERM-NEXT:  .LBB1_1: # =>This Inner Loop Header: Depth=1
; RV32IB-ZALRSC-PERM-NEXT:    lr.w.aqrl a2, (a0)
; RV32IB-ZALRSC-PERM-NEXT:    min a3, a2, a1
; RV32IB-ZALRSC-PERM-NEXT:    sc.w.rl a3, a3, (a0)
; RV32IB-ZALRSC-PERM-NEXT:    bnez a3, .LBB1_1
; RV32IB-ZALRSC-PERM-NEXT:  # %bb.2:
; RV32IB-ZALRSC-PERM-NEXT:    mv a0, a2
; RV32IB-ZALRSC-PERM-NEXT:    ret
;
; RV32IAB-LABEL: atomicrmw_min_i32_seq_cst:
; RV32IAB:       # %bb.0:
; RV32IAB-NEXT:    amomin.w.aqrl a0, a1, (a0)
; RV32IAB-NEXT:    ret
;
; RV64IB-ZALRSC-LABEL: atomicrmw_min_i32_seq_cst:
; RV64IB-ZALRSC:       # %bb.0:
; RV64IB-ZALRSC-NEXT:    sext.w a2, a1
; RV64IB-ZALRSC-NEXT:  .LBB1_1: # =>This Inner Loop Header: Depth=1
; RV64IB-ZALRSC-NEXT:    lr.w.aqrl a1, (a0)
; RV64IB-ZALRSC-NEXT:    mv a3, a1
; RV64IB-ZALRSC-NEXT:    bge a2, a3, .LBB1_3
; RV64IB-ZALRSC-NEXT:  # %bb.2: # in Loop: Header=BB1_1 Depth=1
; RV64IB-ZALRSC-NEXT:    mv a3, a2
; RV64IB-ZALRSC-NEXT:  .LBB1_3: # in Loop: Header=BB1_1 Depth=1
; RV64IB-ZALRSC-NEXT:    sc.w.rl a3, a3, (a0)
; RV64IB-ZALRSC-NEXT:    bnez a3, .LBB1_1
; RV64IB-ZALRSC-NEXT:  # %bb.4:
; RV64IB-ZALRSC-NEXT:    mv a0, a1
; RV64IB-ZALRSC-NEXT:    ret
;
; RV64IB-ZALRSC-PERM-LABEL: atomicrmw_min_i32_seq_cst:
; RV64IB-ZALRSC-PERM:       # %bb.0:
; RV64IB-ZALRSC-PERM-NEXT:    sext.w a2, a1
; RV64IB-ZALRSC-PERM-NEXT:  .LBB1_1: # =>This Inner Loop Header: Depth=1
; RV64IB-ZALRSC-PERM-NEXT:    lr.w.aqrl a1, (a0)
; RV64IB-ZALRSC-PERM-NEXT:    min a3, a1, a2
; RV64IB-ZALRSC-PERM-NEXT:    sc.w.rl a3, a3, (a0)
; RV64IB-ZALRSC-PERM-NEXT:    bnez a3, .LBB1_1
; RV64IB-ZALRSC-PERM-NEXT:  # %bb.2:
; RV64IB-ZALRSC-PERM-NEXT:    mv a0, a1
; RV64IB-ZALRSC-PERM-NEXT:    ret
;
; RV64IAB-LABEL: atomicrmw_min_i32_seq_cst:
; RV64IAB:       # %bb.0:
; RV64IAB-NEXT:    amomin.w.aqrl a0, a1, (a0)
; RV64IAB-NEXT:    ret
  %1 = atomicrmw min ptr %a, i32 %b seq_cst
  ret i32 %1
}

define i32 @atomicrmw_umax_i32_seq_cst(ptr %a, i32 %b) nounwind {
; RV32IB-ZALRSC-LABEL: atomicrmw_umax_i32_seq_cst:
; RV32IB-ZALRSC:       # %bb.0:
; RV32IB-ZALRSC-NEXT:  .LBB2_1: # =>This Inner Loop Header: Depth=1
; RV32IB-ZALRSC-NEXT:    lr.w.aqrl a2, (a0)
; RV32IB-ZALRSC-NEXT:    mv a3, a2
; RV32IB-ZALRSC-NEXT:    bgeu a3, a1, .LBB2_3
; RV32IB-ZALRSC-NEXT:  # %bb.2: # in Loop: Header=BB2_1 Depth=1
; RV32IB-ZALRSC-NEXT:    mv a3, a1
; RV32IB-ZALRSC-NEXT:  .LBB2_3: # in Loop: Header=BB2_1 Depth=1
; RV32IB-ZALRSC-NEXT:    sc.w.rl a3, a3, (a0)
; RV32IB-ZALRSC-NEXT:    bnez a3, .LBB2_1
; RV32IB-ZALRSC-NEXT:  # %bb.4:
; RV32IB-ZALRSC-NEXT:    mv a0, a2
; RV32IB-ZALRSC-NEXT:    ret
;
; RV32IB-ZALRSC-PERM-LABEL: atomicrmw_umax_i32_seq_cst:
; RV32IB-ZALRSC-PERM:       # %bb.0:
; RV32IB-ZALRSC-PERM-NEXT:  .LBB2_1: # =>This Inner Loop Header: Depth=1
; RV32IB-ZALRSC-PERM-NEXT:    lr.w.aqrl a2, (a0)
; RV32IB-ZALRSC-PERM-NEXT:    maxu a3, a2, a1
; RV32IB-ZALRSC-PERM-NEXT:    sc.w.rl a3, a3, (a0)
; RV32IB-ZALRSC-PERM-NEXT:    bnez a3, .LBB2_1
; RV32IB-ZALRSC-PERM-NEXT:  # %bb.2:
; RV32IB-ZALRSC-PERM-NEXT:    mv a0, a2
; RV32IB-ZALRSC-PERM-NEXT:    ret
;
; RV32IAB-LABEL: atomicrmw_umax_i32_seq_cst:
; RV32IAB:       # %bb.0:
; RV32IAB-NEXT:    amomaxu.w.aqrl a0, a1, (a0)
; RV32IAB-NEXT:    ret
;
; RV64IB-ZALRSC-LABEL: atomicrmw_umax_i32_seq_cst:
; RV64IB-ZALRSC:       # %bb.0:
; RV64IB-ZALRSC-NEXT:    sext.w a2, a1
; RV64IB-ZALRSC-NEXT:  .LBB2_1: # =>This Inner Loop Header: Depth=1
; RV64IB-ZALRSC-NEXT:    lr.w.aqrl a1, (a0)
; RV64IB-ZALRSC-NEXT:    mv a3, a1
; RV64IB-ZALRSC-NEXT:    bgeu a3, a2, .LBB2_3
; RV64IB-ZALRSC-NEXT:  # %bb.2: # in Loop: Header=BB2_1 Depth=1
; RV64IB-ZALRSC-NEXT:    mv a3, a2
; RV64IB-ZALRSC-NEXT:  .LBB2_3: # in Loop: Header=BB2_1 Depth=1
; RV64IB-ZALRSC-NEXT:    sc.w.rl a3, a3, (a0)
; RV64IB-ZALRSC-NEXT:    bnez a3, .LBB2_1
; RV64IB-ZALRSC-NEXT:  # %bb.4:
; RV64IB-ZALRSC-NEXT:    mv a0, a1
; RV64IB-ZALRSC-NEXT:    ret
;
; RV64IB-ZALRSC-PERM-LABEL: atomicrmw_umax_i32_seq_cst:
; RV64IB-ZALRSC-PERM:       # %bb.0:
; RV64IB-ZALRSC-PERM-NEXT:    sext.w a2, a1
; RV64IB-ZALRSC-PERM-NEXT:  .LBB2_1: # =>This Inner Loop Header: Depth=1
; RV64IB-ZALRSC-PERM-NEXT:    lr.w.aqrl a1, (a0)
; RV64IB-ZALRSC-PERM-NEXT:    maxu a3, a1, a2
; RV64IB-ZALRSC-PERM-NEXT:    sc.w.rl a3, a3, (a0)
; RV64IB-ZALRSC-PERM-NEXT:    bnez a3, .LBB2_1
; RV64IB-ZALRSC-PERM-NEXT:  # %bb.2:
; RV64IB-ZALRSC-PERM-NEXT:    mv a0, a1
; RV64IB-ZALRSC-PERM-NEXT:    ret
;
; RV64IAB-LABEL: atomicrmw_umax_i32_seq_cst:
; RV64IAB:       # %bb.0:
; RV64IAB-NEXT:    amomaxu.w.aqrl a0, a1, (a0)
; RV64IAB-NEXT:    ret
  %1 = atomicrmw umax ptr %a, i32 %b seq_cst
  ret i32 %1
}

define i32 @atomicrmw_umin_i32_seq_cst(ptr %a, i32 %b) nounwind {
; RV32IB-ZALRSC-LABEL: atomicrmw_umin_i32_seq_cst:
; RV32IB-ZALRSC:       # %bb.0:
; RV32IB-ZALRSC-NEXT:  .LBB3_1: # =>This Inner Loop Header: Depth=1
; RV32IB-ZALRSC-NEXT:    lr.w.aqrl a2, (a0)
; RV32IB-ZALRSC-NEXT:    mv a3, a2
; RV32IB-ZALRSC-NEXT:    bgeu a1, a3, .LBB3_3
; RV32IB-ZALRSC-NEXT:  # %bb.2: # in Loop: Header=BB3_1 Depth=1
; RV32IB-ZALRSC-NEXT:    mv a3, a1
; RV32IB-ZALRSC-NEXT:  .LBB3_3: # in Loop: Header=BB3_1 Depth=1
; RV32IB-ZALRSC-NEXT:    sc.w.rl a3, a3, (a0)
; RV32IB-ZALRSC-NEXT:    bnez a3, .LBB3_1
; RV32IB-ZALRSC-NEXT:  # %bb.4:
; RV32IB-ZALRSC-NEXT:    mv a0, a2
; RV32IB-ZALRSC-NEXT:    ret
;
; RV32IB-ZALRSC-PERM-LABEL: atomicrmw_umin_i32_seq_cst:
; RV32IB-ZALRSC-PERM:       # %bb.0:
; RV32IB-ZALRSC-PERM-NEXT:  .LBB3_1: # =>This Inner Loop Header: Depth=1
; RV32IB-ZALRSC-PERM-NEXT:    lr.w.aqrl a2, (a0)
; RV32IB-ZALRSC-PERM-NEXT:    minu a3, a2, a1
; RV32IB-ZALRSC-PERM-NEXT:    sc.w.rl a3, a3, (a0)
; RV32IB-ZALRSC-PERM-NEXT:    bnez a3, .LBB3_1
; RV32IB-ZALRSC-PERM-NEXT:  # %bb.2:
; RV32IB-ZALRSC-PERM-NEXT:    mv a0, a2
; RV32IB-ZALRSC-PERM-NEXT:    ret
;
; RV32IAB-LABEL: atomicrmw_umin_i32_seq_cst:
; RV32IAB:       # %bb.0:
; RV32IAB-NEXT:    amominu.w.aqrl a0, a1, (a0)
; RV32IAB-NEXT:    ret
;
; RV64IB-ZALRSC-LABEL: atomicrmw_umin_i32_seq_cst:
; RV64IB-ZALRSC:       # %bb.0:
; RV64IB-ZALRSC-NEXT:    sext.w a2, a1
; RV64IB-ZALRSC-NEXT:  .LBB3_1: # =>This Inner Loop Header: Depth=1
; RV64IB-ZALRSC-NEXT:    lr.w.aqrl a1, (a0)
; RV64IB-ZALRSC-NEXT:    mv a3, a1
; RV64IB-ZALRSC-NEXT:    bgeu a2, a3, .LBB3_3
; RV64IB-ZALRSC-NEXT:  # %bb.2: # in Loop: Header=BB3_1 Depth=1
; RV64IB-ZALRSC-NEXT:    mv a3, a2
; RV64IB-ZALRSC-NEXT:  .LBB3_3: # in Loop: Header=BB3_1 Depth=1
; RV64IB-ZALRSC-NEXT:    sc.w.rl a3, a3, (a0)
; RV64IB-ZALRSC-NEXT:    bnez a3, .LBB3_1
; RV64IB-ZALRSC-NEXT:  # %bb.4:
; RV64IB-ZALRSC-NEXT:    mv a0, a1
; RV64IB-ZALRSC-NEXT:    ret
;
; RV64IB-ZALRSC-PERM-LABEL: atomicrmw_umin_i32_seq_cst:
; RV64IB-ZALRSC-PERM:       # %bb.0:
; RV64IB-ZALRSC-PERM-NEXT:    sext.w a2, a1
; RV64IB-ZALRSC-PERM-NEXT:  .LBB3_1: # =>This Inner Loop Header: Depth=1
; RV64IB-ZALRSC-PERM-NEXT:    lr.w.aqrl a1, (a0)
; RV64IB-ZALRSC-PERM-NEXT:    minu a3, a1, a2
; RV64IB-ZALRSC-PERM-NEXT:    sc.w.rl a3, a3, (a0)
; RV64IB-ZALRSC-PERM-NEXT:    bnez a3, .LBB3_1
; RV64IB-ZALRSC-PERM-NEXT:  # %bb.2:
; RV64IB-ZALRSC-PERM-NEXT:    mv a0, a1
; RV64IB-ZALRSC-PERM-NEXT:    ret
;
; RV64IAB-LABEL: atomicrmw_umin_i32_seq_cst:
; RV64IAB:       # %bb.0:
; RV64IAB-NEXT:    amominu.w.aqrl a0, a1, (a0)
; RV64IAB-NEXT:    ret
  %1 = atomicrmw umin ptr %a, i32 %b seq_cst
  ret i32 %1
}

define i64 @atomicrmw_max_i64_seq_cst(ptr %a, i64 %b) nounwind {
; RV32IB-COMMON-LABEL: atomicrmw_max_i64_seq_cst:
; RV32IB-COMMON:       # %bb.0:
; RV32IB-COMMON-NEXT:    addi sp, sp, -32
; RV32IB-COMMON-NEXT:    sw ra, 28(sp) # 4-byte Folded Spill
; RV32IB-COMMON-NEXT:    sw s0, 24(sp) # 4-byte Folded Spill
; RV32IB-COMMON-NEXT:    sw s1, 20(sp) # 4-byte Folded Spill
; RV32IB-COMMON-NEXT:    sw s2, 16(sp) # 4-byte Folded Spill
; RV32IB-COMMON-NEXT:    mv s0, a2
; RV32IB-COMMON-NEXT:    mv s1, a0
; RV32IB-COMMON-NEXT:    lw a4, 0(a0)
; RV32IB-COMMON-NEXT:    lw a5, 4(a0)
; RV32IB-COMMON-NEXT:    mv s2, a1
; RV32IB-COMMON-NEXT:    j .LBB4_2
; RV32IB-COMMON-NEXT:  .LBB4_1: # %atomicrmw.start
; RV32IB-COMMON-NEXT:    # in Loop: Header=BB4_2 Depth=1
; RV32IB-COMMON-NEXT:    sw a4, 8(sp)
; RV32IB-COMMON-NEXT:    sw a5, 12(sp)
; RV32IB-COMMON-NEXT:    addi a1, sp, 8
; RV32IB-COMMON-NEXT:    li a4, 5
; RV32IB-COMMON-NEXT:    li a5, 5
; RV32IB-COMMON-NEXT:    mv a0, s1
; RV32IB-COMMON-NEXT:    call __atomic_compare_exchange_8
; RV32IB-COMMON-NEXT:    lw a4, 8(sp)
; RV32IB-COMMON-NEXT:    lw a5, 12(sp)
; RV32IB-COMMON-NEXT:    bnez a0, .LBB4_7
; RV32IB-COMMON-NEXT:  .LBB4_2: # %atomicrmw.start
; RV32IB-COMMON-NEXT:    # =>This Inner Loop Header: Depth=1
; RV32IB-COMMON-NEXT:    beq a5, s0, .LBB4_4
; RV32IB-COMMON-NEXT:  # %bb.3: # %atomicrmw.start
; RV32IB-COMMON-NEXT:    # in Loop: Header=BB4_2 Depth=1
; RV32IB-COMMON-NEXT:    slt a0, s0, a5
; RV32IB-COMMON-NEXT:    j .LBB4_5
; RV32IB-COMMON-NEXT:  .LBB4_4: # in Loop: Header=BB4_2 Depth=1
; RV32IB-COMMON-NEXT:    sltu a0, s2, a4
; RV32IB-COMMON-NEXT:  .LBB4_5: # %atomicrmw.start
; RV32IB-COMMON-NEXT:    # in Loop: Header=BB4_2 Depth=1
; RV32IB-COMMON-NEXT:    mv a2, a4
; RV32IB-COMMON-NEXT:    mv a3, a5
; RV32IB-COMMON-NEXT:    bnez a0, .LBB4_1
; RV32IB-COMMON-NEXT:  # %bb.6: # %atomicrmw.start
; RV32IB-COMMON-NEXT:    # in Loop: Header=BB4_2 Depth=1
; RV32IB-COMMON-NEXT:    mv a2, s2
; RV32IB-COMMON-NEXT:    mv a3, s0
; RV32IB-COMMON-NEXT:    j .LBB4_1
; RV32IB-COMMON-NEXT:  .LBB4_7: # %atomicrmw.end
; RV32IB-COMMON-NEXT:    mv a0, a4
; RV32IB-COMMON-NEXT:    mv a1, a5
; RV32IB-COMMON-NEXT:    lw ra, 28(sp) # 4-byte Folded Reload
; RV32IB-COMMON-NEXT:    lw s0, 24(sp) # 4-byte Folded Reload
; RV32IB-COMMON-NEXT:    lw s1, 20(sp) # 4-byte Folded Reload
; RV32IB-COMMON-NEXT:    lw s2, 16(sp) # 4-byte Folded Reload
; RV32IB-COMMON-NEXT:    addi sp, sp, 32
; RV32IB-COMMON-NEXT:    ret
;
; RV64IB-ZALRSC-LABEL: atomicrmw_max_i64_seq_cst:
; RV64IB-ZALRSC:       # %bb.0:
; RV64IB-ZALRSC-NEXT:  .LBB4_1: # =>This Inner Loop Header: Depth=1
; RV64IB-ZALRSC-NEXT:    lr.d.aqrl a2, (a0)
; RV64IB-ZALRSC-NEXT:    mv a3, a2
; RV64IB-ZALRSC-NEXT:    bge a3, a1, .LBB4_3
; RV64IB-ZALRSC-NEXT:  # %bb.2: # in Loop: Header=BB4_1 Depth=1
; RV64IB-ZALRSC-NEXT:    mv a3, a1
; RV64IB-ZALRSC-NEXT:  .LBB4_3: # in Loop: Header=BB4_1 Depth=1
; RV64IB-ZALRSC-NEXT:    sc.d.rl a3, a3, (a0)
; RV64IB-ZALRSC-NEXT:    bnez a3, .LBB4_1
; RV64IB-ZALRSC-NEXT:  # %bb.4:
; RV64IB-ZALRSC-NEXT:    mv a0, a2
; RV64IB-ZALRSC-NEXT:    ret
;
; RV64IB-ZALRSC-PERM-LABEL: atomicrmw_max_i64_seq_cst:
; RV64IB-ZALRSC-PERM:       # %bb.0:
; RV64IB-ZALRSC-PERM-NEXT:  .LBB4_1: # =>This Inner Loop Header: Depth=1
; RV64IB-ZALRSC-PERM-NEXT:    lr.d.aqrl a2, (a0)
; RV64IB-ZALRSC-PERM-NEXT:    max a3, a2, a1
; RV64IB-ZALRSC-PERM-NEXT:    sc.d.rl a3, a3, (a0)
; RV64IB-ZALRSC-PERM-NEXT:    bnez a3, .LBB4_1
; RV64IB-ZALRSC-PERM-NEXT:  # %bb.2:
; RV64IB-ZALRSC-PERM-NEXT:    mv a0, a2
; RV64IB-ZALRSC-PERM-NEXT:    ret
;
; RV64IAB-LABEL: atomicrmw_max_i64_seq_cst:
; RV64IAB:       # %bb.0:
; RV64IAB-NEXT:    amomax.d.aqrl a0, a1, (a0)
; RV64IAB-NEXT:    ret
  %1 = atomicrmw max ptr %a, i64 %b seq_cst
  ret i64 %1
}

define i64 @atomicrmw_min_i64_seq_cst(ptr %a, i64 %b) nounwind {
; RV32IB-COMMON-LABEL: atomicrmw_min_i64_seq_cst:
; RV32IB-COMMON:       # %bb.0:
; RV32IB-COMMON-NEXT:    addi sp, sp, -32
; RV32IB-COMMON-NEXT:    sw ra, 28(sp) # 4-byte Folded Spill
; RV32IB-COMMON-NEXT:    sw s0, 24(sp) # 4-byte Folded Spill
; RV32IB-COMMON-NEXT:    sw s1, 20(sp) # 4-byte Folded Spill
; RV32IB-COMMON-NEXT:    sw s2, 16(sp) # 4-byte Folded Spill
; RV32IB-COMMON-NEXT:    mv s0, a2
; RV32IB-COMMON-NEXT:    mv s1, a0
; RV32IB-COMMON-NEXT:    lw a4, 0(a0)
; RV32IB-COMMON-NEXT:    lw a5, 4(a0)
; RV32IB-COMMON-NEXT:    mv s2, a1
; RV32IB-COMMON-NEXT:    j .LBB5_2
; RV32IB-COMMON-NEXT:  .LBB5_1: # %atomicrmw.start
; RV32IB-COMMON-NEXT:    # in Loop: Header=BB5_2 Depth=1
; RV32IB-COMMON-NEXT:    sw a4, 8(sp)
; RV32IB-COMMON-NEXT:    sw a5, 12(sp)
; RV32IB-COMMON-NEXT:    addi a1, sp, 8
; RV32IB-COMMON-NEXT:    li a4, 5
; RV32IB-COMMON-NEXT:    li a5, 5
; RV32IB-COMMON-NEXT:    mv a0, s1
; RV32IB-COMMON-NEXT:    call __atomic_compare_exchange_8
; RV32IB-COMMON-NEXT:    lw a4, 8(sp)
; RV32IB-COMMON-NEXT:    lw a5, 12(sp)
; RV32IB-COMMON-NEXT:    bnez a0, .LBB5_7
; RV32IB-COMMON-NEXT:  .LBB5_2: # %atomicrmw.start
; RV32IB-COMMON-NEXT:    # =>This Inner Loop Header: Depth=1
; RV32IB-COMMON-NEXT:    beq a5, s0, .LBB5_4
; RV32IB-COMMON-NEXT:  # %bb.3: # %atomicrmw.start
; RV32IB-COMMON-NEXT:    # in Loop: Header=BB5_2 Depth=1
; RV32IB-COMMON-NEXT:    slt a0, a5, s0
; RV32IB-COMMON-NEXT:    j .LBB5_5
; RV32IB-COMMON-NEXT:  .LBB5_4: # in Loop: Header=BB5_2 Depth=1
; RV32IB-COMMON-NEXT:    sltu a0, a4, s2
; RV32IB-COMMON-NEXT:  .LBB5_5: # %atomicrmw.start
; RV32IB-COMMON-NEXT:    # in Loop: Header=BB5_2 Depth=1
; RV32IB-COMMON-NEXT:    mv a2, a4
; RV32IB-COMMON-NEXT:    mv a3, a5
; RV32IB-COMMON-NEXT:    bnez a0, .LBB5_1
; RV32IB-COMMON-NEXT:  # %bb.6: # %atomicrmw.start
; RV32IB-COMMON-NEXT:    # in Loop: Header=BB5_2 Depth=1
; RV32IB-COMMON-NEXT:    mv a2, s2
; RV32IB-COMMON-NEXT:    mv a3, s0
; RV32IB-COMMON-NEXT:    j .LBB5_1
; RV32IB-COMMON-NEXT:  .LBB5_7: # %atomicrmw.end
; RV32IB-COMMON-NEXT:    mv a0, a4
; RV32IB-COMMON-NEXT:    mv a1, a5
; RV32IB-COMMON-NEXT:    lw ra, 28(sp) # 4-byte Folded Reload
; RV32IB-COMMON-NEXT:    lw s0, 24(sp) # 4-byte Folded Reload
; RV32IB-COMMON-NEXT:    lw s1, 20(sp) # 4-byte Folded Reload
; RV32IB-COMMON-NEXT:    lw s2, 16(sp) # 4-byte Folded Reload
; RV32IB-COMMON-NEXT:    addi sp, sp, 32
; RV32IB-COMMON-NEXT:    ret
;
; RV64IB-ZALRSC-LABEL: atomicrmw_min_i64_seq_cst:
; RV64IB-ZALRSC:       # %bb.0:
; RV64IB-ZALRSC-NEXT:  .LBB5_1: # =>This Inner Loop Header: Depth=1
; RV64IB-ZALRSC-NEXT:    lr.d.aqrl a2, (a0)
; RV64IB-ZALRSC-NEXT:    mv a3, a2
; RV64IB-ZALRSC-NEXT:    bge a1, a3, .LBB5_3
; RV64IB-ZALRSC-NEXT:  # %bb.2: # in Loop: Header=BB5_1 Depth=1
; RV64IB-ZALRSC-NEXT:    mv a3, a1
; RV64IB-ZALRSC-NEXT:  .LBB5_3: # in Loop: Header=BB5_1 Depth=1
; RV64IB-ZALRSC-NEXT:    sc.d.rl a3, a3, (a0)
; RV64IB-ZALRSC-NEXT:    bnez a3, .LBB5_1
; RV64IB-ZALRSC-NEXT:  # %bb.4:
; RV64IB-ZALRSC-NEXT:    mv a0, a2
; RV64IB-ZALRSC-NEXT:    ret
;
; RV64IB-ZALRSC-PERM-LABEL: atomicrmw_min_i64_seq_cst:
; RV64IB-ZALRSC-PERM:       # %bb.0:
; RV64IB-ZALRSC-PERM-NEXT:  .LBB5_1: # =>This Inner Loop Header: Depth=1
; RV64IB-ZALRSC-PERM-NEXT:    lr.d.aqrl a2, (a0)
; RV64IB-ZALRSC-PERM-NEXT:    min a3, a2, a1
; RV64IB-ZALRSC-PERM-NEXT:    sc.d.rl a3, a3, (a0)
; RV64IB-ZALRSC-PERM-NEXT:    bnez a3, .LBB5_1
; RV64IB-ZALRSC-PERM-NEXT:  # %bb.2:
; RV64IB-ZALRSC-PERM-NEXT:    mv a0, a2
; RV64IB-ZALRSC-PERM-NEXT:    ret
;
; RV64IAB-LABEL: atomicrmw_min_i64_seq_cst:
; RV64IAB:       # %bb.0:
; RV64IAB-NEXT:    amomin.d.aqrl a0, a1, (a0)
; RV64IAB-NEXT:    ret
  %1 = atomicrmw min ptr %a, i64 %b seq_cst
  ret i64 %1
}

define i64 @atomicrmw_umax_i64_seq_cst(ptr %a, i64 %b) nounwind {
; RV32IB-COMMON-LABEL: atomicrmw_umax_i64_seq_cst:
; RV32IB-COMMON:       # %bb.0:
; RV32IB-COMMON-NEXT:    addi sp, sp, -32
; RV32IB-COMMON-NEXT:    sw ra, 28(sp) # 4-byte Folded Spill
; RV32IB-COMMON-NEXT:    sw s0, 24(sp) # 4-byte Folded Spill
; RV32IB-COMMON-NEXT:    sw s1, 20(sp) # 4-byte Folded Spill
; RV32IB-COMMON-NEXT:    sw s2, 16(sp) # 4-byte Folded Spill
; RV32IB-COMMON-NEXT:    mv s0, a2
; RV32IB-COMMON-NEXT:    mv s1, a0
; RV32IB-COMMON-NEXT:    lw a4, 0(a0)
; RV32IB-COMMON-NEXT:    lw a5, 4(a0)
; RV32IB-COMMON-NEXT:    mv s2, a1
; RV32IB-COMMON-NEXT:    j .LBB6_2
; RV32IB-COMMON-NEXT:  .LBB6_1: # %atomicrmw.start
; RV32IB-COMMON-NEXT:    # in Loop: Header=BB6_2 Depth=1
; RV32IB-COMMON-NEXT:    sw a4, 8(sp)
; RV32IB-COMMON-NEXT:    sw a5, 12(sp)
; RV32IB-COMMON-NEXT:    addi a1, sp, 8
; RV32IB-COMMON-NEXT:    li a4, 5
; RV32IB-COMMON-NEXT:    li a5, 5
; RV32IB-COMMON-NEXT:    mv a0, s1
; RV32IB-COMMON-NEXT:    call __atomic_compare_exchange_8
; RV32IB-COMMON-NEXT:    lw a4, 8(sp)
; RV32IB-COMMON-NEXT:    lw a5, 12(sp)
; RV32IB-COMMON-NEXT:    bnez a0, .LBB6_7
; RV32IB-COMMON-NEXT:  .LBB6_2: # %atomicrmw.start
; RV32IB-COMMON-NEXT:    # =>This Inner Loop Header: Depth=1
; RV32IB-COMMON-NEXT:    beq a5, s0, .LBB6_4
; RV32IB-COMMON-NEXT:  # %bb.3: # %atomicrmw.start
; RV32IB-COMMON-NEXT:    # in Loop: Header=BB6_2 Depth=1
; RV32IB-COMMON-NEXT:    sltu a0, s0, a5
; RV32IB-COMMON-NEXT:    j .LBB6_5
; RV32IB-COMMON-NEXT:  .LBB6_4: # in Loop: Header=BB6_2 Depth=1
; RV32IB-COMMON-NEXT:    sltu a0, s2, a4
; RV32IB-COMMON-NEXT:  .LBB6_5: # %atomicrmw.start
; RV32IB-COMMON-NEXT:    # in Loop: Header=BB6_2 Depth=1
; RV32IB-COMMON-NEXT:    mv a2, a4
; RV32IB-COMMON-NEXT:    mv a3, a5
; RV32IB-COMMON-NEXT:    bnez a0, .LBB6_1
; RV32IB-COMMON-NEXT:  # %bb.6: # %atomicrmw.start
; RV32IB-COMMON-NEXT:    # in Loop: Header=BB6_2 Depth=1
; RV32IB-COMMON-NEXT:    mv a2, s2
; RV32IB-COMMON-NEXT:    mv a3, s0
; RV32IB-COMMON-NEXT:    j .LBB6_1
; RV32IB-COMMON-NEXT:  .LBB6_7: # %atomicrmw.end
; RV32IB-COMMON-NEXT:    mv a0, a4
; RV32IB-COMMON-NEXT:    mv a1, a5
; RV32IB-COMMON-NEXT:    lw ra, 28(sp) # 4-byte Folded Reload
; RV32IB-COMMON-NEXT:    lw s0, 24(sp) # 4-byte Folded Reload
; RV32IB-COMMON-NEXT:    lw s1, 20(sp) # 4-byte Folded Reload
; RV32IB-COMMON-NEXT:    lw s2, 16(sp) # 4-byte Folded Reload
; RV32IB-COMMON-NEXT:    addi sp, sp, 32
; RV32IB-COMMON-NEXT:    ret
;
; RV64IB-ZALRSC-LABEL: atomicrmw_umax_i64_seq_cst:
; RV64IB-ZALRSC:       # %bb.0:
; RV64IB-ZALRSC-NEXT:  .LBB6_1: # =>This Inner Loop Header: Depth=1
; RV64IB-ZALRSC-NEXT:    lr.d.aqrl a2, (a0)
; RV64IB-ZALRSC-NEXT:    mv a3, a2
; RV64IB-ZALRSC-NEXT:    bgeu a3, a1, .LBB6_3
; RV64IB-ZALRSC-NEXT:  # %bb.2: # in Loop: Header=BB6_1 Depth=1
; RV64IB-ZALRSC-NEXT:    mv a3, a1
; RV64IB-ZALRSC-NEXT:  .LBB6_3: # in Loop: Header=BB6_1 Depth=1
; RV64IB-ZALRSC-NEXT:    sc.d.rl a3, a3, (a0)
; RV64IB-ZALRSC-NEXT:    bnez a3, .LBB6_1
; RV64IB-ZALRSC-NEXT:  # %bb.4:
; RV64IB-ZALRSC-NEXT:    mv a0, a2
; RV64IB-ZALRSC-NEXT:    ret
;
; RV64IB-ZALRSC-PERM-LABEL: atomicrmw_umax_i64_seq_cst:
; RV64IB-ZALRSC-PERM:       # %bb.0:
; RV64IB-ZALRSC-PERM-NEXT:  .LBB6_1: # =>This Inner Loop Header: Depth=1
; RV64IB-ZALRSC-PERM-NEXT:    lr.d.aqrl a2, (a0)
; RV64IB-ZALRSC-PERM-NEXT:    maxu a3, a2, a1
; RV64IB-ZALRSC-PERM-NEXT:    sc.d.rl a3, a3, (a0)
; RV64IB-ZALRSC-PERM-NEXT:    bnez a3, .LBB6_1
; RV64IB-ZALRSC-PERM-NEXT:  # %bb.2:
; RV64IB-ZALRSC-PERM-NEXT:    mv a0, a2
; RV64IB-ZALRSC-PERM-NEXT:    ret
;
; RV64IAB-LABEL: atomicrmw_umax_i64_seq_cst:
; RV64IAB:       # %bb.0:
; RV64IAB-NEXT:    amomaxu.d.aqrl a0, a1, (a0)
; RV64IAB-NEXT:    ret
  %1 = atomicrmw umax ptr %a, i64 %b seq_cst
  ret i64 %1
}

define i64 @atomicrmw_umin_i64_seq_cst(ptr %a, i64 %b) nounwind {
; RV32IB-COMMON-LABEL: atomicrmw_umin_i64_seq_cst:
; RV32IB-COMMON:       # %bb.0:
; RV32IB-COMMON-NEXT:    addi sp, sp, -32
; RV32IB-COMMON-NEXT:    sw ra, 28(sp) # 4-byte Folded Spill
; RV32IB-COMMON-NEXT:    sw s0, 24(sp) # 4-byte Folded Spill
; RV32IB-COMMON-NEXT:    sw s1, 20(sp) # 4-byte Folded Spill
; RV32IB-COMMON-NEXT:    sw s2, 16(sp) # 4-byte Folded Spill
; RV32IB-COMMON-NEXT:    mv s0, a2
; RV32IB-COMMON-NEXT:    mv s1, a0
; RV32IB-COMMON-NEXT:    lw a4, 0(a0)
; RV32IB-COMMON-NEXT:    lw a5, 4(a0)
; RV32IB-COMMON-NEXT:    mv s2, a1
; RV32IB-COMMON-NEXT:    j .LBB7_2
; RV32IB-COMMON-NEXT:  .LBB7_1: # %atomicrmw.start
; RV32IB-COMMON-NEXT:    # in Loop: Header=BB7_2 Depth=1
; RV32IB-COMMON-NEXT:    sw a4, 8(sp)
; RV32IB-COMMON-NEXT:    sw a5, 12(sp)
; RV32IB-COMMON-NEXT:    addi a1, sp, 8
; RV32IB-COMMON-NEXT:    li a4, 5
; RV32IB-COMMON-NEXT:    li a5, 5
; RV32IB-COMMON-NEXT:    mv a0, s1
; RV32IB-COMMON-NEXT:    call __atomic_compare_exchange_8
; RV32IB-COMMON-NEXT:    lw a4, 8(sp)
; RV32IB-COMMON-NEXT:    lw a5, 12(sp)
; RV32IB-COMMON-NEXT:    bnez a0, .LBB7_7
; RV32IB-COMMON-NEXT:  .LBB7_2: # %atomicrmw.start
; RV32IB-COMMON-NEXT:    # =>This Inner Loop Header: Depth=1
; RV32IB-COMMON-NEXT:    beq a5, s0, .LBB7_4
; RV32IB-COMMON-NEXT:  # %bb.3: # %atomicrmw.start
; RV32IB-COMMON-NEXT:    # in Loop: Header=BB7_2 Depth=1
; RV32IB-COMMON-NEXT:    sltu a0, a5, s0
; RV32IB-COMMON-NEXT:    j .LBB7_5
; RV32IB-COMMON-NEXT:  .LBB7_4: # in Loop: Header=BB7_2 Depth=1
; RV32IB-COMMON-NEXT:    sltu a0, a4, s2
; RV32IB-COMMON-NEXT:  .LBB7_5: # %atomicrmw.start
; RV32IB-COMMON-NEXT:    # in Loop: Header=BB7_2 Depth=1
; RV32IB-COMMON-NEXT:    mv a2, a4
; RV32IB-COMMON-NEXT:    mv a3, a5
; RV32IB-COMMON-NEXT:    bnez a0, .LBB7_1
; RV32IB-COMMON-NEXT:  # %bb.6: # %atomicrmw.start
; RV32IB-COMMON-NEXT:    # in Loop: Header=BB7_2 Depth=1
; RV32IB-COMMON-NEXT:    mv a2, s2
; RV32IB-COMMON-NEXT:    mv a3, s0
; RV32IB-COMMON-NEXT:    j .LBB7_1
; RV32IB-COMMON-NEXT:  .LBB7_7: # %atomicrmw.end
; RV32IB-COMMON-NEXT:    mv a0, a4
; RV32IB-COMMON-NEXT:    mv a1, a5
; RV32IB-COMMON-NEXT:    lw ra, 28(sp) # 4-byte Folded Reload
; RV32IB-COMMON-NEXT:    lw s0, 24(sp) # 4-byte Folded Reload
; RV32IB-COMMON-NEXT:    lw s1, 20(sp) # 4-byte Folded Reload
; RV32IB-COMMON-NEXT:    lw s2, 16(sp) # 4-byte Folded Reload
; RV32IB-COMMON-NEXT:    addi sp, sp, 32
; RV32IB-COMMON-NEXT:    ret
;
; RV64IB-ZALRSC-LABEL: atomicrmw_umin_i64_seq_cst:
; RV64IB-ZALRSC:       # %bb.0:
; RV64IB-ZALRSC-NEXT:  .LBB7_1: # =>This Inner Loop Header: Depth=1
; RV64IB-ZALRSC-NEXT:    lr.d.aqrl a2, (a0)
; RV64IB-ZALRSC-NEXT:    mv a3, a2
; RV64IB-ZALRSC-NEXT:    bgeu a1, a3, .LBB7_3
; RV64IB-ZALRSC-NEXT:  # %bb.2: # in Loop: Header=BB7_1 Depth=1
; RV64IB-ZALRSC-NEXT:    mv a3, a1
; RV64IB-ZALRSC-NEXT:  .LBB7_3: # in Loop: Header=BB7_1 Depth=1
; RV64IB-ZALRSC-NEXT:    sc.d.rl a3, a3, (a0)
; RV64IB-ZALRSC-NEXT:    bnez a3, .LBB7_1
; RV64IB-ZALRSC-NEXT:  # %bb.4:
; RV64IB-ZALRSC-NEXT:    mv a0, a2
; RV64IB-ZALRSC-NEXT:    ret
;
; RV64IB-ZALRSC-PERM-LABEL: atomicrmw_umin_i64_seq_cst:
; RV64IB-ZALRSC-PERM:       # %bb.0:
; RV64IB-ZALRSC-PERM-NEXT:  .LBB7_1: # =>This Inner Loop Header: Depth=1
; RV64IB-ZALRSC-PERM-NEXT:    lr.d.aqrl a2, (a0)
; RV64IB-ZALRSC-PERM-NEXT:    minu a3, a2, a1
; RV64IB-ZALRSC-PERM-NEXT:    sc.d.rl a3, a3, (a0)
; RV64IB-ZALRSC-PERM-NEXT:    bnez a3, .LBB7_1
; RV64IB-ZALRSC-PERM-NEXT:  # %bb.2:
; RV64IB-ZALRSC-PERM-NEXT:    mv a0, a2
; RV64IB-ZALRSC-PERM-NEXT:    ret
;
; RV64IAB-LABEL: atomicrmw_umin_i64_seq_cst:
; RV64IAB:       # %bb.0:
; RV64IAB-NEXT:    amominu.d.aqrl a0, a1, (a0)
; RV64IAB-NEXT:    ret
  %1 = atomicrmw umin ptr %a, i64 %b seq_cst
  ret i64 %1
}