| # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 3 |
| # RUN: llc -mtriple=amdgcn -mcpu=gfx1010 -verify-machineinstrs -run-pass=si-fold-operands -o - %s | FileCheck --check-prefixes=GCN,GFX10 %s |
| # RUN: llc -mtriple=amdgcn -mcpu=gfx900 -verify-machineinstrs -run-pass=si-fold-operands -o - %s | FileCheck --check-prefixes=GCN,GFX9 %s |
| |
| --- |
| name: no_fold_fp_64bit_literal_sgpr |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| |
| ; GCN-LABEL: name: no_fold_fp_64bit_literal_sgpr |
| ; GCN: [[DEF:%[0-9]+]]:vreg_64 = IMPLICIT_DEF |
| ; GCN-NEXT: [[S_MOV_B:%[0-9]+]]:sreg_64 = S_MOV_B64_IMM_PSEUDO 1311768467750121200 |
| ; GCN-NEXT: [[V_ADD_F64_e64_:%[0-9]+]]:vreg_64 = V_ADD_F64_e64 0, [[S_MOV_B]], 0, [[DEF]], 0, 0, implicit $mode, implicit $exec |
| ; GCN-NEXT: SI_RETURN_TO_EPILOG [[V_ADD_F64_e64_]] |
| %0:vreg_64 = IMPLICIT_DEF |
| %1:sreg_64 = S_MOV_B64_IMM_PSEUDO 1311768467750121200 |
| %2:vreg_64 = V_ADD_F64_e64 0, %1, 0, %0, 0, 0, implicit $mode, implicit $exec |
| SI_RETURN_TO_EPILOG %2 |
| ... |
| |
| --- |
| name: no_fold_fp_64bit_literal_vgpr |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| |
| ; GCN-LABEL: name: no_fold_fp_64bit_literal_vgpr |
| ; GCN: [[DEF:%[0-9]+]]:vreg_64 = IMPLICIT_DEF |
| ; GCN-NEXT: [[V_MOV_B:%[0-9]+]]:vreg_64 = V_MOV_B64_PSEUDO 1311768467750121200, implicit $exec |
| ; GCN-NEXT: [[V_ADD_F64_e64_:%[0-9]+]]:vreg_64 = V_ADD_F64_e64 0, [[V_MOV_B]], 0, [[DEF]], 0, 0, implicit $mode, implicit $exec |
| ; GCN-NEXT: SI_RETURN_TO_EPILOG [[V_ADD_F64_e64_]] |
| %0:vreg_64 = IMPLICIT_DEF |
| %1:vreg_64 = V_MOV_B64_PSEUDO 1311768467750121200, implicit $exec |
| %2:vreg_64 = V_ADD_F64_e64 0, %1, 0, %0, 0, 0, implicit $mode, implicit $exec |
| SI_RETURN_TO_EPILOG %2 |
| ... |
| |
| --- |
| name: fold_fp_32bit_literal_sgpr |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| |
| ; GFX10-LABEL: name: fold_fp_32bit_literal_sgpr |
| ; GFX10: [[DEF:%[0-9]+]]:vreg_64 = IMPLICIT_DEF |
| ; GFX10-NEXT: [[V_ADD_F64_e64_:%[0-9]+]]:vreg_64 = V_ADD_F64_e64 0, 4636737291354636288, 0, [[DEF]], 0, 0, implicit $mode, implicit $exec |
| ; GFX10-NEXT: SI_RETURN_TO_EPILOG [[V_ADD_F64_e64_]] |
| ; |
| ; GFX9-LABEL: name: fold_fp_32bit_literal_sgpr |
| ; GFX9: [[DEF:%[0-9]+]]:vreg_64 = IMPLICIT_DEF |
| ; GFX9-NEXT: [[S_MOV_B:%[0-9]+]]:sreg_64 = S_MOV_B64_IMM_PSEUDO 4636737291354636288 |
| ; GFX9-NEXT: [[V_ADD_F64_e64_:%[0-9]+]]:vreg_64 = V_ADD_F64_e64 0, [[S_MOV_B]], 0, [[DEF]], 0, 0, implicit $mode, implicit $exec |
| ; GFX9-NEXT: SI_RETURN_TO_EPILOG [[V_ADD_F64_e64_]] |
| %0:vreg_64 = IMPLICIT_DEF |
| %1:sreg_64 = S_MOV_B64_IMM_PSEUDO 4636737291354636288 |
| %2:vreg_64 = V_ADD_F64_e64 0, %1, 0, %0, 0, 0, implicit $mode, implicit $exec |
| SI_RETURN_TO_EPILOG %2 |
| ... |
| |
| --- |
| name: no_fold_int_64bit_literal_sgpr |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| |
| ; GCN-LABEL: name: no_fold_int_64bit_literal_sgpr |
| ; GCN: [[DEF:%[0-9]+]]:sreg_64 = IMPLICIT_DEF |
| ; GCN-NEXT: [[S_MOV_B:%[0-9]+]]:sreg_64 = S_MOV_B64_IMM_PSEUDO 1311768467750121200 |
| ; GCN-NEXT: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[DEF]], [[S_MOV_B]], implicit-def $scc |
| ; GCN-NEXT: SI_RETURN_TO_EPILOG [[S_AND_B64_]] |
| %0:sreg_64 = IMPLICIT_DEF |
| %1:sreg_64 = S_MOV_B64_IMM_PSEUDO 1311768467750121200 |
| %2:sreg_64 = S_AND_B64 %0, %1, implicit-def $scc |
| SI_RETURN_TO_EPILOG %2 |
| ... |
| |
| --- |
| name: fold_int_32bit_literal_sgpr |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| |
| ; GCN-LABEL: name: fold_int_32bit_literal_sgpr |
| ; GCN: [[DEF:%[0-9]+]]:sreg_64 = IMPLICIT_DEF |
| ; GCN-NEXT: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[DEF]], 2147483647, implicit-def $scc |
| ; GCN-NEXT: SI_RETURN_TO_EPILOG [[S_AND_B64_]] |
| %0:sreg_64 = IMPLICIT_DEF |
| %1:sreg_64 = S_MOV_B64 2147483647 |
| %2:sreg_64 = S_AND_B64 %0, %1, implicit-def $scc |
| SI_RETURN_TO_EPILOG %2 |
| ... |
| |
| # FIXME: This could be folded, but we do not know if operand of S_AND_B64 is signed or unsigned |
| # and if it will be sign or zero extended. |
| |
| --- |
| name: fold_uint_32bit_literal_sgpr |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| |
| ; GCN-LABEL: name: fold_uint_32bit_literal_sgpr |
| ; GCN: [[DEF:%[0-9]+]]:sreg_64 = IMPLICIT_DEF |
| ; GCN-NEXT: [[S_MOV_B64_:%[0-9]+]]:sreg_64 = S_MOV_B64 4294967295 |
| ; GCN-NEXT: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[DEF]], [[S_MOV_B64_]], implicit-def $scc |
| ; GCN-NEXT: SI_RETURN_TO_EPILOG [[S_AND_B64_]] |
| %0:sreg_64 = IMPLICIT_DEF |
| %1:sreg_64 = S_MOV_B64 4294967295 |
| %2:sreg_64 = S_AND_B64 %0, %1, implicit-def $scc |
| SI_RETURN_TO_EPILOG %2 |
| ... |
| |
| --- |
| name: no_fold_v2fp_64bit_literal_sgpr |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| |
| ; GCN-LABEL: name: no_fold_v2fp_64bit_literal_sgpr |
| ; GCN: [[DEF:%[0-9]+]]:vreg_64 = IMPLICIT_DEF |
| ; GCN-NEXT: [[V_MOV_B:%[0-9]+]]:vreg_64 = V_MOV_B64_PSEUDO 4629700418019000320, implicit $exec |
| ; GCN-NEXT: [[V_PK_ADD_F32_:%[0-9]+]]:vreg_64 = V_PK_ADD_F32 0, [[DEF]], 0, [[V_MOV_B]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| ; GCN-NEXT: SI_RETURN_TO_EPILOG [[V_PK_ADD_F32_]] |
| %0:vreg_64 = IMPLICIT_DEF |
| %1:vreg_64 = V_MOV_B64_PSEUDO 4629700418019000320, implicit $exec |
| %2:vreg_64 = V_PK_ADD_F32 0, %0, 0, %1, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| SI_RETURN_TO_EPILOG %2 |
| ... |
| |
| --- |
| name: fold_v2fp_32bit_literal_sgpr |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| |
| ; GCN-LABEL: name: fold_v2fp_32bit_literal_sgpr |
| ; GCN: [[DEF:%[0-9]+]]:vreg_64 = IMPLICIT_DEF |
| ; GCN-NEXT: [[V_PK_ADD_F32_:%[0-9]+]]:vreg_64 = V_PK_ADD_F32 0, [[DEF]], 0, 1065353216, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| ; GCN-NEXT: SI_RETURN_TO_EPILOG [[V_PK_ADD_F32_]] |
| %0:vreg_64 = IMPLICIT_DEF |
| %1:vreg_64 = V_MOV_B64_PSEUDO 1065353216, implicit $exec |
| %2:vreg_64 = V_PK_ADD_F32 0, %0, 0, %1, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| SI_RETURN_TO_EPILOG %2 |
| ... |
| |
| --- |
| name: v_mov_b64_pseudo_imm_0_full_copy_to_f64_use |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0_vgpr1 |
| ; GCN-LABEL: name: v_mov_b64_pseudo_imm_0_full_copy_to_f64_use |
| ; GCN: liveins: $vgpr0_vgpr1 |
| ; GCN-NEXT: {{ $}} |
| ; GCN-NEXT: [[COPY:%[0-9]+]]:vreg_64_align2 = COPY $vgpr0_vgpr1 |
| ; GCN-NEXT: [[V_ADD_F64_e64_:%[0-9]+]]:vreg_64_align2 = nofpexcept V_ADD_F64_e64 0, [[COPY]], 1, 0, 0, 0, implicit $mode, implicit $exec |
| ; GCN-NEXT: $vgpr0_vgpr1 = COPY [[V_ADD_F64_e64_]] |
| ; GCN-NEXT: S_ENDPGM 0 |
| %0:vreg_64_align2 = COPY $vgpr0_vgpr1 |
| %1:vreg_64_align2 = V_MOV_B64_PSEUDO 0, implicit $exec |
| %2:vreg_64_align2 = COPY %1 |
| %3:vreg_64_align2 = nofpexcept V_ADD_F64_e64 0, %0, 1, %2, 0, 0, implicit $mode, implicit $exec |
| $vgpr0_vgpr1 = COPY %3 |
| S_ENDPGM 0 |
| |
| ... |
| |
| --- |
| name: v_mov_b64_pseudo_imm_fp64_1_full_copy_to_f64_use |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0_vgpr1 |
| ; GCN-LABEL: name: v_mov_b64_pseudo_imm_fp64_1_full_copy_to_f64_use |
| ; GCN: liveins: $vgpr0_vgpr1 |
| ; GCN-NEXT: {{ $}} |
| ; GCN-NEXT: [[COPY:%[0-9]+]]:vreg_64_align2 = COPY $vgpr0_vgpr1 |
| ; GCN-NEXT: [[V_ADD_F64_e64_:%[0-9]+]]:vreg_64_align2 = nofpexcept V_ADD_F64_e64 0, [[COPY]], 1, 4607182418800017408, 0, 0, implicit $mode, implicit $exec |
| ; GCN-NEXT: $vgpr0_vgpr1 = COPY [[V_ADD_F64_e64_]] |
| ; GCN-NEXT: S_ENDPGM 0 |
| %0:vreg_64_align2 = COPY $vgpr0_vgpr1 |
| %1:vreg_64_align2 = V_MOV_B64_PSEUDO 4607182418800017408, implicit $exec |
| %2:vreg_64_align2 = COPY %1 |
| %3:vreg_64_align2 = nofpexcept V_ADD_F64_e64 0, %0, 1, %2, 0, 0, implicit $mode, implicit $exec |
| $vgpr0_vgpr1 = COPY %3 |
| S_ENDPGM 0 |
| |
| ... |
| |
| --- |
| name: v_mov_b64_pseudo_lit_full_copy_to_f64_use |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0_vgpr1 |
| ; GCN-LABEL: name: v_mov_b64_pseudo_lit_full_copy_to_f64_use |
| ; GCN: liveins: $vgpr0_vgpr1 |
| ; GCN-NEXT: {{ $}} |
| ; GCN-NEXT: [[COPY:%[0-9]+]]:vreg_64_align2 = COPY $vgpr0_vgpr1 |
| ; GCN-NEXT: [[V_MOV_B:%[0-9]+]]:vreg_64_align2 = V_MOV_B64_PSEUDO 4290672329592, implicit $exec |
| ; GCN-NEXT: [[V_ADD_F64_e64_:%[0-9]+]]:vreg_64_align2 = nofpexcept V_ADD_F64_e64 0, [[COPY]], 1, [[V_MOV_B]], 0, 0, implicit $mode, implicit $exec |
| ; GCN-NEXT: $vgpr0_vgpr1 = COPY [[V_ADD_F64_e64_]] |
| ; GCN-NEXT: S_ENDPGM 0 |
| %0:vreg_64_align2 = COPY $vgpr0_vgpr1 |
| %1:vreg_64_align2 = V_MOV_B64_PSEUDO 4290672329592, implicit $exec |
| %2:vreg_64_align2 = COPY %1 |
| %3:vreg_64_align2 = nofpexcept V_ADD_F64_e64 0, %0, 1, %2, 0, 0, implicit $mode, implicit $exec |
| $vgpr0_vgpr1 = COPY %3 |
| S_ENDPGM 0 |
| |
| ... |
| |
| --- |
| name: v_mov_b64_pseudo_imm_fp32_1_splat_full_copy_to_f64_use |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0_vgpr1 |
| ; GCN-LABEL: name: v_mov_b64_pseudo_imm_fp32_1_splat_full_copy_to_f64_use |
| ; GCN: liveins: $vgpr0_vgpr1 |
| ; GCN-NEXT: {{ $}} |
| ; GCN-NEXT: [[COPY:%[0-9]+]]:vreg_64_align2 = COPY $vgpr0_vgpr1 |
| ; GCN-NEXT: [[V_MOV_B:%[0-9]+]]:vreg_64_align2 = V_MOV_B64_PSEUDO 4575657222473777152, implicit $exec |
| ; GCN-NEXT: [[V_ADD_F64_e64_:%[0-9]+]]:vreg_64_align2 = nofpexcept V_ADD_F64_e64 0, [[COPY]], 1, [[V_MOV_B]], 0, 0, implicit $mode, implicit $exec |
| ; GCN-NEXT: $vgpr0_vgpr1 = COPY [[V_ADD_F64_e64_]] |
| ; GCN-NEXT: S_ENDPGM 0 |
| %0:vreg_64_align2 = COPY $vgpr0_vgpr1 |
| %1:vreg_64_align2 = V_MOV_B64_PSEUDO 4575657222473777152, implicit $exec |
| %2:vreg_64_align2 = COPY %1 |
| %3:vreg_64_align2 = nofpexcept V_ADD_F64_e64 0, %0, 1, %2, 0, 0, implicit $mode, implicit $exec |
| $vgpr0_vgpr1 = COPY %3 |
| S_ENDPGM 0 |
| |
| ... |
| |
| --- |
| name: v_mov_b64_pseudo_imm_fp32_1_splat_copy_extract_sub0_to_f32_use |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0 |
| ; GCN-LABEL: name: v_mov_b64_pseudo_imm_fp32_1_splat_copy_extract_sub0_to_f32_use |
| ; GCN: liveins: $vgpr0 |
| ; GCN-NEXT: {{ $}} |
| ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; GCN-NEXT: [[V_ADD_F32_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_ADD_F32_e64 0, [[COPY]], 1, 1065353216, 0, 0, implicit $mode, implicit $exec |
| ; GCN-NEXT: $vgpr0 = COPY [[V_ADD_F32_e64_]] |
| ; GCN-NEXT: S_ENDPGM 0 |
| %0:vgpr_32 = COPY $vgpr0 |
| %1:vreg_64_align2 = V_MOV_B64_PSEUDO 4575657222473777152, implicit $exec |
| %2:vgpr_32 = COPY %1.sub0 |
| %3:vgpr_32 = nofpexcept V_ADD_F32_e64 0, %0, 1, %2, 0, 0, implicit $mode, implicit $exec |
| $vgpr0 = COPY %3 |
| S_ENDPGM 0 |
| |
| ... |
| |
| --- |
| name: v_mov_b64_pseudo_imm_fp32_1_splat_copy_extract_sub1_to_f32_use |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0 |
| ; GCN-LABEL: name: v_mov_b64_pseudo_imm_fp32_1_splat_copy_extract_sub1_to_f32_use |
| ; GCN: liveins: $vgpr0 |
| ; GCN-NEXT: {{ $}} |
| ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; GCN-NEXT: [[V_ADD_F32_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_ADD_F32_e64 0, [[COPY]], 1, 1065353216, 0, 0, implicit $mode, implicit $exec |
| ; GCN-NEXT: $vgpr0 = COPY [[V_ADD_F32_e64_]] |
| ; GCN-NEXT: S_ENDPGM 0 |
| %0:vgpr_32 = COPY $vgpr0 |
| %1:vreg_64_align2 = V_MOV_B64_PSEUDO 4575657222473777152, implicit $exec |
| %2:vgpr_32 = COPY %1.sub1 |
| %3:vgpr_32 = nofpexcept V_ADD_F32_e64 0, %0, 1, %2, 0, 0, implicit $mode, implicit $exec |
| $vgpr0 = COPY %3 |
| S_ENDPGM 0 |
| |
| ... |
| |
| --- |
| name: v_mov_b64_pseudo_imm_fp64_1_copy_extract_sub0_to_f32_use |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0 |
| ; GCN-LABEL: name: v_mov_b64_pseudo_imm_fp64_1_copy_extract_sub0_to_f32_use |
| ; GCN: liveins: $vgpr0 |
| ; GCN-NEXT: {{ $}} |
| ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; GCN-NEXT: [[V_ADD_F32_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_ADD_F32_e64 0, [[COPY]], 1, 0, 0, 0, implicit $mode, implicit $exec |
| ; GCN-NEXT: $vgpr0 = COPY [[V_ADD_F32_e64_]] |
| ; GCN-NEXT: S_ENDPGM 0 |
| %0:vgpr_32 = COPY $vgpr0 |
| %1:vreg_64_align2 = V_MOV_B64_PSEUDO 4607182418800017408, implicit $exec |
| %2:vgpr_32 = COPY %1.sub0 |
| %3:vgpr_32 = nofpexcept V_ADD_F32_e64 0, %0, 1, %2, 0, 0, implicit $mode, implicit $exec |
| $vgpr0 = COPY %3 |
| S_ENDPGM 0 |
| |
| ... |
| |
| --- |
| name: v_mov_b64_pseudo_imm_fp64_1_copy_extract_sub1_to_f32_use |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0 |
| ; GFX10-LABEL: name: v_mov_b64_pseudo_imm_fp64_1_copy_extract_sub1_to_f32_use |
| ; GFX10: liveins: $vgpr0 |
| ; GFX10-NEXT: {{ $}} |
| ; GFX10-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; GFX10-NEXT: [[V_ADD_F32_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_ADD_F32_e64 0, [[COPY]], 1, 1072693248, 0, 0, implicit $mode, implicit $exec |
| ; GFX10-NEXT: $vgpr0 = COPY [[V_ADD_F32_e64_]] |
| ; GFX10-NEXT: S_ENDPGM 0 |
| ; |
| ; GFX9-LABEL: name: v_mov_b64_pseudo_imm_fp64_1_copy_extract_sub1_to_f32_use |
| ; GFX9: liveins: $vgpr0 |
| ; GFX9-NEXT: {{ $}} |
| ; GFX9-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; GFX9-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1072693248, implicit $exec |
| ; GFX9-NEXT: [[V_ADD_F32_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_ADD_F32_e64 0, [[COPY]], 1, [[V_MOV_B32_e32_]], 0, 0, implicit $mode, implicit $exec |
| ; GFX9-NEXT: $vgpr0 = COPY [[V_ADD_F32_e64_]] |
| ; GFX9-NEXT: S_ENDPGM 0 |
| %0:vgpr_32 = COPY $vgpr0 |
| %1:vreg_64_align2 = V_MOV_B64_PSEUDO 4607182418800017408, implicit $exec |
| %2:vgpr_32 = COPY %1.sub1 |
| %3:vgpr_32 = nofpexcept V_ADD_F32_e64 0, %0, 1, %2, 0, 0, implicit $mode, implicit $exec |
| $vgpr0 = COPY %3 |
| S_ENDPGM 0 |
| |
| ... |
| |
| --- |
| name: v_mov_b64_pseudo_imm_fp32_1_fp32_2_copy_extract_sub0_f32_use |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0 |
| ; GCN-LABEL: name: v_mov_b64_pseudo_imm_fp32_1_fp32_2_copy_extract_sub0_f32_use |
| ; GCN: liveins: $vgpr0 |
| ; GCN-NEXT: {{ $}} |
| ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; GCN-NEXT: [[V_ADD_F32_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_ADD_F32_e64 0, [[COPY]], 1, 1073741824, 0, 0, implicit $mode, implicit $exec |
| ; GCN-NEXT: $vgpr0 = COPY [[V_ADD_F32_e64_]] |
| ; GCN-NEXT: S_ENDPGM 0 |
| %0:vgpr_32 = COPY $vgpr0 |
| %1:vreg_64_align2 = V_MOV_B64_PSEUDO 4575657222482165760, implicit $exec |
| %2:vgpr_32 = COPY %1.sub0 |
| %3:vgpr_32 = nofpexcept V_ADD_F32_e64 0, %0, 1, %2, 0, 0, implicit $mode, implicit $exec |
| $vgpr0 = COPY %3 |
| S_ENDPGM 0 |
| |
| ... |
| |
| --- |
| name: v_mov_b64_pseudo_imm_fp32_1_fp32_2_copy_extract_sub1_f32_use |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0 |
| ; GCN-LABEL: name: v_mov_b64_pseudo_imm_fp32_1_fp32_2_copy_extract_sub1_f32_use |
| ; GCN: liveins: $vgpr0 |
| ; GCN-NEXT: {{ $}} |
| ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; GCN-NEXT: [[V_ADD_F32_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_ADD_F32_e64 0, [[COPY]], 1, 1065353216, 0, 0, implicit $mode, implicit $exec |
| ; GCN-NEXT: $vgpr0 = COPY [[V_ADD_F32_e64_]] |
| ; GCN-NEXT: S_ENDPGM 0 |
| %0:vgpr_32 = COPY $vgpr0 |
| %1:vreg_64_align2 = V_MOV_B64_PSEUDO 4575657222482165760, implicit $exec |
| %2:vgpr_32 = COPY %1.sub1 |
| %3:vgpr_32 = nofpexcept V_ADD_F32_e64 0, %0, 1, %2, 0, 0, implicit $mode, implicit $exec |
| $vgpr0 = COPY %3 |
| S_ENDPGM 0 |
| |
| ... |
| |
| --- |
| name: v_mov_b64_pseudo_imm_fp32_1_splat_direct_subreg_sub0_f32_use |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0 |
| ; GCN-LABEL: name: v_mov_b64_pseudo_imm_fp32_1_splat_direct_subreg_sub0_f32_use |
| ; GCN: liveins: $vgpr0 |
| ; GCN-NEXT: {{ $}} |
| ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; GCN-NEXT: [[V_ADD_F32_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_ADD_F32_e64 0, [[COPY]], 1, 1065353216, 0, 0, implicit $mode, implicit $exec |
| ; GCN-NEXT: $vgpr0 = COPY [[V_ADD_F32_e64_]] |
| ; GCN-NEXT: S_ENDPGM 0 |
| %0:vgpr_32 = COPY $vgpr0 |
| %1:vreg_64_align2 = V_MOV_B64_PSEUDO 4575657222473777152, implicit $exec |
| %2:vgpr_32 = nofpexcept V_ADD_F32_e64 0, %0, 1, %1.sub0, 0, 0, implicit $mode, implicit $exec |
| $vgpr0 = COPY %2 |
| S_ENDPGM 0 |
| |
| ... |
| |
| --- |
| name: v_mov_b64_pseudo_imm_fp32_1_splat_direct_subreg_sub1_f32_use |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0 |
| ; GCN-LABEL: name: v_mov_b64_pseudo_imm_fp32_1_splat_direct_subreg_sub1_f32_use |
| ; GCN: liveins: $vgpr0 |
| ; GCN-NEXT: {{ $}} |
| ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; GCN-NEXT: [[V_ADD_F32_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_ADD_F32_e64 0, [[COPY]], 1, 1065353216, 0, 0, implicit $mode, implicit $exec |
| ; GCN-NEXT: $vgpr0 = COPY [[V_ADD_F32_e64_]] |
| ; GCN-NEXT: S_ENDPGM 0 |
| %0:vgpr_32 = COPY $vgpr0 |
| %1:vreg_64_align2 = V_MOV_B64_PSEUDO 4575657222473777152, implicit $exec |
| %2:vgpr_32 = nofpexcept V_ADD_F32_e64 0, %0, 1, %1.sub1, 0, 0, implicit $mode, implicit $exec |
| $vgpr0 = COPY %2 |
| S_ENDPGM 0 |
| |
| ... |
| |
| --- |
| name: v_mov_b64_pseudo_lit_direct_subreg_sub0_f32_use |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0 |
| ; GFX10-LABEL: name: v_mov_b64_pseudo_lit_direct_subreg_sub0_f32_use |
| ; GFX10: liveins: $vgpr0 |
| ; GFX10-NEXT: {{ $}} |
| ; GFX10-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; GFX10-NEXT: [[V_ADD_F32_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_ADD_F32_e64 0, [[COPY]], 1, 8888, 0, 0, implicit $mode, implicit $exec |
| ; GFX10-NEXT: $vgpr0 = COPY [[V_ADD_F32_e64_]] |
| ; GFX10-NEXT: S_ENDPGM 0 |
| ; |
| ; GFX9-LABEL: name: v_mov_b64_pseudo_lit_direct_subreg_sub0_f32_use |
| ; GFX9: liveins: $vgpr0 |
| ; GFX9-NEXT: {{ $}} |
| ; GFX9-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; GFX9-NEXT: [[V_MOV_B:%[0-9]+]]:vreg_64_align2 = V_MOV_B64_PSEUDO 42945378001592, implicit $exec |
| ; GFX9-NEXT: [[V_ADD_F32_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_ADD_F32_e64 0, [[COPY]], 1, [[V_MOV_B]].sub0, 0, 0, implicit $mode, implicit $exec |
| ; GFX9-NEXT: $vgpr0 = COPY [[V_ADD_F32_e64_]] |
| ; GFX9-NEXT: S_ENDPGM 0 |
| %0:vgpr_32 = COPY $vgpr0 |
| %1:vreg_64_align2 = V_MOV_B64_PSEUDO 42945378001592, implicit $exec |
| %2:vgpr_32 = nofpexcept V_ADD_F32_e64 0, %0, 1, %1.sub0, 0, 0, implicit $mode, implicit $exec |
| $vgpr0 = COPY %2 |
| S_ENDPGM 0 |
| |
| ... |
| |
| --- |
| name: v_mov_b64_pseudo_lit_direct_subreg_sub1_f32_use |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0 |
| ; GFX10-LABEL: name: v_mov_b64_pseudo_lit_direct_subreg_sub1_f32_use |
| ; GFX10: liveins: $vgpr0 |
| ; GFX10-NEXT: {{ $}} |
| ; GFX10-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; GFX10-NEXT: [[V_ADD_F32_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_ADD_F32_e64 0, [[COPY]], 1, 9999, 0, 0, implicit $mode, implicit $exec |
| ; GFX10-NEXT: $vgpr0 = COPY [[V_ADD_F32_e64_]] |
| ; GFX10-NEXT: S_ENDPGM 0 |
| ; |
| ; GFX9-LABEL: name: v_mov_b64_pseudo_lit_direct_subreg_sub1_f32_use |
| ; GFX9: liveins: $vgpr0 |
| ; GFX9-NEXT: {{ $}} |
| ; GFX9-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; GFX9-NEXT: [[V_MOV_B:%[0-9]+]]:vreg_64_align2 = V_MOV_B64_PSEUDO 42945378001592, implicit $exec |
| ; GFX9-NEXT: [[V_ADD_F32_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_ADD_F32_e64 0, [[COPY]], 1, [[V_MOV_B]].sub1, 0, 0, implicit $mode, implicit $exec |
| ; GFX9-NEXT: $vgpr0 = COPY [[V_ADD_F32_e64_]] |
| ; GFX9-NEXT: S_ENDPGM 0 |
| %0:vgpr_32 = COPY $vgpr0 |
| %1:vreg_64_align2 = V_MOV_B64_PSEUDO 42945378001592, implicit $exec |
| %2:vgpr_32 = nofpexcept V_ADD_F32_e64 0, %0, 1, %1.sub1, 0, 0, implicit $mode, implicit $exec |
| $vgpr0 = COPY %2 |
| S_ENDPGM 0 |
| |
| ... |
| |
| --- |
| name: v_mov_b64_pseudo_imm_fp32_1_fp32_2_direct_subreg_sub0_f32_use |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0 |
| ; GCN-LABEL: name: v_mov_b64_pseudo_imm_fp32_1_fp32_2_direct_subreg_sub0_f32_use |
| ; GCN: liveins: $vgpr0 |
| ; GCN-NEXT: {{ $}} |
| ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; GCN-NEXT: [[V_ADD_F32_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_ADD_F32_e64 0, [[COPY]], 1, 1073741824, 0, 0, implicit $mode, implicit $exec |
| ; GCN-NEXT: $vgpr0 = COPY [[V_ADD_F32_e64_]] |
| ; GCN-NEXT: S_ENDPGM 0 |
| %0:vgpr_32 = COPY $vgpr0 |
| %1:vreg_64_align2 = V_MOV_B64_PSEUDO 4575657222482165760, implicit $exec |
| %2:vgpr_32 = nofpexcept V_ADD_F32_e64 0, %0, 1, %1.sub0, 0, 0, implicit $mode, implicit $exec |
| $vgpr0 = COPY %2 |
| S_ENDPGM 0 |
| |
| ... |
| |
| --- |
| name: v_mov_b64_pseudo_imm_fp32_1_fp32_2_direct_subreg_sub1_f32_use |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0 |
| ; GCN-LABEL: name: v_mov_b64_pseudo_imm_fp32_1_fp32_2_direct_subreg_sub1_f32_use |
| ; GCN: liveins: $vgpr0 |
| ; GCN-NEXT: {{ $}} |
| ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; GCN-NEXT: [[V_ADD_F32_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_ADD_F32_e64 0, [[COPY]], 1, 1065353216, 0, 0, implicit $mode, implicit $exec |
| ; GCN-NEXT: $vgpr0 = COPY [[V_ADD_F32_e64_]] |
| ; GCN-NEXT: S_ENDPGM 0 |
| %0:vgpr_32 = COPY $vgpr0 |
| %1:vreg_64_align2 = V_MOV_B64_PSEUDO 4575657222482165760, implicit $exec |
| %2:vgpr_32 = nofpexcept V_ADD_F32_e64 0, %0, 1, %1.sub1, 0, 0, implicit $mode, implicit $exec |
| $vgpr0 = COPY %2 |
| S_ENDPGM 0 |
| |
| ... |