llvm/test/CodeGen/AMDGPU/GlobalISel/min3-max3-combine.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc -global-isel -mtriple=amdgcn-amd-mesa3d -mcpu=gfx1010 -verify-machineinstrs < %s | FileCheck -check-prefix=GFX10 %s
; RUN: llc -global-isel -mtriple=amdgcn-amd-mesa3d -mcpu=gfx1200 -verify-machineinstrs < %s | FileCheck -check-prefix=GFX12 %s
define i32 @test_smin3(i32 %a, i32 %b, i32 %c) {
; GFX10-LABEL: test_smin3:
; GFX10:       ; %bb.0:
; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-NEXT:    v_min3_i32 v0, v0, v1, v2
; GFX10-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-LABEL: test_smin3:
; GFX12:       ; %bb.0:
; GFX12-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT:    s_wait_expcnt 0x0
; GFX12-NEXT:    s_wait_samplecnt 0x0
; GFX12-NEXT:    s_wait_bvhcnt 0x0
; GFX12-NEXT:    s_wait_kmcnt 0x0
; GFX12-NEXT:    v_min3_i32 v0, v0, v1, v2
; GFX12-NEXT:    s_setpc_b64 s[30:31]
  %min1 = call i32 @llvm.smin.i32(i32 %a, i32 %b)
  %min2 = call i32 @llvm.smin.i32(i32 %min1, i32 %c)
  ret i32 %min2
}

define i32 @test_smin3_with_constants(i32 %a, i32 %b) {
; GFX10-LABEL: test_smin3_with_constants:
; GFX10:       ; %bb.0:
; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-NEXT:    v_min3_i32 v0, v0, v1, 7
; GFX10-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-LABEL: test_smin3_with_constants:
; GFX12:       ; %bb.0:
; GFX12-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT:    s_wait_expcnt 0x0
; GFX12-NEXT:    s_wait_samplecnt 0x0
; GFX12-NEXT:    s_wait_bvhcnt 0x0
; GFX12-NEXT:    s_wait_kmcnt 0x0
; GFX12-NEXT:    v_min3_i32 v0, v0, v1, 7
; GFX12-NEXT:    s_setpc_b64 s[30:31]
  %min1 = call i32 @llvm.smin.i32(i32 %a, i32 %b)
  %min2 = call i32 @llvm.smin.i32(i32 %min1, i32 7)
  ret i32 %min2
}

define i32 @test_smin3_smin_umin(i32 %a, i32 %b) {
; GFX10-LABEL: test_smin3_smin_umin:
; GFX10:       ; %bb.0:
; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-NEXT:    v_min_i32_e32 v0, v0, v1
; GFX10-NEXT:    v_min_u32_e32 v0, 7, v0
; GFX10-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-LABEL: test_smin3_smin_umin:
; GFX12:       ; %bb.0:
; GFX12-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT:    s_wait_expcnt 0x0
; GFX12-NEXT:    s_wait_samplecnt 0x0
; GFX12-NEXT:    s_wait_bvhcnt 0x0
; GFX12-NEXT:    s_wait_kmcnt 0x0
; GFX12-NEXT:    v_min_i32_e32 v0, v0, v1
; GFX12-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; GFX12-NEXT:    v_min_u32_e32 v0, 7, v0
; GFX12-NEXT:    s_setpc_b64 s[30:31]
  %min1 = call i32 @llvm.smin.i32(i32 %a, i32 %b)
  %min2 = call i32 @llvm.umin.i32(i32 %min1, i32 7)
  ret i32 %min2
}

define <2 x i16> @test_smin3_v2i16(<2 x i16> %a, <2 x i16> %b, <2 x i16> %c) {
; GFX10-LABEL: test_smin3_v2i16:
; GFX10:       ; %bb.0:
; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-NEXT:    v_pk_min_i16 v0, v0, v1
; GFX10-NEXT:    v_pk_min_i16 v0, v0, v2
; GFX10-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-LABEL: test_smin3_v2i16:
; GFX12:       ; %bb.0:
; GFX12-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT:    s_wait_expcnt 0x0
; GFX12-NEXT:    s_wait_samplecnt 0x0
; GFX12-NEXT:    s_wait_bvhcnt 0x0
; GFX12-NEXT:    s_wait_kmcnt 0x0
; GFX12-NEXT:    v_pk_min_i16 v0, v0, v1
; GFX12-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; GFX12-NEXT:    v_pk_min_i16 v0, v0, v2
; GFX12-NEXT:    s_setpc_b64 s[30:31]
  %min1 = call <2 x i16> @llvm.smin.v2i16(<2 x i16> %a, <2 x i16> %b)
  %min2 = call <2 x i16> @llvm.smin.v2i16(<2 x i16> %min1, <2 x i16> %c)
  ret <2 x i16> %min2
}

define i32 @test_smax3(i32 %a, i32 %b, i32 %c) {
; GFX10-LABEL: test_smax3:
; GFX10:       ; %bb.0:
; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-NEXT:    v_max3_i32 v0, v0, v1, v2
; GFX10-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-LABEL: test_smax3:
; GFX12:       ; %bb.0:
; GFX12-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT:    s_wait_expcnt 0x0
; GFX12-NEXT:    s_wait_samplecnt 0x0
; GFX12-NEXT:    s_wait_bvhcnt 0x0
; GFX12-NEXT:    s_wait_kmcnt 0x0
; GFX12-NEXT:    v_max3_i32 v0, v0, v1, v2
; GFX12-NEXT:    s_setpc_b64 s[30:31]
  %max1 = call i32 @llvm.smax.i32(i32 %a, i32 %b)
  %max2 = call i32 @llvm.smax.i32(i32 %max1, i32 %c)
  ret i32 %max2
}

define i32 @test_smax3_with_constants(i32 %a, i32 %b) {
; GFX10-LABEL: test_smax3_with_constants:
; GFX10:       ; %bb.0:
; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-NEXT:    v_max3_i32 v0, v0, v1, 7
; GFX10-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-LABEL: test_smax3_with_constants:
; GFX12:       ; %bb.0:
; GFX12-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT:    s_wait_expcnt 0x0
; GFX12-NEXT:    s_wait_samplecnt 0x0
; GFX12-NEXT:    s_wait_bvhcnt 0x0
; GFX12-NEXT:    s_wait_kmcnt 0x0
; GFX12-NEXT:    v_max3_i32 v0, v0, v1, 7
; GFX12-NEXT:    s_setpc_b64 s[30:31]
  %min1 = call i32 @llvm.smax.i32(i32 %a, i32 %b)
  %min2 = call i32 @llvm.smax.i32(i32 %min1, i32 7)
  ret i32 %min2
}

define i32 @test_smin3_smax_umax(i32 %a, i32 %b) {
; GFX10-LABEL: test_smin3_smax_umax:
; GFX10:       ; %bb.0:
; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-NEXT:    v_max_i32_e32 v0, v0, v1
; GFX10-NEXT:    v_max_u32_e32 v0, 7, v0
; GFX10-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-LABEL: test_smin3_smax_umax:
; GFX12:       ; %bb.0:
; GFX12-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT:    s_wait_expcnt 0x0
; GFX12-NEXT:    s_wait_samplecnt 0x0
; GFX12-NEXT:    s_wait_bvhcnt 0x0
; GFX12-NEXT:    s_wait_kmcnt 0x0
; GFX12-NEXT:    v_max_i32_e32 v0, v0, v1
; GFX12-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; GFX12-NEXT:    v_max_u32_e32 v0, 7, v0
; GFX12-NEXT:    s_setpc_b64 s[30:31]
  %min1 = call i32 @llvm.smax.i32(i32 %a, i32 %b)
  %min2 = call i32 @llvm.umax.i32(i32 %min1, i32 7)
  ret i32 %min2
}

define <2 x i16> @test_smax3_v2i16(<2 x i16> %a, <2 x i16> %b, <2 x i16> %c) {
; GFX10-LABEL: test_smax3_v2i16:
; GFX10:       ; %bb.0:
; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-NEXT:    v_pk_max_i16 v0, v0, v1
; GFX10-NEXT:    v_pk_max_i16 v0, v0, v2
; GFX10-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-LABEL: test_smax3_v2i16:
; GFX12:       ; %bb.0:
; GFX12-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT:    s_wait_expcnt 0x0
; GFX12-NEXT:    s_wait_samplecnt 0x0
; GFX12-NEXT:    s_wait_bvhcnt 0x0
; GFX12-NEXT:    s_wait_kmcnt 0x0
; GFX12-NEXT:    v_pk_max_i16 v0, v0, v1
; GFX12-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; GFX12-NEXT:    v_pk_max_i16 v0, v0, v2
; GFX12-NEXT:    s_setpc_b64 s[30:31]
  %max1 = call <2 x i16> @llvm.smax.v2i16(<2 x i16> %a, <2 x i16> %b)
  %max2 = call <2 x i16> @llvm.smax.v2i16(<2 x i16> %max1, <2 x i16> %c)
  ret <2 x i16> %max2
}

define i32 @test_umin3(i32 %a, i32 %b, i32 %c) {
; GFX10-LABEL: test_umin3:
; GFX10:       ; %bb.0:
; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-NEXT:    v_min3_u32 v0, v0, v1, v2
; GFX10-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-LABEL: test_umin3:
; GFX12:       ; %bb.0:
; GFX12-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT:    s_wait_expcnt 0x0
; GFX12-NEXT:    s_wait_samplecnt 0x0
; GFX12-NEXT:    s_wait_bvhcnt 0x0
; GFX12-NEXT:    s_wait_kmcnt 0x0
; GFX12-NEXT:    v_min3_u32 v0, v0, v1, v2
; GFX12-NEXT:    s_setpc_b64 s[30:31]
  %min1 = call i32 @llvm.umin.i32(i32 %a, i32 %b)
  %min2 = call i32 @llvm.umin.i32(i32 %min1, i32 %c)
  ret i32 %min2
}

define i32 @test_umin3_with_constants(i32 %a, i32 %b) {
; GFX10-LABEL: test_umin3_with_constants:
; GFX10:       ; %bb.0:
; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-NEXT:    v_min3_u32 v0, v0, v1, 7
; GFX10-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-LABEL: test_umin3_with_constants:
; GFX12:       ; %bb.0:
; GFX12-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT:    s_wait_expcnt 0x0
; GFX12-NEXT:    s_wait_samplecnt 0x0
; GFX12-NEXT:    s_wait_bvhcnt 0x0
; GFX12-NEXT:    s_wait_kmcnt 0x0
; GFX12-NEXT:    v_min3_u32 v0, v0, v1, 7
; GFX12-NEXT:    s_setpc_b64 s[30:31]
  %min1 = call i32 @llvm.umin.i32(i32 %a, i32 %b)
  %min2 = call i32 @llvm.umin.i32(i32 %min1, i32 7)
  ret i32 %min2
}

define <2 x i16> @test_umin3_v2i16(<2 x i16> %a, <2 x i16> %b, <2 x i16> %c) {
; GFX10-LABEL: test_umin3_v2i16:
; GFX10:       ; %bb.0:
; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-NEXT:    v_pk_min_u16 v0, v0, v1
; GFX10-NEXT:    v_pk_min_u16 v0, v0, v2
; GFX10-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-LABEL: test_umin3_v2i16:
; GFX12:       ; %bb.0:
; GFX12-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT:    s_wait_expcnt 0x0
; GFX12-NEXT:    s_wait_samplecnt 0x0
; GFX12-NEXT:    s_wait_bvhcnt 0x0
; GFX12-NEXT:    s_wait_kmcnt 0x0
; GFX12-NEXT:    v_pk_min_u16 v0, v0, v1
; GFX12-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; GFX12-NEXT:    v_pk_min_u16 v0, v0, v2
; GFX12-NEXT:    s_setpc_b64 s[30:31]
  %min1 = call <2 x i16> @llvm.umin.v2i16(<2 x i16> %a, <2 x i16> %b)
  %min2 = call <2 x i16> @llvm.umin.v2i16(<2 x i16> %min1, <2 x i16> %c)
  ret <2 x i16> %min2
}

define i32 @test_umax3(i32 %a, i32 %b, i32 %c) {
; GFX10-LABEL: test_umax3:
; GFX10:       ; %bb.0:
; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-NEXT:    v_max3_u32 v0, v0, v1, v2
; GFX10-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-LABEL: test_umax3:
; GFX12:       ; %bb.0:
; GFX12-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT:    s_wait_expcnt 0x0
; GFX12-NEXT:    s_wait_samplecnt 0x0
; GFX12-NEXT:    s_wait_bvhcnt 0x0
; GFX12-NEXT:    s_wait_kmcnt 0x0
; GFX12-NEXT:    v_max3_u32 v0, v0, v1, v2
; GFX12-NEXT:    s_setpc_b64 s[30:31]
  %max1 = call i32 @llvm.umax.i32(i32 %a, i32 %b)
  %max2 = call i32 @llvm.umax.i32(i32 %max1, i32 %c)
  ret i32 %max2
}

define i32 @test_umax3_with_constants(i32 %a, i32 %b) {
; GFX10-LABEL: test_umax3_with_constants:
; GFX10:       ; %bb.0:
; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-NEXT:    v_max3_u32 v0, v0, v1, 7
; GFX10-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-LABEL: test_umax3_with_constants:
; GFX12:       ; %bb.0:
; GFX12-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT:    s_wait_expcnt 0x0
; GFX12-NEXT:    s_wait_samplecnt 0x0
; GFX12-NEXT:    s_wait_bvhcnt 0x0
; GFX12-NEXT:    s_wait_kmcnt 0x0
; GFX12-NEXT:    v_max3_u32 v0, v0, v1, 7
; GFX12-NEXT:    s_setpc_b64 s[30:31]
  %max1 = call i32 @llvm.umax.i32(i32 %a, i32 %b)
  %max2 = call i32 @llvm.umax.i32(i32 %max1, i32 7)
  ret i32 %max2
}

define <2 x i16> @test_umax3_v2i16(<2 x i16> %a, <2 x i16> %b, <2 x i16> %c) {
; GFX10-LABEL: test_umax3_v2i16:
; GFX10:       ; %bb.0:
; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-NEXT:    v_pk_max_u16 v0, v0, v1
; GFX10-NEXT:    v_pk_max_u16 v0, v0, v2
; GFX10-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-LABEL: test_umax3_v2i16:
; GFX12:       ; %bb.0:
; GFX12-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT:    s_wait_expcnt 0x0
; GFX12-NEXT:    s_wait_samplecnt 0x0
; GFX12-NEXT:    s_wait_bvhcnt 0x0
; GFX12-NEXT:    s_wait_kmcnt 0x0
; GFX12-NEXT:    v_pk_max_u16 v0, v0, v1
; GFX12-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; GFX12-NEXT:    v_pk_max_u16 v0, v0, v2
; GFX12-NEXT:    s_setpc_b64 s[30:31]
  %max1 = call <2 x i16> @llvm.umax.v2i16(<2 x i16> %a, <2 x i16> %b)
  %max2 = call <2 x i16> @llvm.umax.v2i16(<2 x i16> %max1, <2 x i16> %c)
  ret <2 x i16> %max2
}

define i16 @test_smin3_i16(i16 %a, i16 %b, i16 %c) {
; GFX10-LABEL: test_smin3_i16:
; GFX10:       ; %bb.0:
; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-NEXT:    v_min3_i16 v0, v0, v1, v2
; GFX10-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-LABEL: test_smin3_i16:
; GFX12:       ; %bb.0:
; GFX12-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT:    s_wait_expcnt 0x0
; GFX12-NEXT:    s_wait_samplecnt 0x0
; GFX12-NEXT:    s_wait_bvhcnt 0x0
; GFX12-NEXT:    s_wait_kmcnt 0x0
; GFX12-NEXT:    v_min3_i16 v0.l, v0.l, v1.l, v2.l
; GFX12-NEXT:    s_setpc_b64 s[30:31]
  %min1 = call i16 @llvm.smin.i16(i16 %a, i16 %b)
  %min2 = call i16 @llvm.smin.i16(i16 %min1, i16 %c)
  ret i16 %min2
}

define i16 @test_smin3_i16_with_constants(i16 %a, i16 %b) {
; GFX10-LABEL: test_smin3_i16_with_constants:
; GFX10:       ; %bb.0:
; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-NEXT:    v_min3_i16 v0, v0, v1, 7
; GFX10-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-LABEL: test_smin3_i16_with_constants:
; GFX12:       ; %bb.0:
; GFX12-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT:    s_wait_expcnt 0x0
; GFX12-NEXT:    s_wait_samplecnt 0x0
; GFX12-NEXT:    s_wait_bvhcnt 0x0
; GFX12-NEXT:    s_wait_kmcnt 0x0
; GFX12-NEXT:    v_min3_i16 v0.l, v0.l, v1.l, 7
; GFX12-NEXT:    s_setpc_b64 s[30:31]
  %min1 = call i16 @llvm.smin.i16(i16 %a, i16 %b)
  %min2 = call i16 @llvm.smin.i16(i16 %min1, i16 7)
  ret i16 %min2
}

define i16 @test_smax3_i16(i16 %a, i16 %b, i16 %c) {
; GFX10-LABEL: test_smax3_i16:
; GFX10:       ; %bb.0:
; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-NEXT:    v_max3_i16 v0, v0, v1, v2
; GFX10-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-LABEL: test_smax3_i16:
; GFX12:       ; %bb.0:
; GFX12-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT:    s_wait_expcnt 0x0
; GFX12-NEXT:    s_wait_samplecnt 0x0
; GFX12-NEXT:    s_wait_bvhcnt 0x0
; GFX12-NEXT:    s_wait_kmcnt 0x0
; GFX12-NEXT:    v_max3_i16 v0.l, v0.l, v1.l, v2.l
; GFX12-NEXT:    s_setpc_b64 s[30:31]
  %max1 = call i16 @llvm.smax.i16(i16 %a, i16 %b)
  %max2 = call i16 @llvm.smax.i16(i16 %max1, i16 %c)
  ret i16 %max2
}

define i16 @test_smax3_i16_with_constants(i16 %a, i16 %b) {
; GFX10-LABEL: test_smax3_i16_with_constants:
; GFX10:       ; %bb.0:
; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-NEXT:    v_max3_i16 v0, v0, v1, 7
; GFX10-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-LABEL: test_smax3_i16_with_constants:
; GFX12:       ; %bb.0:
; GFX12-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT:    s_wait_expcnt 0x0
; GFX12-NEXT:    s_wait_samplecnt 0x0
; GFX12-NEXT:    s_wait_bvhcnt 0x0
; GFX12-NEXT:    s_wait_kmcnt 0x0
; GFX12-NEXT:    v_max3_i16 v0.l, v0.l, v1.l, 7
; GFX12-NEXT:    s_setpc_b64 s[30:31]
  %max1 = call i16 @llvm.smax.i16(i16 %a, i16 %b)
  %max2 = call i16 @llvm.smax.i16(i16 %max1, i16 7)
  ret i16 %max2
}

define i16 @test_umin3_i16(i16 %a, i16 %b, i16 %c) {
; GFX10-LABEL: test_umin3_i16:
; GFX10:       ; %bb.0:
; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-NEXT:    v_min3_u16 v0, v0, v1, v2
; GFX10-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-LABEL: test_umin3_i16:
; GFX12:       ; %bb.0:
; GFX12-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT:    s_wait_expcnt 0x0
; GFX12-NEXT:    s_wait_samplecnt 0x0
; GFX12-NEXT:    s_wait_bvhcnt 0x0
; GFX12-NEXT:    s_wait_kmcnt 0x0
; GFX12-NEXT:    v_min3_u16 v0.l, v0.l, v1.l, v2.l
; GFX12-NEXT:    s_setpc_b64 s[30:31]
  %min1 = call i16 @llvm.umin.i16(i16 %a, i16 %b)
  %min2 = call i16 @llvm.umin.i16(i16 %min1, i16 %c)
  ret i16 %min2
}

define i16 @test_umin3_i16_with_constants(i16 %a, i16 %b) {
; GFX10-LABEL: test_umin3_i16_with_constants:
; GFX10:       ; %bb.0:
; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-NEXT:    v_min3_u16 v0, v0, v1, 7
; GFX10-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-LABEL: test_umin3_i16_with_constants:
; GFX12:       ; %bb.0:
; GFX12-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT:    s_wait_expcnt 0x0
; GFX12-NEXT:    s_wait_samplecnt 0x0
; GFX12-NEXT:    s_wait_bvhcnt 0x0
; GFX12-NEXT:    s_wait_kmcnt 0x0
; GFX12-NEXT:    v_min3_u16 v0.l, v0.l, v1.l, 7
; GFX12-NEXT:    s_setpc_b64 s[30:31]
  %min1 = call i16 @llvm.umin.i16(i16 %a, i16 %b)
  %min2 = call i16 @llvm.umin.i16(i16 %min1, i16 7)
  ret i16 %min2
}

define i16 @test_umax3_i16(i16 %a, i16 %b, i16 %c) {
; GFX10-LABEL: test_umax3_i16:
; GFX10:       ; %bb.0:
; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-NEXT:    v_max3_u16 v0, v0, v1, v2
; GFX10-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-LABEL: test_umax3_i16:
; GFX12:       ; %bb.0:
; GFX12-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT:    s_wait_expcnt 0x0
; GFX12-NEXT:    s_wait_samplecnt 0x0
; GFX12-NEXT:    s_wait_bvhcnt 0x0
; GFX12-NEXT:    s_wait_kmcnt 0x0
; GFX12-NEXT:    v_max3_u16 v0.l, v0.l, v1.l, v2.l
; GFX12-NEXT:    s_setpc_b64 s[30:31]
  %max1 = call i16 @llvm.umax.i16(i16 %a, i16 %b)
  %max2 = call i16 @llvm.umax.i16(i16 %max1, i16 %c)
  ret i16 %max2
}

define i16 @test_umax3_i16_with_constants(i16 %a, i16 %b) {
; GFX10-LABEL: test_umax3_i16_with_constants:
; GFX10:       ; %bb.0:
; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-NEXT:    v_max3_u16 v0, v0, v1, 7
; GFX10-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-LABEL: test_umax3_i16_with_constants:
; GFX12:       ; %bb.0:
; GFX12-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT:    s_wait_expcnt 0x0
; GFX12-NEXT:    s_wait_samplecnt 0x0
; GFX12-NEXT:    s_wait_bvhcnt 0x0
; GFX12-NEXT:    s_wait_kmcnt 0x0
; GFX12-NEXT:    v_max3_u16 v0.l, v0.l, v1.l, 7
; GFX12-NEXT:    s_setpc_b64 s[30:31]
  %max1 = call i16 @llvm.umax.i16(i16 %a, i16 %b)
  %max2 = call i16 @llvm.umax.i16(i16 %max1, i16 7)
  ret i16 %max2
}

declare i16 @llvm.smin.i16(i16, i16)
declare i16 @llvm.umin.i16(i16, i16)
declare i16 @llvm.smax.i16(i16, i16)
declare i16 @llvm.umax.i16(i16, i16)
declare i32 @llvm.smin.i32(i32, i32)
declare i32 @llvm.umin.i32(i32, i32)
declare i32 @llvm.smax.i32(i32, i32)
declare i32 @llvm.umax.i32(i32, i32)
declare <2 x i16> @llvm.smin.v2i16(<2 x i16>, <2 x i16>)
declare <2 x i16> @llvm.umin.v2i16(<2 x i16>, <2 x i16>)
declare <2 x i16> @llvm.smax.v2i16(<2 x i16>, <2 x i16>)
declare <2 x i16> @llvm.umax.v2i16(<2 x i16>, <2 x i16>)